PSoC 4, that they OP is trying to use, can't do it because the datasheet doesn't even mention it
2 oscillators and a Max 10 FPGA and the OP's design would be done already....
Is there a way to use, say, analog input and output pins to do it, or some obscure configuration? maybe, but that's not intended so it can't be regarded as a solution.
2 oscillators and a Max 10 FPGA and the OP's design would be done already....
The OP already has the clocks oscillating with his NAND gates, he just needs to feed those clocks to the PSoC, no need to add an FPGA, although I want Arrow to get their act straight and get some MAX 10 in stock. Will like to see what analog goodies it has to offer.
BTW, not sure the Max 10 FPGA will allow the OP to implement a Pierce Oscillator with just two caps and a crystal. That's the whole problem the OP brings about if these fabric logic gates act the same as hardware dedicated ones.
I have not played with max 10 either but it does look slick. I'd wait for the dev board to be available from Terasic and go that route.
Of course on the datasheet they don't even mention the EXTCLK in the block diagram this is the only reference to it, other than their specification of frequency and duty cycles.
The clock system for the PSoC 4100 consists of the IMO and the
ILO internal oscillators and provision for an external clock.
External Clock being a single pin on the PSoC 4. Edit: and by no mention in the block diagram I mean the block diagram. The IMO internal RC clock sits by itself in that diagram, no mention of the EXTCLK
External Clock being a single pin on the PSoC 4. Edit: and by no mention in the block diagram I mean the block diagram. The IMO internal RC clock sits by itself in that diagram, no mention of the EXTCLK
ps. Anyway I have a pretty good picture right now where everybody in this thread sits regarding hardware and software competence and state of mind. Probably not much more to discuss at this time and so let's give it a rest for now.
My quotes and the diagram you posted with EXT_CLK are pretty clear. Maybe review your own attachment:
IMO it's a clever trick to try to drive a crystal with a NAND gate (internal or discrete) but also a risk.
The two frequencies needs to be stable and 2% accuracy with the internal osc. is not enough for my application.
Hi all,
Thanks a lot for your efforts & thoughts to answer the question raised by me...
Hi miguelvp,
I tried the project you posted in Cypress forum. That one is also does not work.
I understand that my idea is not going to work with PSOC4.
The two frequencies needs to be stable and 2% accuracy with the internal osc. is not enough for my application.
Initially I planned to use a MSP430 micro on the system with two oscillators built up with NAND gate & Xtals.
I think it's easier for me to switch back to my initial plan with MSP430 and gave up on PSoC4 idea.
Thanks again for your thoughts and help.
cheers,
It's not possible to build an inverter between two pins? As far as "digital building blocks" go I must say I'm not impressed. End of story.
You CAN build an inverter between two pins, probably not to get a crystal to oscillate
Unfortunately I'm not in a position ATM to investigate how to make an inverter. It looks like no one else is either and since OP has left the building let's put this thread to rest.