Anybody have an ideas on this? 16911A PSync Fail , Card still works, but 1 channel seems to flop in the wind ( same have of card with U42 ) -- U42 has been replaced and still same result.
Here is the error, I am pretty sure its a bad via, Anybody know what the "PSync" Signal is? were its located? -- Would be helpful if we had some form of schematics or signal identification on these cards, If there are no longer supported and nobody is repairing them..
16911A Logic Analyzer(A) running...
System Clocks (J/K/L/M/Psync) Test running...
TEST 1: JCLK routed to all chips...
TEST 2: KCLK routed to all chips...
TEST 3: LCLK routed to all chips...
TEST 4: MCLK routed to all chips...
TEST 5: PSYNC A routed to all chips...
Slot A, Chip 0, RAM U42: MAC:0x000000, nPort 0 MSW, exp:0x9249 nActual:0x8249
FAIL: mode=PIO addr=0x6208 sample=0x00000000 word=msw exp=0x9249 act=0x8249 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000001, nPort 0 MSW, exp:0x2499 nActual:0x3499
FAIL: mode=PIO addr=0x6208 sample=0x00000004 word=msw exp=0x2499 act=0x3499 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000003, nPort 0 MSW, exp:0x9924 nActual:0x8924
FAIL: mode=PIO addr=0x6208 sample=0x0000000c word=msw exp=0x9924 act=0x8924 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000005, nPort 0 MSW, exp:0x2492 nActual:0x3492
FAIL: mode=PIO addr=0x6208 sample=0x00000014 word=msw exp=0x2492 act=0x3492 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000007, nPort 0 MSW, exp:0x9249 nActual:0x8249
FAIL: mode=PIO addr=0x6208 sample=0x0000001c word=msw exp=0x9249 act=0x8249 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000008, nPort 0 MSW, exp:0x2492 nActual:0x3492
FAIL: mode=PIO addr=0x6208 sample=0x00000020 word=msw exp=0x2492 act=0x3492 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x00000a, nPort 0 MSW, exp:0x9264 nActual:0x8264
FAIL: mode=PIO addr=0x6208 sample=0x00000028 word=msw exp=0x9264 act=0x8264 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x00000b, nPort 0 MSW, exp:0x2649 nActual:0x3649
FAIL: mode=PIO addr=0x6208 sample=0x0000002c word=msw exp=0x2649 act=0x3649 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x00000e, nPort 0 MSW, exp:0x9249 nActual:0x8249
FAIL: mode=PIO addr=0x6208 sample=0x00000038 word=msw exp=0x9249 act=0x8249 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x00000f, nPort 0 MSW, exp:0x2492 nActual:0x3492
FAIL: mode=PIO addr=0x6208 sample=0x0000003c word=msw exp=0x2492 act=0x3492 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000011, nPort 0 MSW, exp:0x9249 nActual:0x8249
FAIL: mode=PIO addr=0x6208 sample=0x00000044 word=msw exp=0x9249 act=0x8249 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000012, nPort 0 MSW, exp:0x2499 nActual:0x3499
FAIL: mode=PIO addr=0x6208 sample=0x00000048 word=msw exp=0x2499 act=0x3499 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000014, nPort 0 MSW, exp:0x9924 nActual:0x8924
FAIL: mode=PIO addr=0x6208 sample=0x00000050 word=msw exp=0x9924 act=0x8924 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000016, nPort 0 MSW, exp:0x2492 nActual:0x3492
FAIL: mode=PIO addr=0x6208 sample=0x00000058 word=msw exp=0x2492 act=0x3492 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000018, nPort 0 MSW, exp:0x9249 nActual:0x8249
FAIL: mode=PIO addr=0x6208 sample=0x00000060 word=msw exp=0x9249 act=0x8249 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000019, nPort 0 MSW, exp:0x2492 nActual:0x3492
FAIL: mode=PIO addr=0x6208 sample=0x00000064 word=msw exp=0x2492 act=0x3492 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x00001b, nPort 0 MSW, exp:0x9264 nActual:0x8264
FAIL: mode=PIO addr=0x6208 sample=0x0000006c word=msw exp=0x9264 act=0x8264 buf=0x00000000
> Slot A, Chip 0: PSYNC with Chip 9 master Test Failed!
Slot A, Chip 0: Bad RAMs: U42Bad Data: 0x1000
TEST 6: PSYNC B routed to all chips...
Slot A, Chip 0, RAM U42: MAC:0x000000, nPort 0 MSW, exp:0x9249 nActual:0x8249
FAIL: mode=PIO addr=0x6208 sample=0x00000000 word=msw exp=0x9249 act=0x8249 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000001, nPort 0 MSW, exp:0x2499 nActual:0x3499
FAIL: mode=PIO addr=0x6208 sample=0x00000004 word=msw exp=0x2499 act=0x3499 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000003, nPort 0 MSW, exp:0x9924 nActual:0x8924
FAIL: mode=PIO addr=0x6208 sample=0x0000000c word=msw exp=0x9924 act=0x8924 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000005, nPort 0 MSW, exp:0x2492 nActual:0x3492
FAIL: mode=PIO addr=0x6208 sample=0x00000014 word=msw exp=0x2492 act=0x3492 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000007, nPort 0 MSW, exp:0x9249 nActual:0x8249
FAIL: mode=PIO addr=0x6208 sample=0x0000001c word=msw exp=0x9249 act=0x8249 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000008, nPort 0 MSW, exp:0x2492 nActual:0x3492
FAIL: mode=PIO addr=0x6208 sample=0x00000020 word=msw exp=0x2492 act=0x3492 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x00000a, nPort 0 MSW, exp:0x9264 nActual:0x8264
FAIL: mode=PIO addr=0x6208 sample=0x00000028 word=msw exp=0x9264 act=0x8264 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x00000b, nPort 0 MSW, exp:0x2649 nActual:0x3649
FAIL: mode=PIO addr=0x6208 sample=0x0000002c word=msw exp=0x2649 act=0x3649 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x00000e, nPort 0 MSW, exp:0x9249 nActual:0x8249
FAIL: mode=PIO addr=0x6208 sample=0x00000038 word=msw exp=0x9249 act=0x8249 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x00000f, nPort 0 MSW, exp:0x2492 nActual:0x3492
FAIL: mode=PIO addr=0x6208 sample=0x0000003c word=msw exp=0x2492 act=0x3492 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000011, nPort 0 MSW, exp:0x9249 nActual:0x8249
FAIL: mode=PIO addr=0x6208 sample=0x00000044 word=msw exp=0x9249 act=0x8249 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000012, nPort 0 MSW, exp:0x2499 nActual:0x3499
FAIL: mode=PIO addr=0x6208 sample=0x00000048 word=msw exp=0x2499 act=0x3499 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000014, nPort 0 MSW, exp:0x9924 nActual:0x8924
FAIL: mode=PIO addr=0x6208 sample=0x00000050 word=msw exp=0x9924 act=0x8924 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000016, nPort 0 MSW, exp:0x2492 nActual:0x3492
FAIL: mode=PIO addr=0x6208 sample=0x00000058 word=msw exp=0x2492 act=0x3492 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000018, nPort 0 MSW, exp:0x9249 nActual:0x8249
FAIL: mode=PIO addr=0x6208 sample=0x00000060 word=msw exp=0x9249 act=0x8249 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000019, nPort 0 MSW, exp:0x2492 nActual:0x3492
FAIL: mode=PIO addr=0x6208 sample=0x00000064 word=msw exp=0x2492 act=0x3492 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x00001b, nPort 0 MSW, exp:0x9264 nActual:0x8264
FAIL: mode=PIO addr=0x6208 sample=0x0000006c word=msw exp=0x9264 act=0x8264 buf=0x00000000
> Slot A, Chip 0: PSYNC with Chip 8 master Test Failed!
Slot A, Chip 0: Bad RAMs: U42Bad Data: 0x1000
TEST 7: Each PSYNC routed to half the chips...
Slot A, Chip 0, RAM U42: MAC:0x000000, nPort 0 MSW, exp:0x9249 nActual:0x8249
FAIL: mode=PIO addr=0x6208 sample=0x00000000 word=msw exp=0x9249 act=0x8249 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000001, nPort 0 MSW, exp:0x2499 nActual:0x3499
FAIL: mode=PIO addr=0x6208 sample=0x00000004 word=msw exp=0x2499 act=0x3499 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000003, nPort 0 MSW, exp:0x9924 nActual:0x8924
FAIL: mode=PIO addr=0x6208 sample=0x0000000c word=msw exp=0x9924 act=0x8924 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000005, nPort 0 MSW, exp:0x2492 nActual:0x3492
FAIL: mode=PIO addr=0x6208 sample=0x00000014 word=msw exp=0x2492 act=0x3492 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000007, nPort 0 MSW, exp:0x9249 nActual:0x8249
FAIL: mode=PIO addr=0x6208 sample=0x0000001c word=msw exp=0x9249 act=0x8249 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000008, nPort 0 MSW, exp:0x2492 nActual:0x3492
FAIL: mode=PIO addr=0x6208 sample=0x00000020 word=msw exp=0x2492 act=0x3492 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x00000a, nPort 0 MSW, exp:0x9264 nActual:0x8264
FAIL: mode=PIO addr=0x6208 sample=0x00000028 word=msw exp=0x9264 act=0x8264 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x00000b, nPort 0 MSW, exp:0x2649 nActual:0x3649
FAIL: mode=PIO addr=0x6208 sample=0x0000002c word=msw exp=0x2649 act=0x3649 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x00000e, nPort 0 MSW, exp:0x9249 nActual:0x8249
FAIL: mode=PIO addr=0x6208 sample=0x00000038 word=msw exp=0x9249 act=0x8249 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x00000f, nPort 0 MSW, exp:0x2492 nActual:0x3492
FAIL: mode=PIO addr=0x6208 sample=0x0000003c word=msw exp=0x2492 act=0x3492 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000011, nPort 0 MSW, exp:0x9249 nActual:0x8249
FAIL: mode=PIO addr=0x6208 sample=0x00000044 word=msw exp=0x9249 act=0x8249 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000012, nPort 0 MSW, exp:0x2499 nActual:0x3499
FAIL: mode=PIO addr=0x6208 sample=0x00000048 word=msw exp=0x2499 act=0x3499 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000014, nPort 0 MSW, exp:0x9924 nActual:0x8924
FAIL: mode=PIO addr=0x6208 sample=0x00000050 word=msw exp=0x9924 act=0x8924 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000016, nPort 0 MSW, exp:0x2492 nActual:0x3492
FAIL: mode=PIO addr=0x6208 sample=0x00000058 word=msw exp=0x2492 act=0x3492 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000018, nPort 0 MSW, exp:0x9249 nActual:0x8249
FAIL: mode=PIO addr=0x6208 sample=0x00000060 word=msw exp=0x9249 act=0x8249 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x000019, nPort 0 MSW, exp:0x2492 nActual:0x3492
FAIL: mode=PIO addr=0x6208 sample=0x00000064 word=msw exp=0x2492 act=0x3492 buf=0x00000000
Slot A, Chip 0, RAM U42: MAC:0x00001b, nPort 0 MSW, exp:0x9264 nActual:0x8264
FAIL: mode=PIO addr=0x6208 sample=0x0000006c word=msw exp=0x9264 act=0x8264 buf=0x00000000
> Slot A, Chip 0: PSYNC with both masters Test Failed!
Slot A, Chip 0: Bad RAMs: U42Bad Data: 0x1000
...System Clocks (J/K/L/M/Psync) Test ended. Result: Failed***
...16911A Logic Analyzer(A) ended. Result: Failed***
____ ALL OTHER TESTS PASS ____
This seems to be the place to discuss corrosion troubleshooting/repair for these boards, so here goes mine -
I've got a 16750B that had some corrosion (I removed the runners and cleaned everything up), and was failing quite a few self tests (Analyzer Chip Memory Bus Test, System Clocks Test, Analyzer Memory Bus SU/H Measure, Comparators Test, Zoom Acquisition Test, and Zoom Chip Select Test). I repaired about a dozen corroded traces, and have everything passing except the Zoom Acquisition Test, and Zoom Chip Select Test.
Does anyone have thoughts on Zoom failures? Comparing the non-Zoom 16715 to the boards with Zoom, I think the Zoom circuitry is the 5x 1NB4-5040 chips, and a couple other chips nearby. I've inspected the areas around there very closely for corrosion under the microscope, as well as checked continuity anywhere I've seen anything suspicious looking... but haven't found anything.
Below is the output from pv (d=9, r=9). It looks similar to the failure from this thread:
https://www.eevblog.com/forum/testgear/agilent-16717a-comparator-and-zoomchipseltest-failures/ , though I'm not sure that was ever resolved. From reading the log, it looks like maybe FISO #0 is working, but #1-#4 aren't (there's at least one FISO failed message for each, except #0). The 0x8088, 0x888, and 0x808 regardless of expected data sorta gives me the feeling of a floating bus, like the chip isn't getting selected (especially since it's failing the chip select test).
I'm guessing nobody knows which pin is the chip select, or where it comes from, right?
I guess if everything except Zoom works on this board, that'd still be usable... but of course I'd rather fix it if I can.
pv> x zoomAcqTest
Slot A: FISO 4 - Data Bits Stuck HIGH: 0xf7
> Slot A: Zoom Acquisition Data Lines Test Failed!
Slot A: FISO 3 - Data Bits Stuck LOW: 0xf3
Slot A: FISO 3 - Data Bits Stuck HIGH: 0xf7
Slot A: FISO 2 - Data Bits Stuck HIGH: 0xf7
Slot A: FISO 1 - Data Bits Stuck LOW: 0xf7
Slot A: Chip9: edgeCount=1623, exp=811
> Slot A: Chip9: Zoom Acquisition Data Frequency Test Failed!
Slot A: Chip8: edgeCount=0, exp=811
> Slot A: Chip8: Zoom Acquisition Data Frequency Test Failed!
Mod A: TEST FAILED # "zoomAcqTest" (4, 4, -1)
pv> x zoomChipSelTest
Slot A: Filling FISOs for Pods #1 with zeroes...
Slot A: Checking FISO #4...
Slot A: Checking FISO #3...
Slot A: Checking FISO #2...
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Actual = 0x8808, Expected = 0xadff
Slot A: FISO #2 failed.
Slot A: Checking FISO #1...
Slot A: Checking FISO #0...
Slot A: Filling FISOs for Pods #2 with zeroes...
Slot A: Checking FISO #4...
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Actual = 0x888, Expected = 0xffff
Slot A: FISO #4 failed.
Slot A: Checking FISO #3...
Slot A: Checking FISO #2...
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Actual = 0x8808, Expected = 0xdaff
Slot A: FISO #2 failed.
Slot A: Checking FISO #1...
Slot A: Checking FISO #0...
Slot A: Filling FISOs for Pods #3 with zeroes...
Slot A: Checking FISO #4...
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Actual = 0x888, Expected = 0x5aad
Slot A: FISO #4 failed.
Slot A: Checking FISO #3...
Slot A: Checking FISO #2...
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Actual = 0x8808, Expected = 0xffad
Slot A: FISO #2 failed.
Slot A: Checking FISO #1...
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Slot A: FISO #1 failed.
Slot A: Checking FISO #0...
Slot A: Filling FISOs for Pods #4 with zeroes...
Slot A: Checking FISO #4...
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Actual = 0x888, Expected = 0xadda
Slot A: FISO #4 failed.
Slot A: Checking FISO #3...
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Actual = 0x808, Expected = 0xad5a
Slot A: FISO #3 failed.
Slot A: Checking FISO #2...
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Actual = 0x8808, Expected = 0xff5a
Slot A: FISO #2 failed.
Slot A: Checking FISO #1...
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Actual = 0x808, Expected = 0xffff
Slot A: FISO #1 failed.
Slot A: Checking FISO #0...
> Slot A: Zoom Acquisition Chip Select Test Failed!
Mod A: TEST FAILED # "zoomChipSelTest" (1, 1, -1)
I also have a 16533A that sometimes passes some or all tests, and sometimes fails some or all tests. I pulled the runners, though didn't see any corrosion that looked like it needed repair. I haven't dug into this one at all yet (plan to double-check for corrosion), but if anyone's got tips to check for this one, I'd appreciate it as well.
Thanks,
DogP
...
I'm guessing nobody knows which pin is the chip select, or where it comes from, right?
...
Well, I have a good guess.
From some troubleshooting I did on these boards a couple of years ago, it appears that pin 43 is the chip select on the 1NB4-5040 zoom chips (U27 U34 U42 U49 U55). They go to the Altera FLEX FPGA (U26) near the backplane connector:
Pin 43 (CS) U26 pin
----------- -------
U27 138
U34 136
U42 137
U49 10
U55 95
Since FISO 0 is the only one passing the test, perhaps its CS is floating and it's not getting off the bus while the other chips are being accessed. I don't know which of the zoom chips is FISO 0, though.
If it's of any use, the data bus pins on the 1NB4-5040 appear to be 46, 48, 51, 53, 55, 57, 60, and 62. But there's no other clues on that bus to be able to guess at the D7:D0 labels.
Another thing you could do is set up a script to loop the zoomChipSelTest in pv and watch the various pins on the zoom chips with a scope and compare between chips, or if you have it, with another card that's working (or at least passes that test).
While looping tests, another trick is to perturb various signals with a 50R or 22R resistor to ground (use whatever value clearly causes a logic low). This technique can help sort out what's working and can be used to identify data bit positions by watching the effect on the detailed debug output.
I would also check that the two regulators near the pod connectors, U20 and U21, are putting out the right voltages. They are not present on 16715A cards which do not have zoom feature, so they have something to do with the zoom chips that get populated.
To save you from unsoldering the heatsinks, U20 is an LM2991S and U21 is an LT1086CM. U20 should have -1.8V on its output, and U21 should have +3.3V on its output.
While I'm at it, the other mystery chip associated with the zoom feature, 1821-4731 (near U27, I don't see a U designation), appears to be a differential clock distribution driver. When you gang these boards together, this chip on the master board becomes the master clock for all the zoom chips on the other boards.
A hint on probing: I believe (but can't prove) all signals are accessible somewhere on the bottom of the board on round pads domed with solder. You'll see a lot of vias from the top that go underneath just to connect to a probe pad. Nice touch by HP/Agilent. It makes it easier to turn the whole chassis over, take the bottom off, and probe these cards from the bottom. Maybe they were for automated testing.
If you probe from the top, all the TPxx hooks soldered into the board are GND for convenience.
I also have a 16533A that sometimes passes some or all tests, and sometimes fails some or all tests. I pulled the runners, though didn't see any corrosion that looked like it needed repair. I haven't dug into this one at all yet (plan to double-check for corrosion), but if anyone's got tips to check for this one, I'd appreciate it as well.
Like the above, I would check ALL the regulator outputs. The output voltages are labeled near the regulators. I've had more than one 16533A/16534A with way out of spec voltages because of resistors in the regulator's feedback network that had gone bad. In a couple of cases it caused erratic behavior (like would pass calibration only some of the time).
Ok, we've got two things going here... First the 16533A.
But pre-first, a few general comments:
- If you haven't done so already, I'd strongly recommend reading the Theory section in the Service Guide for the cards you're trying to fix. I've found they're very accurate and must have been written by the hardware and software developers. It's the only service info us mere mortals have, so every little detail can be (and usually is) important.
- And along with that, read the Self-Tests Description. Like the Theory section, every word can be valuable when trying to decipher the debug output.
- When running pv, I've found that it's almost always the case that the first thing that fails is the thing that has to be fixed first. pv doesn't understand failure dependencies, and it will try to use a failed sub-system to do further validation, which in all likelihood will cause those subsequent tests to also fail. I'm not saying to ignore the subsequent failure output, but take it with a grain of salt and scan the output for further clues regarding the first failure.
Ok, now back to the 16533A. I would focus first on the DAC. Those regulator voltages look ok to me.
I agree that for the scope cards the pv output and the DebugScope output are fairly worthless. There's some tantalizing strings to be found in the 16533A/16534A pv driver (different that the operational driver) that implies there's more debugging to be had. I can't figure out how to access it. (Anyone up for some assembly-level reverse engineering? DDE is provided on the system.)
If the scope card will run enough to give you a trace or at least let you onto the configuration screen, you can start to experiment with the DAC. Move the trigger up and down and the trace offset up and down (even if the trace is off the screen). Watch the trigger and offset DAC outputs to see if it's responding.
The DAC is U200, HP part 1SJ2-0102, a 24-pin narrow DIP. I have figured out this much:
Pin 16533A/16534A Function
--------- ----------------------
1 CH13 Ch2 Trigger Level
2 CH14 Ch1 Trigger Level
3 CH15
4 DIN
5 DCLK
6 DGND
7 DVDD 5V
8 DAC_CLK 19.66080MHz
9 DL_EN
10 CH0 Ch1 Offset
11 CH1 Ch2 Offset
12 CH2
13 CH3
14 CH4
15 CH5 "Startable Oscillator"?
16 CH6
17 CH7
18 AVDD +5.000V
19 AGND
20 CH8 DC Cal
21 CH9 ? (is either 0V or 5V)
22 CH10
23 CH11
24 CH12
It's a PWM DAC, so you won't see a nice analog voltage on the output pins unless you have a DMM with a good filter. The 3478A is in that category. If a DMM doesn't work for you, you can look with a scope, or you can reverse-engineer the PWM filter on the output and look at the voltage after the filter.
pv moves around the DAC output voltages to force triggers, so if the DAC is failing, this is a good example of why subsequent tests will also fail.
There's more than anyone will want to know about this DAC in the Feb 1992 HP Journal, page 48:
http://hparchive.com/hp_journalsThere's also a CLIP for the 546xxA digital scopes which use the DAC. The schematic could be helpful. This particular site looks a dubious, but you can search around for the file name for other locations:
http://bee.mif.pg.gda.pl/ciasteczkowypotwor/HP/546XXA_CLIP_Package.zipI've encountered bad resistors in the DAC area. Alexandre Souza did a nice blog on one particular resistor that has been reported as bad 4 times:
https://tabajara-labs.blogspot.com/2019/05/repair-of-hp16533a-and-for-that-matter.htmlDid you try a calibration? It will fail, but it goes through different steps and puts a lot more info in the DebugScope directory if you have it enabled. Maybe there's some clues lurking there with what fails or what it puts in the debug files.
I never got around to making the angle adapter. I kept finding ways to troubleshoot cards from the underside. I thought I could find a 0.1" male angle header with long enough pins but I couldn't. It's going to need a short PCB and I got lazy.
It looks like you still have copper on those vias. They're probably ok but we can get back to them. The first is in the timebase area and the other next to an ADC. They shouldn't affect the operation of the DAC.
Ah, it's good that you at least have traces on the screen. The waveform capture and the signal path to the ADCs is working. That side of things is a real bear to troubleshoot.
Does the offset control move the traces around? The fact that the traces are somewhat near the middle of the screen would imply the offset might be working.
My initial guess is that there's a problem with the trigger level.
Will it trigger on the other channel? Probably not, based on the calibration output. If not, we're probably looking at something in the DAC area that's common to both channels.
Can you get it to trigger by giving it a very large signal that's way off the screen? Can you get it to trigger by moving the trigger control to the + and - extremes?
One thing you can do is look at the trigger level input to the analog trigger chip/section. There are at least 3 versions of these boards. Some have the analog trigger implemented with discrete ECL. Can you post a picture of the top of your board?
Although better to probe the trigger level at the analog trigger section, you can also probe the trigger level in the DAC area. Attached is a photo of the probe locations. Do the trigger voltage levels change when you move the trigger control knob/menu?
Here are my notes from one particular card. Your values are going to be a little different and depend on the stored calibration values. It's probably obvious, but the scope must be running (acquiring) for it to update the DAC with any new trigger and offset values as you are changing them.
Trigger position outputs from DAC area
Condition Ch1/Ch2: Offset = 0.000V, 1.0V/div
Trigger Level Ch1 (V) Ch2 (V)
----------------------- ------- -------
Top graticule (+4.0v) +0.297 +0.265
Center graticule (0.0V) +0.055 +0.027
Bottom graticule (-4.0v) -0.187 -0.211
Offset position outputs from DAC area
Condition Ch1/Ch2: Trigger = 0.000V, 1.0V/div
Offset Level Ch1 (V) Ch2 (V)
----------------------- ------- -------
Top graticule (-4.0v) -0.177 -0.173
Center graticule (0.0V) -0.032 -0.026
Bottom graticule (+4.0v) +0.114 +0.121
Here's a good calibration from logictrig.file, if it helps:
freq = 9.99985e+07, startable osc DAC = 7000
Max Delay: No Trigger found
Min Delay, Rising Edge: Yes Trigger found
DurationCount = 1 DurationClock = 1
DurationCount = 1 DurationClock = 0
DurationCount = 0 DurationClock = 1
DurationCount = 0 DurationClock = 0
DurationCount = -1 DurationClock = 1
Delay Adjust = 31
Delay Adjust = 15
Delay Adjust = 23
Delay Adjust = 19
Delay Adjust = 21
Delay Adjust = 22
DelayAdj = 22 DurationCount = -1 DurationClock = 1
I've attached all the files from a good calibration from two cards. I'll take a look through your files and post again if I see anything that might help.
There's a lot of opamps in the DAC section. One quick troubleshooting method is to get the pinout for each opamp and compare the inverting and non-inverting inputs. The difference should be 0V. This is a good first pass that can catch failing feedback networks, assuming none of them are being used as comparators which I haven't found to be the case (at least yet).
Another thing to check is the DC Cal output. You can set the BNC to any voltage from 0 to +5.000V. Try some different voltages and makes sure it works.
...
Based on the frequency mentioned, I assume this is the 100 MHz oscillator referred to in the theory of operation? I see your DAC notes say CH5 goes to the "Startable Oscillator", so I think you're right that I need to start by looking at the DAC. It sounds like the sample clock comes from the 100 MHz oscillator, so I'd expect that the oscillator itself is working.
To this day I'm still not sure what's meant by "Startable Oscillator", but you can certainly check the sample clock by setting up scope debug mode and then in the Calibration window new choices appear for the BNC output. One of them is the 100MHz sample clock. But given that you see waveforms, I think it's ok.
I think the first priority is to verify the trigger levels from the DAC.