With you up to here. I thought "at some point the memory wouldn't be large enough" is every time sample rate is reduced. Going back and looking at one of the examples you posted, the scope is sampling at 200kSa/s because the memory depth is set to 14kpt and the timebase is 5ms. There's no room to increase the sample rate there, so that couldn't be a fix to that particular aliasing.
What's an example where it could still sample at 2GSa/s into sample memory that it isn't doing that already?
A little Tip for Math function Intg()
When using an input from a Chan and the Scan rate is in mSec, then multiply the input by 1000, that way the Units calculated will be in U, see the display
For a square wave input of -1.0 to 1.0 Vdc at 4mSec period
So integrating (+1.0 *1000) for 2 mSec = +2 Units
So integrating (-1.0 *1000) for 2 mSec = -2 Units
ANYTIME up to 2ms/div it's not sampling at 2GSa/s, it could be - if it didn't use FIXED sample sizes.
So by that reasoning, the DS2000 already does anti-aliasing: Select the maximum memory depth and turn on anti-aliasing. But you haven't been satisfied by that "anti-aliasing" in the rest of this thread.
The Rigol does NOT have to do this during sampling; it could sample at full speed (2GSa/s) into sample memory - then do random decimation (to simulate the current sampling rate) to display memory
...
ANYTIME up to 2ms/div it's not sampling at 2GSa/s, it could be - if it didn't use FIXED sample sizes. (with chart that can be recomputed with simple math.)
QuoteThe Rigol does NOT have to do this during sampling; it could sample at full speed (2GSa/s) into sample memory - then do random decimation (to simulate the current sampling rate) to display memoryI translate that into:
1) Sample into sample buffer at the fastest rate memory depth + time base allows (up to 2GSa/s, ofc)
2) decimate to screen
The Rigol does that now. And we agree it doesn't fix acquisition aliasing. So that leaves me suspecting I'm missing something in your description of what you'd like the Rigol to do.
My confusion is with your claim that the Rigol could theoretically anti-alias without doing the random decimation before storing samples into the waveform. If it can sample fast enough to store that sine wave into sample memory, it already doesn't alias. (If that sine wave is in sample memory, the aliased low frequency sine wave will never be what's on the screen.)
QuoteThe Rigol does NOT have to do this during sampling; it could sample at full speed (2GSa/s) into sample memory - then do random decimation (to simulate the current sampling rate) to display memoryI translate that into:
1) Sample into sample buffer at the fastest rate memory depth + time base allows (up to 2GSa/s, ofc)
2) decimate to screen
The Rigol does that now. And we agree it doesn't fix acquisition aliasing. So that leaves me suspecting I'm missing something in your description of what you'd like the Rigol to do.No, the Rigol doesn't do that now.
It certainly doesn't do RANDOM decimation, and I don't think it does decimation to simulate lower sampling frequencies either.
I've written this all before:
Random decimation (stochastic sampling) is the key to anti-aliasing. Beat frequencies (aliases) are formed by regular time interval sampling.
In the image, the black crosses and dotted line show regular decimation forming an alias frequency of the true frequency. The red crosses and line show irregular (random) decimation NOT forming an alias.
rigol would have to re-architect the entire signal processing chain to do what you show. They would need make sure that the real signals are not affected by your special method and verify that interpolation still works correctly. The cure would be worse than the disease. It's far easier to just use the correct sampling rate (i.e. 2.5x highest frequency component).
I use SDRs daily and haven't heard anyone doing the stochastic sampling. This is not a common technique.
There is a better way to down sample using CIC and FIR decimating filters which take care of aliasing.
What you propose is a gimmick. There is one Agilent paper about it and that's it...
.. and it doesn't even mean they use this for anything but translating sample to display memory...
I use SDRs daily and haven't heard anyone doing the stochastic sampling. This is not a common technique. There is a better way to down sample using CIC and FIR decimating filters which take care of aliasing. What you propose is a gimmick. There is one Agilent paper about it and that's it, and it doesn't even mean they use this for anything but translating sample to display memory...
I found Agilent's Patent for the (original) technique - filed in 1991, and invented by Matthew S. Holcomb of the Hewlett-Packard Company. Pretty interesting... I've attached a few images from the Patent here.
Edit: Here is also another published paper about the technique.
From the paper:
"Instead of storing every Nth digitized point, the decimator can be designed to randomly select one out of every N points for storage. In the case of the 10.01-MHz input, the points placed in memory are points randomly selected from the ten cycles of the input that occur in every 1-s interval. This random sample selection technique effectively dithers the acquisition clock during the acquisition and prevents a beat frequency from developing.
This intra-acquisition dithering technique has been used throughout the HP546XX oscilloscope product line and again in the HP54645A/D products. The effect it has on aliasing is dramatic. Fig. 7a shows the aliased 10-kHz sine wave that is produced when a 10.01-MHz sine wave is sampled at 1 MSa/s. Fig. 7b shows the same display using the dithering process just described. The resulting display is a fuzzy band much like what would be seem on an analog oscilloscope, with all signs of an aliased waveform removed."
Edit2 @zibadun: So... still think 'my special method' is a gimmick? Apparently, it works quite well eliminating aliases, doesn't affect interpolation, and the reason there isn't lots of information about it in DSO literature is because HP patented it and Agilent doesn't seem to want to talk about it - instead using terminology like the following from the 5000/6000/7000 Series Oscilloscopes User’s Guide:
"At slower sweep speeds, the sample rate is reduced and a proprietary display algorithm is used to minimize the likelihood of aliasing."
Good research, marmad. So if Rigol does this they would need a license from hp/Agilent?
high performance FPGAs were not so common in 91 so may be this was the best hp could do. Time to move on?
( @Marmad, in RUU, if there is a space(s) behind the TCPIP srting, it wont connect )
( @Marmad, in RUU, if there is a space(s) behind the TCPIP srting, it wont connect )
There shouldn't be - the last that I heard about it was that it was working over LAN.
But with that extra space it cannot connect. maybe you can remove spaces.
@ Teneyes, dont use rectangle, use a window, as Hanning or Blackman