Ok, further digging and a series of fortuitously timed posts by a few people led to further useful info about Supermicro A1SAi/A1SRi boards, and likely other vendors' board too:
Well, the gist of it is that there are two clock lines, one feeds the TPM header and is involved in the boot ROM selection; the other runs to the BMC. This is why fixing the boot failures often still left the BMC unresponsive to the LPC bus, it just wasn't getting any clocks.
Supermicro's fix for this is a pair of 150 Ohm bodge resistors, one to pull up each of these two clock lines to 3.3 V. The fix is actually pretty neat on these boards and could pass casual inspection, depending on how well the soldering turns out.