RISC-V Summit 2019

[kfnight]

Who's going to be at the RISC-V Summit next week in Santa Clara?

 

[brucehoult]

Yup :-)

[kfnight]

That goes without saying.

[brucehoult]

Well, of course some of our top people will be there giving presentations, but not the entire staff :-)

[I wanted a rude username]

Will the revolution be televised on the RISC-V YouTube channel?

[kfnight]

Yes but it's usually a few weeks after the conference has concluded.

[[email protected]]

Any new announcements expected?
I am looking forward to more advanced MCUs from there side.

[brucehoult]

Any new announcements expected?

No doubt  :-)

Some have already been made. See recent stories on https://www.reddit.com/r/RISCV/. There have been announcements from Think Silicon, De-RISC, Andes, IAR about things they will have on display at the Summit.

I am looking forward to more advanced MCUs from there side.

Who is "their"? The conference is run by the RISC-V Foundation, who don't do anything except publish the standards documents, test for compliance with them (not fully up and running yet), and organize working groups of delegates from the members to develop extensions to the standard. And organize conferences :-)

Actual hardware such as MCUs are design and made by the several hundred organizations that are members of the Foundation, just as actual chips containing ARM CPU cores are made by their 1500 or so licensees, not by ARM themselves.

https://riscv.org/members-at-a-glance/

In both cases, of course, some members or licensees are more active or more visible than others.

[brucehoult]

I'll note that Microchip are a founding platinum member and Espressif are a founding gold member of the RISC-V foundation, so I'd on general principles imagine they'll release products based on RISC-V sooner rather than later if they see some advantage to it. Replacing MIPS in PIC32 seems like an obvious thing. I imagine the ARM cores they got with Atmel are a lot safer.

I know people generally hold the peripherals and documentation of Microchip MCUs in high regard, so I expect that wouldn't change if they got a core-ectomy.

*This* year? No clue...

[donotdespisethesnake]

Given Microchip's negative approach to Open Source, I guess the advantage for them will be to produce customised instruction sets so they can lock you into using their (non-free) compilers.

I expect there are other companies looking to do the same. It's ironic to use Open Source tools to create closed products, but there is already precedent for it even with GPL v2.

[brucehoult]

Given Microchip's negative approach to Open Source, I guess the advantage for them will be to produce customised instruction sets so they can lock you into using their (non-free) compilers.

I can't see how that makes any sense.

First, adding a few custom instructions to a standard ISA doesn't prevent people from sticking to the standard instructions. It's also likely to be easy to add support for the custom instructions to the existing open gcc and llvm compilers, if they are actually vital to efficient programming. Or even simply create a small library of functions that use the inline assembler to create the custom instructions.

This is a completely different situation than using a completely custom ISA that is very different to anyone else's.

Second, I'm sure Microchip makes a heck of a lot more money from selling chips than they do from selling compilers, so it's to their advantage to make the compilers free or as cheap as possible. Maybe they feel they have to recover costs, and when they have their own weird ISA those costs are quite high. If they're using a standard ISA with standard compilers then their costs are much much lower.

[kfnight]

So it looks like, starting in 2020, the proceedings and materials of the RISC-V working groups will be made viewable to the public at large! Pretty kewl, and consistent with being an open source ISA.