De-capping & circuit analysis of hybrid modules

[D Straney]

Oh that's interesting, glad you recognized "LMT" as a company name.  In that case, it makes me wonder if the TRT hybrids were also from large-scale-communications (phone, etc.) applications?  That document on TRT's background (interesting read by the way, thanks!) mentioned their thermal imaging business, but haven't seen anything about whether or not they had non-military projects: the "telephone, radio, & telegraph" name at least suggests communications as well.

If all these TRT & LMT hybrids were from phone exchanges or other utility-scale telecom applications, maybe acquired in a single surplus batch by the distributor that sold them to me, that would explain a lot of the design choices too.  Telecom equipment would be less sensitive to environment (unless it's sitting up on a cell or radio tower!) but would have similar long-life & reliability requirements, and a similarly conservative design philosophy.

[D Straney]

That's all for my Polish batch of French hybrids (thanks to timeandfrequency for providing background on those); now here's something a little more standard.
Burr-Brown ADC84KG 12-bit ADC


There's a few dies in here, but it's hard to tell how they're connected with multiple wiring layers buried in ceramic.  It's mostly made up of a few ICs though, so let's see if we can figure out how it works by looking at those...

The big rectangular one looks like a DAC:

Notice the row of 12 dark-pink resistors near the top-right corner - these have laser-trimming marks (in green).  There's another smaller resistor array arranged as a column with 6 rows, near the bottom-center, plus a chunk of unused circuitry (no metal layer) just to the bottom-left of center - a lot more resistors too.  The simplicity of the remaining circuitry (few transistors) and the number of precision resistors, especially in regular arrays, is what strongly suggests to me that this is a DAC.  The arrangement doesn't seem quite right for a R-2R ladder, but I'm not familiar enough with the details of other integrated-DAC schemes to guess at exactly what it's doing.  It's probably some kind of segmented DAC, with multiple resistor ladders to handle different parts of the output range.

Having a DAC makes sense so far, though.  The most popular way to create an ADC with more than a few bits is by Successive Approximation: essentially, you guess a number, convert it to an analog voltage, look at whether it's larger or smaller than your input, and then refine your guess upwards or downwards based on that.  The digital logic is a bit complicated, but it can be efficient if you approach it as a binary search.

The big square die is a digital gate array:

This would be the logic that controls the successive approximation process.  You can see that the IC itself is made by AMI (Burr-Brown probably didn't want to bother with non-analog IC processes), and there's some interesting test pads in the top-left corner for characterizing some simple silicon structures.

A successive approximation DAC needs a comparator, however, to compare the input signal against each "guess" in analog form from the DAC.  That seems to be the purpose of one of the smaller dies, an LT119 comparator.

It has a fast propagation delay (compared to the "jellybean" parts like the LM339, at least) of 80 ns, which makes sense as the ADC is going to make ~12 comparisons for each conversion, so the comparator can easily be a limiting factor in the conversion rate.

The final IC is what looks like a single op-amp, made by PMI (Precision Monolithics Inc.):

I may have developed the op-amp version of pareidolia after looking at a lot of die photos...but the bond pad arrangement does actually match the standard single-op-amp pinout if the big structure on the right-hand side is the input differential pair.

There's lots of potential uses for an op-amp inside an ADC, but if we cheat and look at the ADC84KG's datasheet, it shows an uncommitted op-amp to be used for input buffering - which is probably this IC right here.  The block diagram also confirms that it uses successive approximation.

The datasheet also mentions some thin-film trimmed resistor networks, as general-purpose "building blocks" to be used externally if you want to add attenuation or gain to your input signal.  These are the 3 small squares with S-shaped patterns in the overview photo above.  Here's one of them up-close, so you can see the laser-trimming marks:

(This is among the least photogenic of the wirebonded resistors that I've seen under the microscope; I've got an album full of more interesting-looking ones).

There's also a few discrete semiconductors: a couple diodes, and a transistor.  This is the transistor, which is an N-channel MOSFET (Calogic SD211):

[5U4GB]

Indeed, this 'TRT 3511.150.13441' module looks rather basic. All of the use cases you suggested are plausible.
I have no clues why they put such a simple circuit inside an hybrid module.
Reliability purpose ? Security reasons to hinder retro-engineering and/or duplication ?

You missed one other possible reason: Being able to charge $1,000 each for a bunch of TL072's and some passives.

[magic]

The final IC is what looks like a single op-amp, made by PMI (Precision Monolithics Inc.):

I may have developed the op-amp version of pareidolia after looking at a lot of die photos...but the bond pad arrangement does actually match the standard single-op-amp pinout if the big structure on the right-hand side is the input differential pair.

Looks like some "improved LF156", you would have to search PMI databooks for candidates. Offset adjustment on pins 1, 5 and zener trimmed internally. Probably with gate leakage cancellation trick (a dummy JFET whose gate current is mirrored into input pins), I recall that somebody was making JFET opamps like that but I don't remember those type numbers.

[D Straney]

Oh that's an interesting scheme!  Yeah I found a databook with rough die photos at bitsavers but 1986 was the latest they had, and with the 1987 date on the die didn't want to draw any hasty conclusions.

[David Hess]

Indeed, this 'TRT 3511.150.13441' module looks rather basic. All of the use cases you suggested are plausible.
I have no clues why they put such a simple circuit inside an hybrid module.
Reliability purpose ? Security reasons to hinder retro-engineering and/or duplication ?

You missed one other possible reason: Being able to charge $1,000 each for a bunch of TL072's and some passives.

If reliability in a harsh environment is a requirement, then hybrid construction is likely less expensive than printed circuit board construction, especially if you already have the infrastructure to manufacturer hybrids.

Looks like some "improved LF156", you would have to search PMI databooks for candidates. Offset adjustment on pins 1, 5 and zener trimmed internally. Probably with gate leakage cancellation trick (a dummy JFET whose gate current is mirrored into input pins), I recall that somebody was making JFET opamps like that but I don't remember those type numbers.

I have seen old JFET designs which have input bias current compensation.  I think it was only used where the JFETs had high input bias current to start with.  PMI did it with their OP-15/OP-16/OP-17, which are their improved LF155/LF156/LF157 series.  I thought I remembered another example but a quick search did not find it.

[D Straney]

MPC-Woodward HM41200206A Motor Driver
(Thanks to Evilmonkeyz for this one)

The thick leads, "BeO" warning on the lid (beryllium oxide, toxic as dust but used for its high thermal conductivity), and the "driver hybrid" label suggest some power handling here.  Let's take a look inside:


There's a lot going on in here, so it's easier to understand with the ICs labeled:

The layout of the 6 power transistors strongly suggests a triple half-bridge used as a 3-phase inverter.

UC1637

This is similar to the other Unitrode UCx84x-series switch-mode power supply control ICs, in that it provides the building blocks for PWM and a control loop.  However, the datasheet specifically lists this as meant for motor control.  That makes sense with the 3-phase inverter arrangement of power transistors - I can't see an application where this hybrid would be feeding a 3-phase grid connection, for example, but a motor driver sounds plausible.

Mystery IC

The UC1637 can only produce 1 PWM signal, but you need 3 phase-shifted PWM signals for driving a 3-phase inverter.  This mystery chip seems to provide the "glue" in between the UC1637 and the power transistors, judging by both its contents and external connections.

To translate a single-phase PWM signal into 3x PWM signals, phase-shifted by 120°, requires flip-flops or latches of some kind, to keep track of the current state.  This is likely contained in the top & right-hand edges:

To translate each state into the correct combination of 6 outputs, you need some complicated combinational logic.  One obvious feature on this chip is two matrices just above the center.  It looks like each connection here creates a diode that connects the row to the column, so you'd put your inputs on the rows and get outputs on the columns, or vice versa - a this would be one obvious way to implement the arbitrary state-to-output logic.  You can see here that there's two matrices side-by-side, in two stages of logic: it looks like...

• Inputs come into the columns of the right-hand matrix
• Outputs come from the rows of the right-hand matrix, and into the rows of the left-hand matrix
• Outputs come from the columns of the left-hand matrix, and to the gates of the output transistors we'll discuss next

Finally, you can see 6 large power transistors down the left-hand side of the die.  These are connected externally to the gate drive circuitry for each power MOSFET, and provide the higher-current output needed to drive the discrete gate drivers:


Mystery quad op-amp

Based on the layout, I'm pretty sure this is a quad op-amp.  Each quadrant has 4 transistors arranged in a square, with the diagonal pairs connected in parallel.  This is a scheme used elsewhere on the TL072, TL082, and other op-amps for the input differential pair, to cancel out the effects of thermal gradients across the die that would otherwise produce input offset voltages.

If you look back at the overview above, you can see that this chip is connected (through a few resistors) to the current-sense resistor on the power stage.  So at least one of these op-amps is used for amplifying the current sense signal, and producing something that can be worked with.  I'm not sure what the other 3 op-amps are used for though - maybe there's multiple gain stages, or averaging to provide an "average current" reading, or some offsets applied, or op-amps used as comparators (don't like doing it in my own designs as there's lots of potential pitfalls, but it's come up in other hybrids I've looked at in this thread!).  There's probably an external pin with a current sense signal, that an external computer can use for "motor health" monitoring to read off the current draw.

LM111 comparator

One of the places that the current sense signal likely goes, is to this comparator.  The LM111 is pretty fast (165 ns) so I'm guessing this is used for over-current detection and shutdown - if one of the motor windings or connections develops a short to ground, or a power transistor fails "on", then you want to be able to detect that as soon as possible to shut down the system, and avoid making the situation more unsafe by dumping lots of energy as heat.

LM148 quad op-amp

Here's another quad op-amp, of a pretty generic variety.  I don't know exactly what this is used for; I'd love to trace the exact connections in this hybrid to figure out what all the op-amps are doing, but with multiple layers of traces, it would involve a lot of everything-against-everything continuity checking and be much more trouble than it's worth.  This is a pretty generic op-amp, without particularly low offset or bias currents, particularly high bandwidth, etc.

One possible use for the LM148, and some of the mystery op-amps in the quad IC, is as part of the control loop.  I don't know for sure that this entire system doesn't run open-loop, but the UC1637 has an error amplifier, and is meant to run closed-loop based on some sort of command signal.  The datasheet shows applications circuits both for external speed & position commands, both of which would involve conditioning inputs from external sensors.  It's also possible that it runs in a controlled-torque configuration, adjusting PWM based on the measured average current, and then a second control loop (formed out of the external op-amps) controls the torque setting to achieve an externally-commanded speed or position.

Use case
So that's the contents of this module, but where was it used?  The "19170" on the lid is a CAGE code that belongs to the "MPC Products" division of Woodward.  I hadn't heard of either of these companies before, but if you go back to the 2014 version of mpcproducts.com using The Wayback Machine, it seems that MPC makes electromechanical actuators (rotary and linear motors, gearboxes, etc.) for the aerospace industry including the electronics that drive them:

There's even a section dedicated to hybrid modules, where they show an open hybrid that looks suspiciously similar to this one:

I couldn't find the part number from this hybrid's lid in the databases of any of the second-hand military parts suppliers, so good chance it's commercial.  I think this module is probably part of the motor drive electronics for flap positioning or some other small motion-control function on an airliner.

[D Straney]

Burr-Brown ISO102 Isolation Amplifier

Isolation amplifiers are always interesting to me, as I've needed isolated measurements a lot for power electronics work, and there's heavy tradeoffs between bandwidth, common-mode rejection, and size/complexity/expense.  This is a relatively low-bandwidth part, at ~70 kHz, which uses capacitive isolation.

The right-hand cavity shown above (with one IC) is the input side, and the left-hand cavity (with two ICs) is the output side.  The isolation capacitances are embedded in the ceramic package in between: you can see the two traces from each cavity which run towards the center.  The ISO102 datasheet mentions a spiral structure for the isolation capacitances - this would probably show up nicely on an X-ray image, but currently I have no way of getting you a view of that.

Here's the block diagram from the datasheet, showing the general operating principle:

It uses frequency modulation, as you obviously can't pass a DC signal capacitively.
The input side contains a VCO, whose frequency is changed by the input voltage.  This 1st VCO's output is then transmitted through the isolation capacitors, and to the output side.
The output side, instead of doing a direct frequency-to-voltage conversion, uses an identical 2nd VCO in the path of a feedback loop.  A PLL adjusts the voltage to the 2nd VCO until both frequencies match: the output voltage is then the control voltage to the 2nd VCO, as this will now (theoretically) be the same as the control voltage to the 1st VCO.

This relaxes the linearity requirements on the VCO design, as wrapping it in a feedback loop this way corrects for any systematic weirdness in the VCO's voltage-to-frequency response.  As long as the two VCO behaviors match, they can have whatever bizarrely non-linear voltage-to-frequency curves you want and still work correctly.
This scheme doesn't account for part-to-part variation between the two VCO ICs though.  Other isolation schemes, such as the HCNR201 analog opto-isolator, do similar things by relying on matched components between input and output sides (in the HCNR201's case, the photodiodes are matched and the control loop is on the input side).

So, here's the VCO IC: this is the single die on the input side, and one of the two dies on the output side:

I don't have the time to trace the whole circuit, but you can see a lot of pink resistors with laser-trimming marks.  There's also some large metal areas, some of which are probably the capacitors used for the timing functions.

This is the PLL IC, the second of two dies on the output side:

The resistors are fewer and un-trimmed here (which makes sense, as the VCO is where DC precision matters) and there's some larger capacitors, possibly for the typical PLL charge pump or a loop filter.

[D Straney]

While I figure out the details of some of the more complicated hybrids, here's a quick one that's more about "artistic value" than for interesting circuitry:

Micro Networks MN91410



This has 4 RAM dies inside, along with a 74ACT138 decoder in the center to drive the "chip select" lines based on the upper 2 address bits.




It turned out to be annoyingly difficult to get a good image of a die with repetitive patterns, with the stitching needed, so here's one corner of a memory chip:

[D Straney]

Burr-Brown DAC650 high-speed digital-to-analog converter

This is a 500 Msps DAC: fast even by today's standards, but especially for the early 90's when it was released.

Too fast to be conveniently monolithic like today's high-speed DACs & ADCs:

If we take a look at the datasheet, it explains what's going on.  There's three main dies visible inside:
1. The analog one (larger), with a set of precision current sources and misc. support circuitry such as reference voltage generators.  Everything here is relatively slow, and made on a normal silicon process.
2. The fast digital one (smaller), made on a III-V (GaAs) process - this handles the high-speed ECL data inputs, and performs the high-speed switching of the other die's currents into the outputs.
3. A precision resistor array (green-ish), which has some R-2R ladders & termination resistance for the 50Ω outputs.

The block diagram explains pretty well what's going on:

The differential outputs are handled digitally.  Rather than having both current sources and current sinks to produce the complementary outputs, there are only current sinks lowering the output voltage relative to the +1V reference.  However, there are separate sets of switches for the two outputs, fed with complementary values, so that when more current is sunk from one output less current is sunk from the other output, and vice versa.  Let me know if this doesn't make sense.

The actual digital-to-analog conversion is performed with 3 separate methods.  The datasheet explains that...

• bits 0-2 select 1 at a time of 7 individual current sources (scaled 1x, 2x, 3x, 4x...),
• bits 3-7 turn on and off binary-scaled current sources (scaled 1x, 2x, 4x, 8x, 16x), and
• bits 8-11 turn on and off identical current sources (scaled 1x, 1x, 1x, 1x), which are fed to an R-2R ladder.

Let's look at the analog die first:

You can see a lot of self-contained, repeated blocks in the top half.  A lot of these look like op-amps, with matched diagonal-connected input transistors and large metal areas for compensation capacitances.  There's a couple op-amps in the block diagram above - the others are probably used to set up the current sources.  One or two of the non-op-amp blocks must be voltage references as well.

The current outputs exit along the bottom row of pads, and the bottom half is dedicated to these current sources.  From staring at the image enough, I'm pretty sure that...

• the small blocks along the bottom edge are cascode transistors for the current outputs (for better precision),
• the brown vertical stripes are the matched current-source transistors that generate the many copies of a reference current - you can see their bottom-edge connections (collectors) being fed to the cascode transistors, and they share one common base voltage (highlighted in red below),
• the red vertical stripes are (trimmed, precision) resistors from the emitters of these transistors to ground, to set their currents.

Most of the current-source source transistors seem to have their collectors connected together in small groups, by the thick block of "collector cross-connection" traces.  (One of these traces is highlighted in blue above)  I think one reason is to create x1, x2, x4, x8, etc. copies of currents more precisely: one thing I remember from reading Hans Camenzind's IC design book is that you can get better matching between homogeneous rather than heterogeneous structures.  Cross-connecting transistors on the left side of the die with ones on the right side the way it's done here, rather than only connecting adjacent transistors, also makes it less sensitive to thermal or process gradients across the die - even more relevant when it's a physically large die like this one.

Next, let's look at the digital die:

The digital inputs enter in parallel along the left and bottom-left sides.  There's some latching and decoding of the data, and then the high-speed current switches are the right-most column of transistors.  The DC currents from the analog die enter on the top-edge pads, travel to the current switches on the blue-green traces, and then (mostly) join together at the two big differential-output traces at the right-hand edge.  There are at least 8 outputs which don't join the common output voltages, as bits 8-11 need to join the output via an R-2R ladder.

This R-2R ladder, plus a resistance to convert these currents to an output voltage, can be seen on the resistor array:

Notice how it's symmetric, for the two differential outputs.  The pad in the very middle, and the large square pads in the top-right and bottom-right are ground.  The pads along the left side are the current inputs for bits 8-11, and the light-green blocks between these pads, and between these pads and ground, are the resistors in the R-2R ladder for these top 4 bits.  The resistors extended up and down from the center ground pad are the termination resistors, for a total output impedance of 50Ω.

Here's a zoomed-in view of some of the high-speed digital circuitry:

Here's some extra-zoomed views of the current-switch MESFETs, which have larger and larger groups of devices in parallel as the currents get larger:

[D Straney]

MSK 1875H 4x load driver
I got an interesting scrapped avionics board a while back, with this giant hybrid module (and a spot for a 2nd):



The CAGE code 19623 is for GE Aviation, and the date codes look pretty recent (2020s, if I'm reading them correctly?) but it's all pretty simple stuff, could've been designed 30 years ago for all I know: a couple MOSFETs, some relays & through-hole passives, etc.


Let's open the lid of the hybrid module:

Damn, that's cool.

You can see that there's 4 roughly identical sections, one in each corner.  Each one has a very large power MOSFET, plus a current sense resistor and some diodes.


Looking at the circuitry inside the module in more detail, it also fits the theme of "simple design that could've been done 30 years ago".  The 4 ICs in the common section down the middle are, in order, a CD4001 quad NOR gate, a 74HC03 quad NAND gate (with open-collector outputs), a CD4030B quad XOR gate, and an LM139 quad comparator.





Each of the 4 repeated sections also has an MC14538 dual monostable timer, and a 74ALS00 quad NAND gate, plus a mystery 3-terminal IC - by its connections, I'm 99% sure this is some kind of 5V regulator, a 78L05 equivalent:




Now, what's the actual circuitry doing?

We can see that this is a load driver, meant for turning on and off valves, heavy-duty contactors, fixed-speed DC motors, or other similar things.  Each of the 4 channels has 2 redundant DC power inputs, which are diode-OR'ed together, and then switched by the power MOSFET (Q3).  The power path is highlighted in red.
The only way in which the 4 almost-identical channels differ, is that one of the channels doesn't have the redundant-power diodes.

Basic operation
Each channel is enabled through a combination of 3 NAND gates (U5), with one used as an inverter.  I can't figure out a specific pattern to this, but I assume it provides flexibility similar to the active-high and active-low enable pins on the MC14538, for example.  When the load is supposed to be enabled, the output of U5D goes high, and this turns on Q2, which pulls down the gate of Q3 (P-channel power MOSFET) and turns on the load.

Output state sensing
U4B and associated circuitry senses the output voltage, and provides an "output on" sense.  This gets XOR'ed with the "output enable" signal from U5D by U3C, so that U3C's output goes high when there's a mismatch: the load is turned on when it's not supposed to (power stage has failed short) or the load is turned off when it's not supposed to (shorted output, or power stage has failed open).

Over-current protection
The other source of faults is from the current sense, highlighted in blue at the top-left.  Q5 and Q5 act kind of as a sensing current mirror, where the voltage across current sense resistor R20 is divided by R23 to set a current through Q4, which is then level-shifted through a cascode (Q6) and down to ground-level to create a voltage through R29.  I've seen this scheme used in LED drivers, as it's a nice simple way to level-shift small analog signals that are sensed on the high-side.  However, R25 and R24 make this a little more complicated: they "steal" current from Q4's emitter, and therefore make the sensed current look smaller than it actually is.

I'm not sure what their values are, as it's impossible to measure all this accurately in-circuit: so it's possible that R24 & R25 are so large as to be negligible in normal operation and just act as a pull-down in edge cases.  But if they do sink significant current away from Q4, then the combination of R24 & R25, and Q7's Vbe threshold, acts as a threshold for the over-current detection.  If so, then R24 & R25 actually form a voltage-dependent over-current threshold: the larger the DC supply voltage, the more current sunk by R24 & R25, and so the higher the load current has to be to trigger the over-current detection.

Once an over-current is detected by Q7 turning on, this triggers timer U6B.  The connection from U6B's output to its "Clk+" input (or "A" input, in the datasheet) prevents it from being re-triggered while the timer is running.  When U6B's time expires, it triggers U6A, which has the same type of "anti-re-triggering" connection.  While U6A is on, it turns on Q1, which turns off Q2 and therefore forces the power switch off.

I think U6A provides an automatic "back-off timing" for the over-current protection, where an over-current causes it to turn off for XXX ms and wait, before trying to turn back on again.  I don't understand what U6B is doing, though: U6A isn't triggered until U6B is done, which made me think it might be a "minimum over-current time" discriminator (as in, an over-current has to be present for > XX ms before the fault is triggered), but once U6B is triggered, there's no way to prevent U6A from triggering.  So I have no idea what the dual-timer setup here is supposed to be doing.

Fault output indicator
The NOR gate (U1B) takes in both over-current-timer outputs, and so its output is high (normal state) only if both timers are off (no over-current is active).

The outputs from this "over-current combination" gate (U1B) and the "output state doesn't match output command" gate (U3C) are both fed to a NAND gate (U2D).  All this circuitry is duplicated on the other 3 channels, and the outputs of all the NAND gates are connected together (as they're all open-collector) to provide some kind of common "fault indicator" output on pin 21.

Another thing I don't understand, though, is how this fault logic operates.  The output of U3C is high only in the case of a fault, but the output of U1B is low only in the case of a fault.  This means that the output states of U2D don't make sense in any coherent way, either with an active-high or active-low fault output.

I double-checked all the connections here & IC part numbers but couldn't find any issues.  The only thing I can think of is that maybe U3, labeled "CD4030B" on the metal layer, is actually a CD4077 XNOR gate with a mis-labeled metal mask.  (For low-speed stuff like this I'd expect both the XOR and XNOR to use the same doping masks, but slightly different metal layers to add an optional inversion at the output)

Control power

Nothing exciting here: the digital logic common to all channels shares an external supply pin, while the LM139 has its own supply pin for some reason.  The per-channel 74ALS00 and MC14538 are powered from their own independent 5V regulator, with one per channel.  This is the mystery IC, labeled "LM148D-5", which seems like a generic 3-terminal fixed linear regulator.


One final note: if you look at the board again, you can see the two bridge rectifiers which provide the 2 redundant DC power supplies for the load driver channels.  Having 2 redundant power buses is pretty normal in commercial aircraft, I believe.  (If you're wondering why there's only 3 connections to the bridge rectifier, I think the small through-hole diodes on the board are used together with these to provide some kind of weird rectification scheme I haven't bothered tracing out yet)


Anyways, hope you enjoyed, and let me know if you have any insights on the weirdness of the fault logic.

[D Straney]

(This application note (National Semiconductor # 1696), for the LM5022 LED driver, is where I first saw this current-sense level-shifting method used.  They use a TL431 there to set a precise bias current through the diode-connected transistor, but that's not strictly necessary depending on your precision requirements.)

[AnalogTodd]

Nice MS Kennedy module there. They got acquired by Anaren, who was later acquired by TTM technologies. I've worked with their module designers before, good guys overall. That was probably a custom module for just the one manufacturer.

I don't think the LM142 is a linear regulator. I can't see a bandgap or other way of generating a stable reference voltage. Given a couple resistor dividers I note, maybe a virtual ground? I'd really have to trace out the circuit to drill down to its exact usage.

[D Straney]

Interesting, good to know - it's possible it's expecting the regulation was happening elsewhere, and so this was just driving a fixed ratio.  Maybe, for example, the module designers know it's getting a regulated +10V for the LM139, so you can divide that in half and feed it to the digital chips to get a consistent-enough 5V.

[David Hess]

(This application note (National Semiconductor # 1696), for the LM5022 LED driver, is where I first saw this current-sense level-shifting method used.  They use a TL431 there to set a precise bias current through the diode-connected transistor, but that's not strictly necessary depending on your precision requirements.)

I have not seen it in older designs even when dual transistors were more commonly available; Instead differential pairs were used with the emitters tied together, but it amounts to the same thing.

[magic]

LM142 is a linear reg but not exactly 78xx equivalent and not bandgap. As far as I see, the two transistors in the top left corner are the zeners and the bias PNPs are near the VIN pad (middle left). You can also see the epi-FET along the left edge.

[RoGeorge]

(This application note (National Semiconductor # 1696), for the LM5022 LED driver, is where I first saw this current-sense level-shifting method used.  They use a TL431 there to set a precise bias current through the diode-connected transistor, but that's not strictly necessary depending on your precision requirements.)

U2 is a TL431?

I don't understand how that works.  A TL431 with the control pin to anode (GND) does nothing. 
Control pin to Anode is how they measure I_OFF of a TL431 in fig.9 of the datasheet (typical 2.6nA).
https://www.st.com/resource/en/datasheet/tl431.pdf

Even if it were to be a schematic typo, and the control pin is in fact supposed to be tied to the TL431 Katode (as a 2.5V shunt regulator), still won't work.  If control pin is tied to Katode, then the TL431 will be in thermal shutdown at all times, because V drop on the LED(s) is bigger than 2.5V.

Then, in the rest of the AN1696, the U2 (TL431) is not mentioned at all, not even in the BOM.

Is U2 a schematic typo (shouldn't be there at all), or is that some unusual TL431 trick that I don't understand?


Later Edit
------------
I've searched for the TI's AN-1605 (mentioned in this AN1696 by NS), and in the BOM of the AN-1605 the U2 part number is "Not Used".  So, I guess U2 is a schematic typo/leftover that shouldn't be there? 
https://www.ti.com.cn/cn/lit/ug/snva229a/snva229a.pdf

[RoGeorge]

Doh, the control pin of TL431 tied to anode instead of cathode is a typo that went in two Application Notes.

Then, the Rz is not zero ohms, but the TL431 is optional, so when a TL431 is installed, the 0 ohm Rz has to be replaced with an Rz of a proper value.

[D Straney]

Burr-Brown ISO107 isolation amplifier with power supply

Unlike the ISO102 that I looked at earlier, this part is different because it also provides isolated power to its input side - you don't have to figure out how to power both your input-side circuitry and the input side of the isolation amplifier itself.  You might notice the package is unusually thick...

After a couple carefully-targeted whacks with a screwdriver and rubber mallet, you can see why:

There's a giant ferrite core in there!  It's used as a transformer in a switch-mode power supply that provides the isolated power to the input side.  The way they've used it too is pretty clever.  Normally, assembling a transformer from a wide & flat core like this one involves wrapping a lot of windings, probably by hand, and then stripping/tinning/soldering the ends down to the substrate.  This second step is particularly hands-on and error-prone, and hand-soldering directly to a ceramic substrate is probably harder when trying to avoid cracking it.  So it's impressive that they've side-stepped all these difficulties by using what they've already got available, which is wire-bonding.  Every one of the windings consists of a very long wire-bond extending over the top of the core, and then the bottom halves of each winding are formed by traces inside the ceramic substrate running underneath the core.

On the output side, you can see 2 ICs plus 2 discrete transistors (for driving the transformer) buried in the goop, doing a center-tapped push-pull:


The input side has one IC, plus 4 discrete diodes for rectifying the transformer output for positive & negative voltages from a center-tapped secondary winding:


According to the datasheet, the actual signal here is capacitively-isolated, with capacitances formed by the metal patterns within the ceramic.  Because you can only send an AC signal through the isolation capacitances, there has to be some sort of modulation scheme which generates an AC signal to transmit across the isolation barrier.  The ISO102 generated a variable frequency based on the input voltage, but here, the power supply and the modulation/de-modulation circuitry are synchronized at a fixed frequency, to avoid interference between the two.  (I'm guessing that translates in practice more to "make the interference predictable so it can be ignored")  So here, the duty cycle is modulated instead.


Here's one of the ICs on the output side:

This seems to be the power supply IC, which contains an externally-synchronizable 800 kHz oscillator, logic for generating the power transistor drive waveforms, and some pre-driver power transistors at the bottom-right corner.

This is the other IC on the output side - the PWM demodulator:


Finally, this is the single IC on the input side - the PWM modulator:

Its role is significantly different than the PWM demodulator, but notice that the left half of the die is identical between the two - there must be a good deal of shared circuitry.  The datasheet doesn't go into detail on how it works, but it's possible that internally, the modulator is driven by a feedback loop wrapped around a demodulator (matched to the one on the output side), rather than trying to make a precise "feed-forward-only" PWM modulator.

All the ICs have plenty of on-chip capacitors (the large metal areas), and resistors, some of them laser-trimmed - the datasheet specifically mentions that trimming is needed to match the modulator with the demodulator.  Both the PWM modulator/demodulator ICs have lots of un-bonded test pads, some of them with scratches showing that they were probed during testing (possibly as part of the laser-trimming process).  The modulator IC also has a couple test structures which you can see floating in the empty space vaguely near the top-right, unconnected to anything else: one for on-chip resistors, and one for a transistor.

I'm curious about how exactly the PWM modulator is implemented, and there's few enough transistors that the idea of tracing the circuitry doesn't make me want to run away screaming from the tediousness - but I'm going to leave that for a different time.

[D Straney]

Burr-Brown SDM863 Data Acquisition System

Here, "data acquisition system" means that it's an ADC, preceded by muxing of a lot of input (differential) channels with adjustable gain.  Here's a block diagram from the datasheet:

The package is a slightly unusual SMT or socketed pad array usually reserved for old CPUs.  You can see the multiple dies up-close here:


Each die (unsurprisingly) corresponds roughly to one functional block, so let's look at them one by one:


1. Input multiplexer

This is a dual 8:1 mux made by PMI (Precision Monolithics Inc.), roughly divided between left and right sides.  Each of the large blue rectangles on the edges is a FET switch, and the wide flat pink rectangles in the center column look like multi-emitter bipolar transistors used to decode a common set of control signals (the metal-layer wiring spiraling up the center-left, over the top, and down the center-right) and selectively activate each channel.

2. Instrumentation amplifier

This is actually the only die in this module made by Burr-Brown!  You can see a lot of laser-trimmed resistors, and two amplifiers - one in the bottom half, and one in the top half.  Each has a differential pair, 4 transistors (blue squares) cross-connected in a square pattern, for thermal & process gradient cancellation.  The datasheet shows how this stage works:

...but judging from the die I don't think the two buffers are made from fully independent op-amps.

3. Sample and hold

Here's another one from PMI.  There's no obvious features I can pick out - there are two larger transistors in the bottom-right and center-left, so I don't know which one (if not both) is the sampling switch.  The sampling capacitor has to be added on an external pin, as its value depends on sampling rate, so there's no on-chip sampling cap to see here.

4 & 5. ADC


The successive-approximation(?) ADC is split up into two ICs - the first seems to be the analog section (DAC & comparator), and the second seems to be the digital section (successive approximation register & logic).

The regular set of repeated resistors (bright green) and surrounding circuitry in the first die seems to be the DAC's resistor ladder.

Interestingly, both these ICs are made by Harris.  Burr-Brown themselves have only (as mentioned before) manufactured the instrumentation amplifier!  It's possible Harris had digital processes (or just fab capacity) that Burr-Brown didn't?  You can see a great look at the Burr-Brown ADC574 here from forum member Noopy, which shows two dies very similar to these two, also made by Harris.

That's it - hope it was interesting.

[D Straney]

Aydin Vector TC-801 Thermocouple Conditioner for Telemetry System


Aydin Vector is a company primarily in the telemetry business.  After a lot of searching, I finally found a photo of a board containing two of these hybrids:

This is a 16-channel thermocouple input card for a modular telemetry system.  The idea seems to be that there's one central controller with an ADC - you add on as many specific types of input modules as you want, and it cycles through each input module, digitizing each one's channel(s) in turn.  This module in particular, then, is going to be doing some thermocouple-specific things: amplifying the tiny thermocouple voltages up to a normal signal range, and somehow handling cold junction compensation.  Because the board has pretty much nothing on it besides the two hybrids and some resistors & capacitors (probably input protection/filtering), we'll get to see all the magic happen here.



...and there sure is some magic, with quite a collection of thin-film resistors.

Overview & explanation
After some probing around with sewing needles for continuity checks, this is how the sections are laid out:

There are 8 identical channels, with the right-most channel chosen as the example.  Here's how it works:

Each thermocouple signal enters via two pins at the left.  After a couple pull-down resistors and some series filtering, a pair of LTC1012 precision op-amps does differential amplification.  All 8 channels are muxed via a single chip (U3, dual 8:1 analog mux), and the differential signal is fed first through a differential-to-single-ended conversion (U4B), and then some offsets are added (U4C).  The output is gated by an analog switch (U7A), and exits on a pin at the opposite side of the package.

The offset applied in the final stage comes from a different circuit (U5).  The idea behind cold-junction compensation is that a thermocouple generates a temperature reading only relative to the point where you insert its leads into a connector (based on the thermal effects of the different metals touching), so you need to sense the absolute temperature at that connection point using a different method, and add a temperature-dependent offset voltage to the thermocouple reading.  U5 does this by generating an offset voltage based on some combination of a -5V reference (U6) and an input from an external pin (via R2 & C3).  I'm guessing this is where the cold-junction compensation's temperature sensor is connected externally.  The adjacent pin is connected only through R3 to the positive supply voltage, as far as I can tell.  Thermistors are a popular choice for cold-junction compensation, but putting a temperature-sensitive resistance directly between these pins might not make sense, depending on your accuracy target, as the supply voltage isn't particularly accurate or stable.  So it's possible it's meant to use an external voltage-output temperature sensor IC, and R3 simply provides the power to this sensor.  Or maybe the math works out so that the constant offset added by the -5V reference has a much bigger impact on the output than the thermistor's contribution...who knows.

Two additional analog switches are used to ground the mux outputs on command (U7C & D).  I have to assume the reason to do this would be to calibrate out the offset added by everything downstream of the mux.  There's one last analog switch (U7B), but I couldn't find where it connects.

Control seems to happen through a digital gate array, which I'm assuming communicates to the main controller and selects channels appropriately:

There's a logic chip next to it which looks like a hex inverter, judging by the number of identical channels:


Interesting features: resistor networks
RN3 and RN6 in the schematic stand out, as they seem to have different bond-wire-selectable sections.  Here they are, respectively:


In RN3's case, the high feedback resistances for the channel gain are the long, thin sections at the left and right sides.  The small "common" or "bridging" resistance (for high gain) comes from the thick sections in the middle.

Next to both of these resistors, there's a long trace on the ceramic substrate which stretches the width of the resistor array.  One of the pads for the intermediate sections is also connected with an extra bond wire to this long trace.  The idea seems to be that you can set different gains by bonding the long trace to a different tap in the resistor chain.


RN4 and RN5 are also nice to look at:


The series input resistors on each channel (RN2) seem to be trimmed together, likely to match and avoid degrading CMRR (if they're large values):

RN1 seems like its value(s) should be non-critical, but it's trimmed as well:


Here's the small-value resistors used for supply voltage filtering:

...some misc. resistors scattered around the digital section:

...and R3 and R4, in no particular order:


Interesting features: reworks

There's a few places where extra capacitors for either power supply or input-signal filtering have been patched in, where it looks like they weren't originally intended to go.  Connections to some of them are made through these little ceramic "sticks".  The middle example also shows the "+" and "-" inputs of 2 of the quad op-amps being swapped, via more of these "sticks".  I'm not sure if this was...
1. a mistake in the design, and this is a prototype copy where it was fixed manually for testing,
2. a mistake in the design, and it was too expensive / low-volume to fix the design, so these reworks were added to every copy in production, or
3. an intentional way to work around congested routing, without adding an extra routing layer for a more complicated and/or expensive process.

Interesting features: die shots
We've already looked at the two digital ICs, but here's the LT1012 op-amp used on each input channel:

...the quad op-amp used for the common analog circuitry:

...the dual 8:1 analog mux (made by Analog Devices, but don't know the part number):

...the quad analog SPST switch (same situation):

...and the AD586 voltage reference:

[David Hess]

I wonder why they did not use the LT1112 instead of a pair of LT1012s.

Is there a date code somewhere?  Maybe the LT1112 was not available yet.

[D Straney]

Good question.  No date codes I could find, except for the "1989" on the AD586 die.

Actually, interesting side note about that AD586: the "B586" on the die made me suspect early on that it was the AD586, but I was having trouble matching up the pinout (hadn't figured out there were separate force and sense pads for the output, and that it was set up in the negative-voltage configuration) so I went looking through the bitsavers databooks.  The 1989 ADI databook showed a die image for the AD586 that was similar but definitely not the same as this one.  The 1992 ADI databook, though, showed a die image that was identical, down to the "B586" marking.  So this particular die comes from sometime >1989 (only a little bit younger than me, hah).

[magic]

The quad opamp is interesting. The two layers of metal and general appearance are similar to AD586, but there is no AD logo and I failed to find any match in the 1992 amplifier databook. The chip uses some sort of junction isolated complementary bipolar process: there are no lateral PNPs, but some vertical transistors are made in "wells" which have a fourth terminal biasing them to one of the supply rails. BTW, do you know which rail is positive and which negative?

[D Straney]

I think the bottom supply pad is positive and the top is negative...but I'm not 100% sure.  The bottom one connects to the gold area under the die, and is V+ for all the other circuitry, while the top one is V- for the other circuitry.  So either this was a routing mistake and the module doesn't work (which fits with the swapped inputs and reworks on those), or the substrate is tied to the positive supply rather than negative supply (which fits with the unusual process?).