Author Topic: Decapping and Chip-Documentation - Howto  (Read 115495 times)

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Offline mawyatt

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Re: Decapping and Chip-Documentation - Howto
« Reply #275 on: December 12, 2025, 04:53:05 pm »
BTW we are completely closing down our photographic optics lab and selling off all the lenses and fixtures, even our prized Mitutoyos (5X, 10X, 20X all Plan Apos and two Plan 50X NUV)!!

Where and how "cheap"?  ;D

We are in Clearwater, Florida USA. Will sell at fair price but haven't looked into what the "going" price for these Mitutoyos are yet. Do you have any idea of what these are going for? We could look into eBay, but not sure if that's a good place since the "history" of those lenses isn't known. The Mitutoyos are very heavy and hand assembled/adjusted, and if one is dropped likely the optics get misaligned.

As you probably know the Mitutoyos are preferred for chip imaging and why they are used in most of the better wafer probe stations.

BTW we have a Printing Nikkor 105mm F2.8A, this is a lens that was created for production copying 35mm movie theater film (for film reproduction from the master) and is exceptional in accuracy over the entire frame. We used this because the chips contain perfect orthogonal features thru-out, which had to be rendered perfectly in the corners when "blown up" wall size!!

Here you can see it attached to a precision linear rail on a Thor Labs Optical bench with 95mm precision vertical bar.

We have all sorts of other lenses, fixtures and photographic stuff that must also go.

Best
Curiosity killed the cat, also depleted my wallet!
~Wyatt Labs by Mike~
 

Offline NoopyTopic starter

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Re: Decapping and Chip-Documentation - Howto
« Reply #276 on: December 12, 2025, 08:25:04 pm »
The right price tag is hard to find. On eBay you find everything. Rusty objectives with a pricing like a new one and also very good objectives for just some dollars.
It also depends on the country. It looks like microscope stuff is most expensive in Europe. USA is ok and Japan is the cheapest country.

Offline magic

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Re: Decapping and Chip-Documentation - Howto
« Reply #277 on: January 14, 2026, 10:36:59 pm »
Small update about wet process research.

Boiling oil at 380°C works fairly well when it works, but it doesn't always work. It decapped all Chinese SMD chips I tried (NE555, MC64063, TL431, several LM324) as well as MCP6002 and TI LM324 in DIP. It failed on numerous other chips like ST TL062 and TL084, Fairchild TL431, LGE LM317L, REF02, NJM4580, NEC uPC4570, even some Chinese DIP opamp, maybe others I forgot.

I guess it may still be worth trying if you don't have colophony or good acids.

In some cases strong heating and allowing some fumes to escape helps (and raises temperature to some 400~450°C), sometimes it doesn't do much (very slow loss of size). Hard to boil for a long time because oil disappears quickly. With crazy heating sometimes bonding pads are dissolved.

Colophony boils at similar temperature of about 380°C and with some reflux can boil like that for a long time. I found that the 8cm test tube is OK, the longer one is worse because some fairly volatile stuff doesn't escape from it and drips back into the colophony. Then it instantly boils again, lowering temperature and making small explosions.

So far I found no epoxy resistant to colophony at 380°C. It takes 10~15 minutes for a SO package or similarly sized fragment of DIP. I usually split DIPs across the leadframe plane and only boil a fragment of the top half with the die in it.

Successes: uPC4570, RC4580, TL081H, two TL072, plus whatever I did last year (IIRC, ST TL062, Fairchild TL431, probably LGE LM317L and REF02 too). Partial success: NJM4580 and some Philips chips - bonding pads got dissolved. I don't know why it happened. I tried boiling a mechanically extracted piece of NJM4580 for five minutes in colophony with no epoxy in it and the pads survived. So there is some hope, but WTF...

To recover the die from colophony I add mineral spirit ("heavy benzine") to the test tube and heat it again. That stuff is supposed to boil above 150°C, by which time colophony is liquid, so they mix quickly. Once mixed, they remain liquid at room temperature. Still an experimental process, prone to explosive boiling and spitting colophony around.
 
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Offline magic

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Re: Decapping and Chip-Documentation - Howto
« Reply #278 on: January 17, 2026, 08:13:57 pm »
I haven't investigated the corrosion problem yet, but here's something else.

TO220 vs colophony, who wins? :box:

I attached a wire to the transistor and pulled it out to inspect progress a few times. At 10 minutes it was quite swollen. If this is what normally happens then no wonder that packages fall apart and bond wires get torn. At 20 and 30 minutes it was becoming smaller. Then I went away for a while. After 55 minutes it was smaller still, but I felt it's slowing down so I dropped a SOT23 TL431 inside and turned it off 10 minutes later. The TL431 got completely dissolved, so maybe colophony was still working after all.

At the bottom of the test tube there was black dirt which didn't want to dissolve, but I got it out by adding acetone and shaking - it turned out to be solid particles which were previously glued together by insufficiently diluted colophony. After washing and drying it's a black powder, I guess epoxy fragments. Took me a while to find the TL431 die in there. Here's what it all looked like (I removed most of the heatsink tab before boiling), next to a fresh transistor for reference.



I suspect that boiling for another 30~60 minutes would have finished it off, but epoxy was weakened and I broke it by hand. There was still some black crap stuck to the die. I removed most of it with a cotton swab with IPA. Then I wondered if the die could be separated from the heatspreader. Turns out, the answer is no. But I still have one pic of not entirely cleaned die. Those fragments of bond wires are getting in the way.

« Last Edit: January 17, 2026, 08:22:48 pm by magic »
 
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Offline iMo

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Re: Decapping and Chip-Documentation - Howto
« Reply #279 on: January 17, 2026, 11:44:48 pm »
There are many videos on chips decapping with those laser engravers. Looks interesting..
For example:
https://www.youtube.com/shorts/XP0bHfGuCzU
« Last Edit: January 17, 2026, 11:47:46 pm by iMo »
Readers discretion is advised..
 

Offline NoopyTopic starter

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Re: Decapping and Chip-Documentation - Howto
« Reply #280 on: January 18, 2026, 04:22:48 am »
There are many videos on chips decapping with those laser engravers. Looks interesting..
For example:
https://www.youtube.com/shorts/XP0bHfGuCzU

I know a lot of people who have tried this. Cutting the epoxy with a laser is no problem. But some microns above the die it starts to damage the surface of the die. I have never seen a laser decap with a nice die picture afterwards.
You can leave a layer of epoxy and etch it chemicaly but even with such a process you have to be careful. It seems you can already damage die when your laser is shining trough one of the filler glass beads.
It seems there is one company decapping parts with a laser while submersing it in a strange solution. I also know people who have tried a lot of liquids: cooling, solvents, liquids which fall apart in corrosive parts. => Up to now no success.
 
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Offline magic

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Re: Decapping and Chip-Documentation - Howto
« Reply #281 on: January 18, 2026, 08:01:11 am »
https://zeptobars.com/en/read/laser-decapsulation-fail-not-so-fast

Or a guy vaporizing some silicon with laser
https://youtu.be/watch?v=GTG1iSd_3Vw

Also, another bulky piece of equipment and $$.
 
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Offline iMo

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Re: Decapping and Chip-Documentation - Howto
« Reply #282 on: January 18, 2026, 08:43:47 am »
Anyhow, with those modern laser engravers you may set the beam parameters such the epoxy exactly above the die will be etched with care and the final step (like last XXum) might be done with a drop of chemicals. You will get a decapped epoxy chip which stay functional too.. Of course it is still about $$, but the 3D printers started in a similar way..
Readers discretion is advised..
 

Offline magic

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Re: Decapping and Chip-Documentation - Howto
« Reply #283 on: January 18, 2026, 12:07:34 pm »
I boiled some colophony with bare NJM4580 die today for one hour.

Colophony was dark but still somewhat transparent when hot, it darkened more at room temperature and became the usual deep brown to slightly olive green, soft and tacky almost-liquid. Instead of minear spirit I tried to use mineral oil to dilute it. As you can see, at room temperature not much happened. (I am using a wire to pull some of that sticky stuff up into the oil layer).



After heating to over 200°C I was able to mix them by stirring with the thermometer. Not super convenient, but at least it didn't boil suddenly. I no longer pour the mixture into a bowl to pick the chip from there, because cleanup was a hassle. Instead, I pour everything straight into a waste bottle through very thin paper filter. Filtering oil through paper turned out to be somewhat slower than filtering mineral spirit. At least it gave me time to take a pic. I will probably go back to mineral spirit or look for other high temperature solvents.



This time there was no black powder on the filter. The die survived with no damage beyond what it already had. Future plan is to boil the same die again with some epoxy from JRC or Philips and see if it will harm the bond pads.
 
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Offline iMo

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Re: Decapping and Chip-Documentation - Howto
« Reply #284 on: January 18, 2026, 03:51:57 pm »
The colophony works at those high temperatures because the acids in it are activated. Perhaps try to add a couple drops of an acid into it..
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Offline magic

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Re: Decapping and Chip-Documentation - Howto
« Reply #285 on: January 18, 2026, 10:00:22 pm »
Not sure what acid and for what purpose? Generally, if you can and want to use sulphuric or nitric acid then you don't need colophony at all ;)

The point of colophony is to avoid chemicals which are tricky to source and dangerous even in storage. And hopefully avoid bonding pad damage, but apparently some chips (JRC and Philips) have problems with that. For the record, I'm talking about cases like here - some pads are completely corroded and it even extends further into internal connections.

I boiled some colophony with bare NJM4580 die today for one hour.
The die survived with no damage beyond what it already had. Future plan is to boil the same die again with some epoxy from JRC or Philips and see if it will harm the bond pads.
Actually, I used a die which was decapped by boiling, that's why it had some pad damage already. Nothing changed when I boiled it alone, with chunks of epoxy from another JRC chip and finally with the last part of that other JRC chip which contained its die. However, some of the other chip's pads were destroyed as usual :wtf: |O

Then I repeated the same with a JRC die which was never boiled and still had gold balls on all pads. This time with a Philips chip in "DIP4" (what remained from a larger DIP after cutting useless ends, but without "desandwiching"). JRC bonding balls disappeared and left holes in the pads, but no further corrosion. The DIP4 failed to sufficiently dissolve after 20 minutes.

As for the "black powder", after good drying it turned grey. I looked at it under the microscope and I think it's mostly that silica filler people talk about, maybe with small pieces of plastic or carbonized organics here and there. No wonder it isn't dissolving in solvents.
« Last Edit: January 18, 2026, 10:14:02 pm by magic »
 
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Offline RoGeorge

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Re: Decapping and Chip-Documentation - Howto
« Reply #286 on: January 18, 2026, 10:40:11 pm »
The point of colophony is to avoid chemicals which are tricky to source and dangerous even in storage. And hopefully avoid bonding pad damage

I wonder if sand ablation would work.  ::)
For example to keep the IC under a jet of compressed air+sand, or water+sand, and to sand away only the encapsulation material, without damaging the die (which die, I assume, would withstand the sanding particles better than the potting material).

Offline magic

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Re: Decapping and Chip-Documentation - Howto
« Reply #287 on: January 19, 2026, 06:14:21 pm »
TO220 vs colophony, who wins? :box:

I attached a wire to the transistor and pulled it out to inspect progress a few times. At 10 minutes it was quite swollen. If this is what normally happens then no wonder that packages fall apart and bond wires get torn. At 20 and 30 minutes it was becoming smaller. Then I went away for a while. After 55 minutes it was smaller still, but I felt it's slowing down so I dropped a SOT23 TL431 inside and turned it off 10 minutes later. The TL431 got completely dissolved, so maybe colophony was still working after all.

It really seems to slow down after 30 minutes or so. Today 90 minutes was hardly different than 60 minutes. I reloaded with fresh colophony, maybe increased heating a little (dunno if it made a difference) and then another 30 minutes finished it.

So the answer is yes, if you are crazy enough, you can remove all epoxy by boiling in colophony. You can even remove colophony by boiling in mineral spirit. Not sure how to get rid of this grey stuff now? HF? :palm:



There is always option of mechanical cleaning and sacrificing bond wires. One is already lost anyway, because the leg separated. Gotta say that acid was giving cleaner results.
 

Offline iMo

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Re: Decapping and Chip-Documentation - Howto
« Reply #288 on: January 19, 2026, 06:26:43 pm »
Not sure what acid and for what purpose? Generally, if you can and want to use sulphuric or nitric acid then you don't need colophony at all ;)
The point of colophony is to avoid chemicals which are tricky to source and dangerous even in storage..

A few drops of something like lemon juice won’t hurt then..  :D
Readers discretion is advised..
 

Offline iMo

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Re: Decapping and Chip-Documentation - Howto
« Reply #289 on: January 20, 2026, 07:47:16 pm »
People used to use the pine sap (your colophony is made from) for decapping the chips some 5000 years ago already..  ;D


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Offline magic

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Re: Decapping and Chip-Documentation - Howto
« Reply #290 on: February 02, 2026, 09:47:57 pm »
One annoying thing about colophony is that (if the bond pands aren't completely corroded) the bond wires often survive attached to the die and cleaning them up can be pain, particularly on things like Chinese LM324 with 14 wires on less than 1mm².

But on the other hand, maybe sometimes it can be fun too.
Does anyone know what this is?
Reading goes up to 2.51V when I shine laser at this tiny board :-DD

Absolute maximum ratings on non-operating temperature are joke. No one should take them seriously.
« Last Edit: February 02, 2026, 09:57:15 pm by magic »
 

Offline NoopyTopic starter

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Re: Decapping and Chip-Documentation - Howto
« Reply #291 on: September 16, 2026, 07:22:11 pm »
Sometimes it is desirable to make different dopings visible. Often the goal is to read the content of a ROM. Many ROM implementations are directly visible: for example, when data is stored by placing or omitting contacts. Another method is to leave the thick field oxide under a gate electrode instead of forming a gate oxide. Variations of active areas in the substrate are also visible. However, the data stored in an implant ROM remain invisible at first glance. In such ROMs, memory cells differ only by whether a local doping was introduced or not.

Different dopings are not easily visible. In older processes and larger structures, the regions can often be recognized because different oxide thicknesses form above them during manufacturing. These layers show different interference colors, indirectly revealing the doping. If the upper layers of an integrated circuit must be removed to expose the ROM, the doping differences are usually no longer recognizable. Even with the upper layers intact, dopings are not always visible.

There are several ways to make different dopings visible. In theory, doping changes the reflection of infrared light, but this is at least difficult perhaps impossible to apply to small structures. Electron microscopy can analyze doping extensively, but the effort is considerable. The most common method is the so‑called dash etch, using a mixture of hydrofluoric acid, nitric acid, and acetic acid. Nitric acid oxidizes the silicon, hydrofluoric acid dissolves the oxide, and acetic acid regulates the reaction. With the right mixture, differently doped regions etch at slightly different rates. n‑doped areas are etched slightly deeper than p‑doped areas, and the height difference can be seen optically. Darkfield illumination is recommended.

A lesser‑known and simpler method is the application of silver fluoride. Silicon does not react directly with silver fluoride, but it causes silver ions to be reduced and metallic silver to deposit. Different dopings lead to different reduction strengths.




In the semiconductor industry of the former GDR, silver fluoride was used to analyze doping profiles. The integrated circuits shown here were first ground at an angle of 8,5°. This increases the visible width of the layers by a factor of 6,7, making analysis easier.




Silver fluoride was then applied to the ground edge, revealing the different dopings.




The polished cross‑section shows many interesting relationships. Based on the remaining surface structure, the arrangement of contacts, and the doping profiles, one can conclude that this is an NPN transistor. The collector contact is on the left, partly outside the image. In the center is the square emitter contact. Between collector and emitter lies the base contact.

More silver has deposited on the n‑doped regions, making them appear darker. Surprisingly, the heavily n‑doped regions used for ohmic contacts appear as bright as the p‑doped areas.

The widening collector well shows how the doping spread during manufacturing. The correctness of the doping assignment is confirmed by the angles of the wells: p‑doping diffuses significantly faster than n‑doping, causing n‑doped wells to shrink during processing.

At one point, emitter and collector appear to touch. If this is not an artifact, the emitter diffused too far into the silicon — a critical parameter for any bipolar transistor. The base width should be small, but emitter‑collector contact makes the transistor unusable.

On the surface are several thin layers, likely silicon oxides formed during processing. The high number of layers above the emitter seems unusual, since the emitter is introduced last.




This IC is a Soviet 256‑bit memory built in I²L technology. A special feature is the large silicon‑oxide tub in which the transistors sit in small isolated wells. Manufacturing such structures is complex. The underside of the tub was originally the top of the wafer. After forming the oxide tub, a thick silicon layer was grown on top. The wafer was then flipped and ground from the original backside until the oxide tubs were reached. From there, transistor fabrication continued. In the documentation of the TP1322 you can see how such a process can look like (https://www.richis-lab.de/Opamp49.htm).

Unusual are the deep trenches on the underside of the silicon. Electrically they likely have no function — perhaps they were relevant during manufacturing. Aligning the wafer after flipping is apparently not trivial.




Silver fluoride can be purchased as a solution normally used by dentists for treating caries. As a medical product it is expensive, but only small amounts are needed. Silver fluoride is corrosive and leaves persistent dark stains.




The NEC µPC811 opamp is manufactured with a relatively modern process (https://www.richis-lab.de/OpampA17.htm). After removing the upper layers, the differently doped regions are only faintly visible.






Applying a drop of silver fluoride solution and letting it act for one minute deposits a thick silver layer. Nevertheless, some selectivity is already visible.








With only 10 seconds exposure, much less silver is deposited. Selectivity is again visible, but the silver particles are relatively coarse. Another 10 seconds already produce a thick layer that hides more than it reveals.




The µPC812 is the dual‑opamp version of the µPC811.




Diluting one drop of silver fluoride solution with 1ml of water produces much finer silver deposition. Since silver does not bond to silicon, the layer is very delicate. The solution must be rinsed off with isopropanol, but the surface must not be mechanically cleaned — even a soft touch removes the silver completely.




The sensitivity of the silver layer is also an advantage: if the deposition quality is unsatisfactory, it is easy to return to the starting point.






For this image, the diluted solution reacted for 5 minutes with the die.




Both brightfield and darkfield images show interesting details that were not or barely visible on the untreated substrate.




The wide stripe on the right shows strong silver deposition on contacts. The isolation frames, likely highly doped, also show heavy deposition.

The upper element contains two PNP transistors — clearly recognizable from the geometry. In the n‑doped area, little silver has deposited. More silver is found in the p‑doped regions and again on the heavily n‑doped ohmic base contact. A larger silver crystal seems to have formed on the right emitter contact. Around this crystal, less silver has deposited. Larger deposits sometimes influence their surroundings so that there is deposited less silver independend of the doping.

In the lower area, an NPN transistor is integrated. Again, the n‑doped collector region remains mostly free of silver, while the heavily n‑doped collector contact shows strong deposition. The rectangular contact inside the oval doping is visible. On the p‑doped base region, more silver is deposited than on the collector region. The contacts are visible. The emitter contact carries a larger amount of silver, but the emitter region itself is relatively free of silver — either due to the silver on the contact or because the emitter doping is lower than the collector contact doping.




For small structures, results vary. While the lower right transistor is clearly visible, the base region of the upper transistors is missing. Larger silver deposits have formed on the contacts. Better results may be possible if the upper layers are removed more thoroughly.




In some areas, the exposure time was already too long. Structures increasingly disappear under a uniform silver layer.




After cleaning and 8 minutes in the diluted solution, the overall result becomes worse. More structures disappear than new ones appear.




Further reducing the concentration yields poorer results. Here, one drop was diluted in 2 ml of water and the exposure time extended to 20 minutes. Silver deposits form, sometimes larger crystals, but no uniform layer appears that would allow reliable identification of dopings.




Silver fluoride can also be used to analyze MOS circuits. The excerpt above is from the Z8400 (https://www.richis-lab.de/uC20.htm). On the substrate level (upper right), one can still see where gate electrodes were located, where polysilicon contacted active areas, and where contacts connected metal to active regions. The minimum channel length is 3,5µm.

For the image at the bottom left, the die was placed in a diluted silver fluoride solution for 8 minutes. Here, too, you can clearly see how heavily the silver deposits on irregularities. Where remnants of the metal contacts are present, very dark layers and silver crystals form. The locations of the gate electrodes were already visible before, but upon closer inspection, it is now possible to partially distinguish where the enhancement-mode and depletion-mode MOSFETs are located. Beneath the gate electrodes of the depletion-mode MOSFETs, a slightly more inhomogeneous layer of silver has deposited.

The Z8400 is based on what is known as depletion-load NMOS logic. Unlike CMOS logic, this architecture uses only NMOS transistors. The active regions are n-doped areas within a p-doped substrate. Where a MOSFET is to be formed later, there are p-doped interruptions over which the gate electrodes (red) will later be deposited. However, to build a gate, in addition to these more common enhancement-mode NMOS transistors, a structure is also needed that can provide a defined high level. The simplest solution is to use a pull-up resistor. It is significantly more efficient, however, to use a depletion-mode NMOS transistor (blue) instead. If the gate and source of these transistors are connected, the transistor behaves like a switchable pull-up resistor.

A depletion-mode NMOS transistor can be fabricated by introducing an n-type dopant beneath the gate electrode. This altered doping becomes visible with silver fluoride, as slightly more silver precipitates there. On the far right of the image, no additional doping (pink) is visible. However, the transistors there should also be depletion-NMOS transistors. This is likely due to the weakness of the method already observed above. Directly above the gate regions, there are large amounts of silver that influence deposition in the immediate vicinity.




Another peculiarity is visible here: if only a narrow strip of active area lies between two gates, silver sometimes deposits much more strongly. The reason is unclear.


https://www.richis-lab.de/Howto_Decap_AgF.htm

 :-/O
 
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