Digital SMPS controller

[rx8pilot]

My PhD dissertation is an 800kW energy recirculation converter used for power module testing (yep, we built a 6.5kV, 200A all-SiC power module, testing standard is 5kW bus voltage, 160A inductor current continuous operation at 100kHz, hard switching), based on F28377S. It is pure digital, even including desaturation protection.

That sounds TOTALLY insane. A failure at that level is equivalent to a new years eve fireworks show.

[rx8pilot]

Not exactly. This is a recirculation converter, which means its output feeds its input, so we can test at very high power. It only takes loss power from source, in this case, only 20kw.

The 20kw input is from a protected DC supply, and we have an internal solid state breaker as well as a fuse, so triple protection.

To contain possible explosion, the system is in a rack, totally 20U in height plus external dielectric liquid cooling system. All extarnal communications are over fiber, so if shit hits fan, I don't have to see the Creator.

  Like I said - INSANE and I will add.....AWESOME.

[diyaudio]

Debugging a digital SMPS controller is the best thing ever. You have the visibility! Think about the traditional integrated SMPS controller chip - you have no visibility of the internal signals at all, you only have the huge block diagram from the datasheet, sometimes poorly specified. With the MCU, I can program whatever control structure I want, and I can program any complex scheme of triggering to an interesting event and then storing kilobytes of fast traces which I can print out to UART and plot.

Rubbish. Yes you do!. its called an oscilloscope ! the "controller chip blackbox" is not our domain of concern (only the datasheet spec which most people are lazy to read), neither is the MCU register building blocks.

You also didn't mention the issues around timing problems created! when you use software break points during debugging such a system. 

[coppice]

the "controller chip blackbox" is not our domain of concern (only the datasheet spec which most people are lazy to read), neither is the MCU register building blocks.

You know, its hard to tell when a line like that stems from cluelessness or a troll.

[diyaudio]

the "controller chip blackbox" is not our domain of concern (only the datasheet spec which most people are lazy to read), neither is the MCU register building blocks.

You know, its hard to tell when a line like that stems from cluelessness or a troll.

Listen up!if someone doesn't agree with you call them a troll. Please go take a piss!


Sent from my GT-I9300 using Tapatalk

[danmcb]

where are you getting your 0.4$ prices for C2000 chips from? I have  a passing interest in this, mich less demanding application, and I thought I'd take a look at these - but no C2000 chip is less than about 2.50€ here,. and that is in 1000 off. (FEC prices)

(edit - sorry - I am mixing stuff. 0.5$ was for STM32F030K6T6 - but that is more like 1.70€ here is 1000 off)

[coppice]

where are you getting your 0.4$ prices for C2000 chips from? I have  a passing interest in this, mich less demanding application, and I thought I'd take a look at these - but no C2000 chip is less than about 2.50€ here,. and that is in 1000 off. (FEC prices)

(edit - sorry - I am mixing stuff. 0.5$ was for STM32F030K6T6 - but that is more like 1.70€ here is 1000 off)

If its €1.70 for a thousand, $0.5 should be no problem when buying in quantity.

[Siwastaja]

The other key thing these controller devices have is the ability to get a value from the ADC, perform the loop filtering, and apply updates to the PWM hardware within a cycle of the PWM.

For example, using STM32F334, I do the following:

Start the cycle at time 0 - set the FETs to current-increasing state
Blank comparator output until COMP_BLANK_LEN
Analog comparator triggers the FETs back to current-decreasing state
Rinse and repeat.

This would work without any code being executed, giving constant current operation with inductor peak current control.

At the same time, I do the following in software:
Average eight ADC readings taken from the previous cycle. (The current shunt amplifier output pin is connected to an input pin which shares both ADC and comparator functionality, and both can be used at the same time.)
Run a control loop on the (small) current error and adjust a current fine-tune parameter.
Output the fine-tuned new setpoint to the DAC generating the comparators reference level - the 1 µs DAC has the new setpoint ready for the next cycle.
Do the CV control loop (by adjusting current setpoint), if in CV mode.

As you can imagine, transient response and stability is brilliant.

[Siwastaja]

You also didn't mention the issues around timing problems created! when you use software break points during debugging such a system. 

That's one of the reasons why I have never used a so-called "debugger". I don't need it. I do my own debug structures in code.

But I have to add, at least STM32 offers special means so that the PWM generation unit automatically issues safe "off" states to the FETs when the debugger freezes the system. It's just I'm not needing them. I want to keep things as simple as ever possible.

[Siwastaja]

the "controller chip blackbox" is not our domain of concern (only the datasheet spec which most people are lazy to read), neither is the MCU register building blocks.

You know, its hard to tell when a line like that stems from cluelessness or a troll.

Most likely, just a typical case of lack of competence on this particular field, and overestimating one's own skills, leading to this narrative: "I don't understand this so others must be wrong". Something similar to that hilarious Dawn operating system thread, but on a lesser scale. So, an attitude problem. I know very well since I have had (and still sometimes tend to have) similar attitude issues. But attitude issues can be fixed and you can learn new things!

[danmcb]

Very interesting thread - disagreements notwithstanding. Thank you, gentlemen.

[rx8pilot]

Most likely, just a typical case of lack of competence on this particular field, and overestimating one's own skills, leading to this narrative: "I don't understand this so others must be wrong". Something similar to that hilarious Dawn operating system thread, but on a lesser scale. So, an attitude problem. I know very well since I have had (and still sometimes tend to have) similar attitude issues. But attitude issues can be fixed and you can learn new things!

That.

[diyaudio]

the "controller chip blackbox" is not our domain of concern (only the datasheet spec which most people are lazy to read), neither is the MCU register building blocks.

You know, its hard to tell when a line like that stems from cluelessness or a troll.

Most likely, just a typical case of lack of competence on this particular field, and overestimating one's own skills, leading to this narrative: "I don't understand this so others must be wrong". Something similar to that hilarious Dawn operating system thread, but on a lesser scale. So, an attitude problem. I know very well since I have had (and still sometimes tend to have) similar attitude issues. But attitude issues can be fixed and you can learn new things!

lack of competence ? please don't judge me you no where near fit to pass judgment, and rather bombastic about it.

STM32 offers special means so that the PWM generation unit automatically issues safe "off" states to the FETs when the debugger freezes the

the loop is now running as open loop.

 

[coppice]

STM32 offers special means so that the PWM generation unit automatically issues safe "off" states to the FETs when the debugger freezes the

the loop is now running as open loop.

He has completely stopped the loop. As long as there is suitable circuitry in the test setup to catch any in-flight energy at the time the controller is frozen, without damaging voltage peaks occurring, things will settle down. The safe "off" state for the FETs might be driven or undriven, depending on the architecture of the converter. I am not familiar with the ST chips, but I assume they can be configured to deal with that issue.

[rx8pilot]

lack of competence ? please don't judge me you no where near fit to pass judgment, and rather bombastic about it.

I would not bother getting too upset - there is likely a language/translation challenge that makes it sound harsher than intended. I did agree in general though.

Digital controllers are vastly more capable and obviously adaptable at the expense of being a much bigger learning curve up front. They are also very reliable since many critical functions can be offloaded from the CPU to trip various safety ISR's in a reasonably graceful way. If you want to experiment with an all new topology as this thread is discussing - you have little choice but to use digital control. Adding the eGaN FETs add another layer of needed control to optimize the deadtime which is generally much much shorter than you would use on a standard Si FET.

The reason I am pursuing digital control in power is because I am always 'between features' on the standard controllers - wishing I could just do a few alterations of the fixed controller here and there. It takes a significant cerebral effort to get any power conversion system to be reliable. I would expect that the OP, who is on the eve of earning a PhD in power electronics, has the brainpower to work out the myriad of details.

I for one, am on the edge of my seat waiting to see what the heck comes of this. 

[Siwastaja]

lack of competence ? please don't judge me you no where near fit to pass judgment, and rather bombastic about it.

It was not meant to be judgemental at all, just made clear that your lack of competence on this particular subject is clearly showing. It's not an issue, not everyone is expert on everything. Hence no judging, just stating the obvious. I like saying it out loud instead of building sophisticated insults between the lines.

Your claim that digital, software-defined SMPS controllers are not employed in "real world" but are "marketing" things, is just so plainly wrong it's not even funny. For us who build them, it's a great and everyday way of doing things, with many benefits; and often, it's really the only choice!

Digital SMPS design is not trivial and requires certain type of twisted brain, but isn't that true on most complex design things? And who doesn't hate poor documentation of MCU peripherals? But we just need to live with that, and that's part of the competence, not hiding behind the (often factual!) narrative of "this is too difficult". Instead, we need to go forward and be problem solvers.

[diyaudio]

lack of competence ? please don't judge me you no where near fit to pass judgment, and rather bombastic about it.

It was not meant to be judgemental at all, just made clear that your lack of competence on this particular subject is clearly showing. It's not an issue, not everyone is expert on everything. Hence no judging, just stating the obvious. I like saying it out loud instead of building sophisticated insults between the lines.

Last one from me then we will agree to disagree okay? right.  okay.

The approach that TI and others promote to control SMPS through brute force (high speed ADC, all calculations in digital domain, high speed PWM) results from lack of communication and understanding between analog and digital designers, which in practice turns into unnoticed redundancy.

They are trying to generalize control methods and create products for something that cannot be generalized optimally. As a result, after many years of development of products for powerful digital control of analog loops, these still find little or no use for real-world power conversion, people still using old analog control ICs and schemes.

Brute force ADC/math/PWM is neither the best method nor the most accurate for controlling the inner current loops of SMPS, it is just the easiest method to describe and sell, it requires huge amounts of digital processing power (and power supply power) because all calculations are moved to the core of the MCU.

For example turning a current transformer into a resettable current integrator by loading it with a FET and a capacitor. Then this is wired to a comparator built into the MCU that is configured to act on the PWM module. The other input to the comparator comes from a voltage integrator. Voila! Accurate self-oscillating PFC current loop, without significant use of CPU power. How much MIPS of DSP-ing does this save? In TI chips they just forgot about comparators, there are some disciplines they do not master haha (edit: Looking at F2803x data I notice that there are 3 DACs attached to the 3 comparators, but these DACs do not have a variable Vref, forcing A/D and D/A for any analog gain control. Hilarious. DACs with analog references can be used as real time analog*digital multipliers, saving A/D and D/A.)

[Siwastaja]

Well, you have a point here.

Anyway, a strange thing has happened during the last decade or so: silicon area has become cheap! Like really cheap, and really useful. They can do powerful "brute force" things practically for free, so it doesn't matter.

Yes, if you count number of total transistors used for a given solution, it's insane. But it's an irrelevant metric to begin with. Only the cost and capability matters.

A digital MCU-based SMPS controller is a straight solution from the first prototype to production for relatively complex, or otherwise special needs where there is no cheap and well known, working control IC available, or the analog control solution would be too large (from BOM viewpoint, cost, etc.).

Of course, there is no point in replacing an existing and good analog (most often IC) solution with a digital SMPS MCU when there is zero need to do that. Nobody is claiming that.

My latest thing had a kinda niche feature, utterly trivial to implement on paper, but not available in commercial ICs. The first iteration was analog (opamps, comparators, logic gates) with digitally-generated setpoints, the second iteration was digital SMPS MCU. Guess which one has a lot cheaper BOM, smaller board area, and a lot less issues with corner cases? Guess which one blew fewer fets during development? Guess which one needed only two bodge wires, instead of ten bodge wires, two SOT23 transistors and three 0603 resistors hanging in the air, taking hours to bodge in the 20 prototype units because of one trivial safety feature that was forgotten - don't turn the FETs on until supply voltage has stabilized?

Good thing in software is that you can add assertions, safety checks, corner case workarounds very easily and on the fly, and do a software update to all preproduction units. For me, the digital domain has been "safer" and in many senses, easier.

In my experience, I feel that I'm totally OK with every issue you have listed; really, the only thing I'm dissatisfied with is dealing with poorly written or broken MCU documentation, poor libraries and/or development software, and MCU errata / silicon bugs.

[rx8pilot]

The primary reason digital is not yet 'normal' in my opinion is only because it forces a complete understanding of the analog system and how to translate that into code. There are many people that can put a controller on a PCB and get a reasonable result without knowing much at all about how or why it works. Learn the basic rules of SMPS PCB layout, go to TI's webbench and you are converting voltages. When you have a specific need, corner case, step response, power density, etc, etc.....digital offers a clean slate to design for a very specific application with very specific components. There are a great many applications that do just fine with basic controllers off the shelf with next to zero development time. I have some like that. I also have some cases where I need something that does not exist. Having the ability to optimize from very small loads to full loads, transients, efficiency, different active devices, monitoring, safety, reporting and others - is pretty amazing.

The unused peripherals and transistors don't matter - they cost nothing and don't take up any space. When you decide to add a feature in the middle of the design or after release - those things are just some code and a couple of extra parts on the PCB. Over time, you may learn more about the circuit or the loads it will encounter and have the ability to make adjustments to compensate. This was very critical for me early on. My power products are connected to a wide variety of loads. Every once in a while, I get the call that something is not working as expected. Usually a false trip of a safety mechanism. I can generally, take a look at the configuration and make some changes to firmware to get past that particular challenge. Nothing else changes except some software thresholds or timings.

[danmcb]

If it is like other fields, the benefits of going digital are not just about the technical performance of the thing itself. You already have a uC there, doing other management tasks, if you can put a fancier but still cheap one and lose a bunch of analogue circuitry, that's win/win. And there are things you can do with digital filters that are close to impossible in analogue domain too - i am far from expert on this,  but some  pretty reliable sources have tried to explain that to me.

[coppice]

The approach that TI and others promote to control SMPS through brute force (high speed ADC, all calculations in digital domain, high speed PWM) results from lack of communication and understanding between analog and digital designers, which in practice turns into unnoticed redundancy.

In TI's case, the strategy for digital power came from the analogue group (the UCD parts), and customers pushing the C2000 group to add features to the early C2000s, to make a more complete digital power device.

They are trying to generalize control methods and create products for something that cannot be generalized optimally.

You would need to explain what you mean a bit more. Digital techniques are much more suitable for the adaptive and non-linear techniques many high efficiency converters use. For converters using simpler linear approaches, they offer a level of long term stability analogue designs demand expensive components to achieve.

As a result, after many years of development of products for powerful digital control of analog loops, these still find little or no use for real-world power conversion, people still using old analog control ICs and schemes.

You keep saying that, like its true. Visit any of the big power supply makers, like Delta or Chicony. You'll see that all the high power high efficiency stuff has already gone digital, both for the power converter and the PFC. They expect to bring digital techniques way down into the cheaper supplies, but that requires a reduction in costs. That will come.

Brute force ADC/math/PWM is neither the best method nor the most accurate for controlling the inner current loops of SMPS, it is just the easiest method to describe and sell, it requires huge amounts of digital processing power (and power supply power) because all calculations are moved to the core of the MCU.

Digital control loops are neither easy to describe or sell, compared to analogue. Most power supply customer's are very familiar with traditional analogue techniques, and have taken their time to learn about digital ones. Digital methods are pretty straightforward in the linear regions, but can get rather complex when things saturate. Digital methods do, however, give the most stable and predictable results. I wouldn't call 200-300mW a huge power drain for a device handling the entire control function for a multi-output converter.

For example turning a current transformer into a resettable current integrator by loading it with a FET and a capacitor. Then this is wired to a comparator built into the MCU that is configured to act on the PWM module. The other input to the comparator comes from a voltage integrator. Voila! Accurate self-oscillating PFC current loop, without significant use of CPU power. How much MIPS of DSP-ing does this save? In TI chips they just forgot about comparators, there are some disciplines they do not master haha (edit: Looking at F2803x data I notice that there are 3 DACs attached to the 3 comparators, but these DACs do not have a variable Vref, forcing A/D and D/A for any analog gain control. Hilarious. DACs with analog references can be used as real time analog*digital multipliers, saving A/D and D/A.)

This makes no sense to me. Why would a self-oscillating PFC be a good thing? That's just the way most simplistic analogue solutions have been implemented. Why would saving CPU power be a big deal? Its pretty cheap these days, without incurring high current consumption. Why would anyone worry about saving ADC and DAC channels when they are so cheap? People want to run things from stable references, to ensure stable results across the temperature range, and over time. Nobody forgot about comparators in the F2803x. It was build against the detailed inputs of early adopters of digital power.

[Siwastaja]

I can see three typical cases that make sense:

(1) A super simple analog self-oscillating loop, requiring a few cheap analog components. Think about Joule Thief. Fun to design. Commercially suitable for some specific simple, very low cost applications.
(2) A more complex case, but there is a commercial, cheap controller IC available. "Easy" to design using TI WEBENCH... Most power converters today. "Cheap IC" means mass market.
(3) Almost anything else: the digital SMPS-oriented MCU is by far the most sane choice in 2017.

[JPortici]

Let me just say... i'm still a noob at power electronics but i have that same dspic laying around and this topic made me curious. I hate you all

[Phoenix]

I'd like to weigh in on this topic - with my experiences.

I've been on a team developing a commercial grid tie solar inverter - responsible for the low level loop control and PWM (... yes, I have a PhD in control theory for power electronics). It used two F28035 DSP from TI for the main closed loop controllers. On the AC side the primary current loop is a proportional+resonant - I'd like to see that in an off the shelf chip! The other main AC side PI regulator has significantly non-linear operating modes. There are also other aspects of the converter topology which require other loops to operate in conjunction with the main two loops. Not to mention the PV input controllers (which aren't current regulator based) on the other DSP. Between the two DSPs I think there are about 12 feedback controllers of some form.

The company also develops other DC output power supplies using TL431s and control ICs. This is a classic way to do things and is what is well understood in the industry. There is little need for the current power electronics engineers (older generation) to move away from what they know and do.

Translation from a control IC to a DSP based approach is also a complete re-think of design and implementation (methodology and skill set). A lot of uC manufacturers try to sell their chips using familiar ideas, but it's never that simple.

[diyaudio]

The company also develops other DC output power supplies using TL431s and control ICs. This is a classic way to do things and is what is well understood in the industry. There is little need for the current power electronics engineers (older generation) to move away from what they know and do.

This!