Hello everyone,
I am designing an automatically tuned series Lf-Cf resonant network. The purpose of the tuning is to compensate for the tolerance of the Lf inductors in mass production.
The capacitance is adjusted using a switched capacitor array. A simplified schematic of one switching cell is shown below.

Circuit parameters:
• Operating frequency: 6.7 MHz
• Voltage across V2-V1: quasi-sinusoidal, up to 50 V peak
• Current through Lf: quasi-sinusoidal, up to 3 A peak
• Capacitor switching occurs only occasionally (during tuning), so the switching frequency is many orders of magnitude lower than 6.7 MHz.
Someone suggested that, because the MOSFETs switch very infrequently, I could avoid using an isolated floating gate driver and instead drive the gates through a PI network (capacitor – large resistor – capacitor) referenced to the floating source potential.
I have several questions:
1. Does this approach make sense for this application?
2. Is the proposed gate-drive circuit (shown below) correct?

3. How should the values of the RC components in the PI network be selected? Are there any application notes or design references describing this technique?
4. Does the Switch_ON control signal also have to be referenced to the floating source potential? My capacitor array will be controlled according to the measured average input current, and my current sensing circuitry is currently referenced to the logic ground. What is the recommended way to interface this logic-domain control signal to the floating gate circuit?
5. Has anyone successfully used this technique to drive floating MOSFETs, or am I misunderstanding the original suggestion?
Any advice or references would be greatly appreciated.