Limiting op-amp output

[bobwidlar]

Well, I really didn't get the point of saturation and slewing. How is it related to the clipping diodes?

[T3sl4co1l]

I thought when you were talking error amps it was an integrator either classic, type II or III with a discrete cap across output and in-.  Whats the configuration of the opamp you're trying to limit.  Sorry I only briefly read through the other posts so I might have missed it.

Yes -- doesn't matter which type, that's just the impedances connected around it.  The purpose is still the same.

Tim

[T3sl4co1l]

Well, I really didn't get the point of saturation and slewing. How is it related to the clipping diodes?

Because they don't prevent those things from happening.  In the circuit above, the 1k series resistor from U1 guarantees that U1's output can swing all the way up to +15V (or whatever V_OH it is able to reach).  When the input signal changes direction, it takes a relatively long time for that voltage to fall (slew) back into the linear range.

If U1 had a compensation network across it -- making it an integrator, or some variation on one -- it would take time, not only for the amp to change its own output, but orders of magnitude longer for the integrating capacitor to gradually discharge from 15V down to the linear range.  During that time, the process being controlled -- a power supply's output current, for example -- is left completely unconstrained!  At best, the dynamics just stink (maybe it takes some miliseconds for the current limit to kick in); at worst, the circuit explodes because what you thought was current limited, wasn't!

Saturation is doubly relevant because, how much the integrator charges during this nonlinear excursion is proportional to the duration, until the op-amp saturates and it gets as bad as it can.

This "windup" behavior is often seen in supplies where, for example, the turn-on startup transient looks like this: nice speedy ramp over a few ms, oops we overshot the output voltage, better turn it off, ho hum waiting for voltage to fall, oh wait there it went, better go full throttle again!...and so on.  It bounces around excessively, through a strongly nonlinear range (it goes into saturation and cutoff alternately), even though the quiescent, linear condition may be critically damped (so that, once it's operating with a little load, it behaves itself, and the 50-100% load step looks just peachy).

Tim

[nickm]

Ok then I really don't see why a zener and a schottkey won't meet your needs.  When the output of the opamp exceeds the zener voltage (+5V) the zener conducts and the small signal gain of the opamp goes to zero so your output won't rise above +5V.  Since the forward drop of the zener is bad you add the schottky so that when the opamp starts to swing negative (-0.3V) the schottkey conducts and the small signal gain of the opamp goes to zero and the output won't go below -0.3V.  You've clamped your output and the opamp itself isn't saturating.

[Jay_Diddy_B]

[

This the circuit I have the main op-amp with a 1K resistor to limit the current when the clamping happens. Feedback is closed around the 1K resistor to prevent loading errors.

Here is the result:

...

What about the recovery time of U1's output?  That's what I'm most concerned about.

Tim

Tim,

How fast do you need this circuit to be?

What is the sampling rate of the data converter?

What is the BW of the data converter?

If I replace U1 in my schematic with an LT1224, 45 MHz of GBW and 400 V/us Slew rate I get this model:



The results in about 40ns delay in the risetime:



And a 40 ns delay in the falltime:



Using higher GBW op-amps in the U2 and U3 locations may improve the clamping. The output stages of these amplifier is subjected to a step load change.


By the way using an  0-5V powered rail-rail op-amp will not be so good close to the rail. You will see over-drive recovery issues. These may not be modelled accurately. But here is a circuit:



And the simulation results:






You need to try this circuit in hardware.

Regards,

Jay_Diddy_B

[Jay_Diddy_B]

Hi,

Here is another circuit:




This circuit is remarkably simple. The diodes do most of the work. The op-amp is needed because the circuit is sensitive to loads in parallel with R1.

It does introduce some small gain and offset errors which can be corrected.

This plot shows the error versus Vin:



Jay_Diddy_B

[bobwidlar]

Well, I really didn't get the point of saturation and slewing. How is it related to the clipping diodes?

Because they don't prevent those things from happening.  In the circuit above, the 1k series resistor from U1 guarantees that U1's output can swing all the way up to +15V (or whatever V_OH it is able to reach).  When the input signal changes direction, it takes a relatively long time for that voltage to fall (slew) back into the linear range.

If U1 had a compensation network across it -- making it an integrator, or some variation on one -- it would take time, not only for the amp to change its own output, but orders of magnitude longer for the integrating capacitor to gradually discharge from 15V down to the linear range.  During that time, the process being controlled -- a power supply's output current, for example -- is left completely unconstrained!  At best, the dynamics just stink (maybe it takes some miliseconds for the current limit to kick in); at worst, the circuit explodes because what you thought was current limited, wasn't!

Saturation is doubly relevant because, how much the integrator charges during this nonlinear excursion is proportional to the duration, until the op-amp saturates and it gets as bad as it can.

This "windup" behavior is often seen in supplies where, for example, the turn-on startup transient looks like this: nice speedy ramp over a few ms, oops we overshot the output voltage, better turn it off, ho hum waiting for voltage to fall, oh wait there it went, better go full throttle again!...and so on.  It bounces around excessively, through a strongly nonlinear range (it goes into saturation and cutoff alternately), even though the quiescent, linear condition may be critically damped (so that, once it's operating with a little load, it behaves itself, and the 50-100% load step looks just peachy).

Tim

Hi Tim,

It seems to me that, slewing is not a feature of the clamping circuits. It is because of the OPAMP you use. If you use any kind of feedback, especially unity gain, and a large input then of course it will slew at some point. The solution might be to use clamping before any kind of OPAMP and then buffer the clamped output like the last circuit proposed by Jay_Diddy_B. Another option ofcourse is to choose an OPAMP which will not slew for your expected input signals. This might be an expensive solution though.

BTW, what is your signal swing and max frequency? Will it needs to handle some step inputs, if so what kind of rise time of a step?

[Dinsdale]

An AGC circuit? Maybe modified by absolute input levels instead of feedback?

[T3sl4co1l]

Ok then I really don't see why a zener and a schottkey won't meet your needs.  When the output of the opamp exceeds the zener voltage (+5V) the zener conducts and the small signal gain of the opamp goes to zero so your output won't rise above +5V.  Since the forward drop of the zener is bad you add the schottky so that when the opamp starts to swing negative (-0.3V) the schottkey conducts and the small signal gain of the opamp goes to zero and the output won't go below -0.3V.  You've clamped your output and the opamp itself isn't saturating.

Do you have, or can you make, a voltage-controlled zener?

(Hint: TL431 doesn't count -- even if its ground reference were correct (that's more a matter of semantics anyway; there are other styles), it's not actually a zener, it's an op-amp with precision offset.  So it won't play well in a loop.)

But yes, for the fixed limit case, a zener will work.  Not exactly, for more subtle reasons, but the idea is right.

Tim

[Jay_Diddy_B]

Tim,

Can you share a little more about the application?

What is the input?

What is useful signal range that you need to measure?

Regards,

Jay_Diddy_B

[T3sl4co1l]

How fast do you need this circuit to be?

GBW under 2MHz is generally fine.  Rarely would a control application require more.  Often, that isn't even required, it's just the most common (e.g., switching controllers usually have error amps in the 0.5-4MHz range, or Gm amps with effectively similar performance).

What is the sampling rate of the data converter?

This is not an ADC buffer or something.  This is using op-amps for op-ampy stuff.  Linear analog stuff.

...Does no one work with analog stuff anymore?  Is it really all ADCs now?...

If I replace U1 in my schematic with an LT1224, 45 MHz of GBW and 400 V/us Slew rate I get this model:

I don't need 45MHz GBW.  If I did, I would just as well move the goalposts proportionally.  What to do about the 100ns windup?  Or 1ns?  It's ugly no matter what scale you do it on.

And anyway, I could do that, and be no smarter than any other technician.  You are telling me to resign myself to stay within my existing range of knowledge.  That's depressing!

By the way using an  0-5V powered rail-rail op-amp will not be so good close to the rail. You will see over-drive recovery issues. These may not be modelled accurately.

Model?  The breadboard tells all.   And yes, another good reason, besides inaccuracy near the rails.

Tim

[G0HZU]

I've only skimmed the thread but I can offer some real world experience here...
Normally when you have a problem like the one in the first post, it's time to step back and look at the bigger picture rather than trying to perfect a 'band aid' solution.

eg I'd question the system design if you end up facing the problem in post #1.

Maybe it's better to redesign the system so you don't have such an extreme interface/level problem in the first place...

[T3sl4co1l]

An AGC circuit? Maybe modified by absolute input levels instead of feedback?

Now that's interesting.

Obviously, no way to do it with conventional op-amps, but it relates back to my earlier mention of "this is easy with a transconductance amp".  You could hang a clamp transistor over to the bias input, so it chokes itself off.  The limit need not entail excessive gain/phase shift (you can compensate the whole thing however you like).  I would be concerned about frequency response varying along the way (since bias, and gain, are changing in the process), which may make for slow recovery coming out of the limit.  But even so, it's probably a pretty good way, and need not have any peaking at all.

AGC amps proper I think are going to have similar behavior, depending of course on how the control response acts.

Tim

[dannyf]

no way to do it with conventional op-amps

Fairly simple with a conventional opamp: led + photo resistors for example.

A conventional approach is to use a VGA like AD603. 20db in single stage.

A simpler but less conventional approach is to use a dual gate mosfet: 30-40db per stage.

[Marco]

R1/R2/R3 determine the kick-in point for the diodes / transistors.

Fundamentally, it is no different from using two back-to-back diodes.

Zeners you mean? The advantage of the transistors is that you can use variable clipping voltages, just use two parallel pots for the feedback and put the bases of the transistors on the whipers. Only problem is that you can't go close to zero.

How about something like this (only positive clipping shown, cause Im lazy) :

[T3sl4co1l]

This looks interesting.  The (from the op-amp's point of view) grounded base feedback loop has plenty of voltage gain, but the compensation appears to rein it in (the small signal step response is shown).  Accuracy is limited by Vbe gain, so it has kind of an exponential toe-in as it tops off.  No peaking/overshoot/recovery.

Op-amp example is just a gain of five so I don't have to do a whole loop and everything.  The circuit will certainly work the same with any loop, so long as it is configured for inverting operation.

Low accuracy version: just drive the PNP base from the limit reference.  Single transistor solution.  You lose a Vbe and get full tempco.

Medium version (within, say, 50mV): as shown.  Tempco mostly cancels, but exact amount varies with current through each transistor (namely, the ratio of emitter currents).  Depending on manufacturing and temp matching of course.

Precision: will take more thought, and certainly a couple more transistors.

A general purpose solution (not restricting +in = GND) would be cool, too.

Hmm..

Tim

[Jay_Diddy_B]

Hi,

Here is an all transistor design:



This relatively simple circuit has wide bandwidth and introduces only 2 degrees of phase shift at 1 MHz. The gain flat at  -0.19 dB at 1 MHz

Here is the gain phase plot:



The time domain model:



This the performance at 100kHz no clipping:



And at 100 kHz with clipping:




The performance at 1 MHz no clipping is:




I thinking that this circuit worth trying on the bench.

Jay_Diddy_B

[Jay_Diddy_B]

Hi,
Here is an additional model, the positive and negative limits are being varied:



The result is:



Jay_Diddy_B

[T3sl4co1l]

I'm not so concerned about the fully discrete approach; like I said, if I had to, I could roll my own everything, and make an op-amp with built in voltage controlled limits.  It would just take 20 transistors, at least as many resistors, and still need offset trimming.

As for discrete limiter blocks not including the amp, I already have a pretty good one of those (which is why I started this thread -- to do it with the op-amp included, this time).  See attached.  This one uses six transistors (one optional), offers a +/-20mV (or so) offset trim (referred to one input only, it seems), can be expanded to nearly unlimited inputs, has a buffered emitter follower output, and (as shown) also has a indicator output to show which input is active.  For example, you could put this circuit into a lab power supply and use the indicator output for the current/voltage regulation indicator.

The transistor models are as shown, except for the starred parts, which have different IS parameters, to demonstrate the offset trim and matching over variations.  I don't have those data offhand (the temp/sweep plots), but I think I had ran them.

Again, this type of limiter is best suited to use with an op-amp, not necessarily with high GBW, but high slew rate at least, so that the recovery can be relatively short; and especially when used with external compensation, because the feedback can be drawn after the limiter with no need for a second op-amp as a follower, and the slew rate will be a much smaller fraction of the overall time constant.  It's worth noting, B-E avalanche will screw things up if the op-amp output goes more than +/-7V from the limit voltage, which is dubious for +/-15V applications, but *might* be acceptable on a +12/0V system.

So to reiterate, my "holy grail" here would be a circuit that does this (the voltage controlled, low offset, precision limit), with the buffered output (equivalent to an op-amp output), indicator output (optional but desirable), and with high (open loop, DC) gain and uncommitted differential inputs (equivalent to an op-amp input) for the signal input, without incurring more than transistors and jellybean op-amps in construction, and minimizing or eliminating slewing or windup type recovery effects.

Tim

[nickm]

If you want programmable clip settings and more accurate references I would put a jfet across the feedback cap which can short it out when clipping is detected.  Then use a window comparator to detect the clipping which would turn on the jfet. The references on the window would be easy to control and be accurate.

[Jay_Diddy_B]

Tim,

It was very interesting to see your transistor schematic. I have attached a pdf which shows how you can get from the transistor schematic that I posted to your circuit.
It turns out the circuits are quite similar.

I have also attached a zip file with the LTspice model. With this LTspice model you can see the effect of the modifications.

Interesting project.

Regards,

Jay_Diddy_B

[T3sl4co1l]

If you want programmable clip settings and more accurate references I would put a jfet across the feedback cap which can short it out when clipping is detected.  Then use a window comparator to detect the clipping which would turn on the jfet. The references on the window would be easy to control and be accurate.

This would chatter incessantly, popping to zero each time it hits a limit!  Yuck!

This is a perfect example of the subtlety of analog design.  Very often people think in terms of "if, then", and propose some digital (or high gain analog) approach with no knowledge or understanding of the impact of that gain, or the inevitable phase shift.  Around an op-amp, these are factors which are in very short supply, as the op-amp has a limited phase margin (in and of itself, it is an excellent integrator, nevermind any external compensation networks used), and it takes very little gain in the feedback path to destroy that margin.

Now, as a tech, or engineer, or just an amateur, this is easy for you: you stick it on the breadboard, see that it doesn't work, and either address the parts that don't work (can you stabilize the comparator so it doesn't oscillate?) or move on to something different which does work.  And then you're done, it works, cool.  What's hard is... when a manager has some silly pet idea like this, that they want implemented, and trying to explain, in as simple terms as possible (which is hard since that rules out root locus, and stability criterion, and information theory, and...), time and time again until, after months of prodding, they finally drop it!

Tim

[Jay_Diddy_B]

Hi,

I have another idea which illustrate some of the subtle points Tim talks about.

A 100 kHz sine wave is used as the test signal in all these tests.

Start with a simple circuit:




This has the desired output:



But it is impractical, you cannot buy the ideal diodes used in the model.


The next move might be to try and idealize a diode by applying feedback with an op-amp:



The results from this circuit illustrate one of the problems, the feedback loop around the op-amps is broken during part of the cycle causing the op-amp output to go to the positive rail. It then takes time for the output to slew back to the operating.



This is actually a mistake.



By modifying the circuit to this:



You get the following desirable result:



This works well for two reasons

1) The feedback loops around the op-amps is never broken, so there are no artifacts from having to slew or recover from an over -drive situation.

2) The diodes are all conducting the same current, 1mA, when they are active. This makes matching of the forward drops possible.


The current sources can be implemented like this:



The results from this implementation are:



Although these current sources are not perfect, the key is they are matched.


One last refinement is to add an output buffer.

The buffer is need to prevent output current causing an imbalance in the diode currents:



The result of this circuit is:



If you need to know when the circuit is clipping add a fast comparator to compare the clamp input and output.

I have attached a zip file containing the LTspice model.

Regards,

Jay_Diddy_B

[G0HZU]

Sorry to be so negative on this but I still think it's worth taking a step back and trying to lessen the problem by changing the system slightly if that is allowable.


If (at my place of work)  I proposed a similar system that had an op amp with a +/-15V power rail interfacing its output to a stage that must stay inside a 0-5V range then I'd have a lot of trouble getting this past a preliminary design review even before anyone considered reviewing any of the addon 'limiter' solutions.

This odd interface requirement would either get killed at the design document review stage, or the preliminary system design review and I seriously doubt it would survive to a critical design review.

So although it's kind of interesting to think up clever 'sticking plaster' solutions to this issue using limiter circuits I think the real answer may lie in a rethink elsewhere in the overall system.

[T3sl4co1l]

An example from some of my present work is this: +12/-5V rails are used so that accurate output voltages can be provided over a 0-5 or 0-10V range, with a 10 or 20mA load requirement on those lines.  You can use R2R amps for this, but then the 0 and 5 (or 10) ends will be load dependent.  That's too complicated to write out in the user manual and expect the end user to understand (say, connecting it to some shitty PLCs and other industrial sorts of peripherals that may draw current from the signal line), so extended rails are required.

Of course, an output buffer isn't an error amplifier.  The signals are limited internally before then, so unless a feedback resistor manages to pop open, the outputs are fine.  But the same principle applies to internal signals, where the limit must be calibrated and accurate (i.e., a diode drop won't suffice; balanced diode drops, or emitter follower offsets, are probably okay though).  Probably, one signal will be external (a current limit, for example), the other internal (from an error amp -- limited at the amp itself if possible, to save on hardware, windup and so on).  But other examples range from controllers to amplifiers (signal, audio, lab or otherwise) to analog computer sorts of things.

Tim