In delta-sigma audio DACs, Different sample rates are usually determined by the master clock and hardware/software configuration (setting the division of MCLK 256/284/512) or, auto-detection of the LRCLK of the I2S input, if its a slave.
For example, if you provide a 24.576MHz clock, and set the division to 512, you get 48kHz. Set it to 256, and its 96kHz. Most DACs have a couple of pins used to set the division, but some have more settings so use an SPI port to configure settings in registers. Switching between 32/48/96/192kHz and 44.1k is often done by using an external PLL but there are probably DAC's that either have two MCLK inputs, or an on-board PLL.
As mentioned by others, because delta-sigma DAC's overs-ample to increase resolution, the actual sample rate is far above the sample rate its set to, this greatly relaxes the constraints on the output filter used to suppress images at multiples of the sample rate. So a single pole filter that starts to attenuate at 96kHz can be used for 96, 48, 44.1, and 32k sample rates. For ladder DAC's, this output filter needs to have a very sharp roll off, which is why 'audiophiles' tend to run them at very high sample rates - so it still only has an effective bandwidth of 48k, but the nyquist frequency is higher, giving more room for a filter to roll off. In order to do that, they often upsample the original stream. Note 'ladder DAC's' are generally in the world of audiophoolery. Whilst they don't have the same issues as delta-signa, they bring their own which makes then unsuitable for resolutions > 12-bit, and where the sample rate is is close to the nyquist frequency.