Reducing ESP32-S3 current peaks during WiFi

[lutkeveld]

I have an ESP32 board that pulls about 150mA nominal, but 350mA peak during wifi transmission.
The peaks are only about 2ms, but trigger the over-current on the 250mA supply of the system (energy metering port).

The power flow is 5V > TLV62568A 1A buck > ESP32-S3
Currently I already reduced the wifi power from 21 to 11 dBm and added a 220uF elco to the 5V input.
The peak flattens and reduces a bit, but is still noticably there. Current profile measured with Nordic PPK2 is attached.
Now it is close to the 250mA limit, but with significantly reduced WiFi range.

How would I go about reducing these peaks so they get closer to the baseline?
More capacitance? Different type of capacitors? On the 5V rail, or on the 3V3 rail?
Some time of current clamp circuit?

[Psi]

More capacitance. But you really need a bulk storage ceramic cap on the 3.3v rail that the ESP32 is running on.
The electrolytic won't be able to respond fast enough for RF tx peaks, due to its high ESR, and having it far away on the 5V rail makes it even harder for the ESP32 to use. But if you add enough ceramic capacitance on the 3.3V rail then the electrolytic can probably stay on the 5V rail as secondary bulk capacitance.

You can get 100uF ceramics at 6.3V for like $0.50
But give it a try with a 22uF or 47uF if you have some, maybe that's all you need in conjunction with the 220uF elec. dunno.

[langwadt]

More capacitance. But you really need a bulk storage ceramic cap on the 3.3v rail that the ESP32 is running on.
The electrolytic won't be able to respond fast enough for RF tx peaks, due to its high ESR, and having it far away on the 5V rail makes it even harder for the ESP32 to use. But if you add enough ceramic capacitance on the 3.3V rail then the electrolytic can probably stay on the 5V rail as secondary bulk capacitance.

You can get 100uF ceramics at 6.3V for like $0.50
But give it a try with a 22uF or 47uF if you have some, maybe that's all you need in conjunction with the 220uF elec. dunno.

but it E= 0.5*CV^2 so you get more storage for "free" on 5V

[lutkeveld]

but it E= 0.5*CV^2 so you get more storage for "free" on 5V

Was also thinking along these lines, but seems more efficient in a sense to solve it at the origin (the 3V3 rail) if possible.

I tried a 100u 6.3V 1210 MLCC on the 3V3 rail but it does not do much to reduce the peaks unfortunately

Attached is a zoomed in version of the peak. It rises with about 25mA/us. Don't know if that can be calculated to a certain ESL/ESR target.
 

[Psi]

in that case you likely just need more capacitance.  Try 1000uF elec on the 5V rail.

Also, double check your scope probing/gnd to make sure what you're seeing is real.

Might also be worthwhile checking if your TLV62568A control loop bandwidth can regulate fast enough to handle the short ESP32 current pulses. But it's probably fine.

[lutkeveld]

Attached screenshot is with 2000uf on the 5V rail. This reduces the peak from 250 to 210mA.
Good start, but at the cost of significant bom cost and board space.
Don't know if the capacitance is effectively being used.
Could tolerate almost 500mV drop on the 5V rail, as long as the input current stays low.
Would be nice to get it to ~180mA but looking at ways to do it without 10.000 uF on the board.

[langwadt]

what happens if you limit the input current to, say, 200mA to spread out the recharge after the peak?

[Psi]

Are you sure the peaks are coming from the ESP32 and not from the TLV62568A responding aggressively to the ESP32 change in current draw.
It is after all a 1A regulator. Maybe you need a regulator where you can set the inductor current limit lower.

Can you try the same testing but supplying 3.3V from a lab PSU instead of the buck reg?

[lutkeveld]

what happens if you limit the input current to, say, 200mA to spread out the recharge after the peak?

I have considered something like the tps2553 to clamp the input, but its range it's too large (e.g. 240mA limit could be 180mA if you include variation)
Am looking into options with a shunt, op-amp and FET but not fully sure if that works out.

Are you sure the peaks are coming from the ESP32 and not from the TLV62568A responding aggressively to the ESP32 change in current draw.
It is after all a 1A regulator. Maybe you need a regulator where you can set the inductor current limit lower.

Can you try the same testing but supplying 3.3V from a lab PSU instead of the buck reg?

Will try to measure 3V3 consumption directly. How would a lower inductor current work? Wouldn't that cause droop on the 3V3 rail?

[mzzj]

Attached screenshot is with 2000uf on the 5V rail. This reduces the peak from 250 to 210mA.
Good start, but at the cost of significant bom cost and board space.
Don't know if the capacitance is effectively being used.
Could tolerate almost 500mV drop on the 5V rail, as long as the input current stays low.
Would be nice to get it to ~180mA but looking at ways to do it without 10.000 uF on the board.

One way to brute-force would be a small low-esr supercapacitor.
This for example would be a bit of overkill (you probably need to limit the charging current)
https://www.digikey.com/en/products/detail/cornell-dubilier-knowles/DGH504Q5R5/7387523

[temperance]

Here is some information on the current requirements for the ESP32:

https://hubble.com/community/guides/how-to-profile-esp32-power-consumption-accurately/

300 mA isn't strange.

The ESP is powered by 3.3 V. The energy meter supplies 5 V. With a 100 % efficient buck, this would mean the energy metering port has to supply about 200 mA.

Finding a buck regulator with 95 % efficiency at 300 mA isn't difficult. But the buck regulator transient current during load changes is probably higher than 250 mA. During steady state TX when the buck has settled to this new operating point, the average inductor is about 300 mA, but the peak inductor current is much higher. (Current is only supplied from the port to the inductor during the ON time of the buck regulator, or about 66 % of the switching cycle time.)

To solve this, on the power metering port side, you need an input filter such that the port only sees the average current. This is done with an inductor and a capacitor. But the output impedance of this LC network (frequency dependent) must be much lower than the incremental input impedance of the buck converter. (Because buck converters have a negative input impedance. While the input voltage goes down, the input current goes up)

Edit: the switching frequency is high so the input LC filter can be quite small.

[marco.van.steen]

How much capacitance is required on 3.3V, if ALL current would come from the buffer capacitor:
First note that your DC/DC is efficient, so 100 mA too much on 5V is actually 100 x 5/3.3 = 150 mA too much on 3.3V rail.
C = (duration x current) / (allowable voltage drop) = 0.002s x 150mA / 0.2V = 1.5 milli farad.

Maybe this cap is nice: https://nl.rs-online.com/web/p/polymer-capacitors/8387721
(If you're lucky Wurth sends you free samples to try via their webshop)
It has 2 mF / 8 mOhm spec. Mount it very close to the ESP32  3.3V supply pin.

Now back to your basic problem: power port limit 250mA.
With the cap installed on 3.3V we must make sure that the pulse power comes from the cap, and not from the supply.
Adding a bit of resistance (roughly 1 Ohm, >> 8 mOhm) between the 3.3V regulator output and the radio supply should help for this.
But it may be easier to try to slow down the 5V regulator loop: remove C3 (as in their datasheet), if you have it.
If that doesn't fix it, try adding 100 pF ... 10 nF across R2.
A slow regulator loop gives effectively a higher AC output impedance, thus lower regulator input current peaks.

Good luck, keep sharing the results, and have fun!

[temperance]

Maybe this cap is nice: https://nl.rs-online.com/web/p/polymer-capacitors/8387721
(If you're lucky Wurth sends you free samples to try via their webshop)
It has 2 mF / 8 mOhm spec. Mount it very close to the ESP32  3.3V supply pin.

A beefy capacitor doesn't solve the problem. An small size LC filter to average the input current of the buck regulator does.

[marco.van.steen]

Well, physics says in the 2 ms there is about 0.5 Joules more needed than the external 250 mA supply can deliver.
How can that ever be supplied from a small LC filter without excessive supply voltage drop?
A small LC will help to smooth out a DC DC switching frequency, but then you're talking 1 .. 10 us time scale, not 2 ms .

Turns out I'm not the only one saying this, see:
https://github.com/DiGierre/DSMR_reader_schematic_PCB

[temperance]

Turns out I'm not the only one saying this, see:
https://github.com/DiGierre/DSMR_reader_schematic_PCB

The ESP32 requires 300 mA peak during TX. Or, 3.3 V x 300 mA is about 1 W.

The 5 V port can deliver: 5 V x 250 mA= 1.25 W.

Almost every modern buck regulator can keep up with such requirements. But I guess you didn't read what I wrote or don't understand what I wrote about the input ripple current.

You can also play with the buck inductor value to keep the current ripple in the buck inductor below the power port 250 mA limit. But I don't know this chip so limits might apply for the selection of the inductance. If this inductor can't be made marge enough, you need an LC filter in front of the buck regulator. (which is common practice)

See fig. 19 of the data sheet for an example of the buck inductor ripple current:
https://www.ti.com/lit/ds/symlink/tlv62568a.pdf?ts=1790776094203

[temperance]

Well, physics says in the 2 ms there is about 0.5 Joules more needed than the external 250 mA supply can deliver.

Supplying 1 W for time period of 2 ms is 2 mJ.

[lutkeveld]

Well, physics says in the 2 ms there is about 0.5 Joules more needed than the external 250 mA supply can deliver.

Supplying 1 W for time period of 2 ms is 2 mJ.

Which in theory is 160uF on 5V, which would work much better for me than using 2000uf+
How would I go about calculating such an input LC filter? Or as alternative/addition the output LC filter of the buck?
If I have a good starting value I can do some measurements to see its effect.

[temperance]

The input LC filter. To make an appropriate calculation, I need to know the buck regulator inductor value and the switching frequency if you changed the chip meanwhile.

[CosteC]

I would try to add lots of capacitance, probably double layer 1 Farad or so capacitor. This however require PSU which will charge it up gradually and also will have current limit which will not trigger your source limits.
Also, very good reset and brown out mechanisms are mandatory as power will rise up sloooooowly.

I designed GSM modem powered for years from lithium cell. It required particular gymnastics around power management: how not to overload battery, still provide 2 A peak current when modem is transmitting, how to put it too sleep, how to wake it up and so good times.

[langwadt]

I would try to add lots of capacitance, probably double layer 1 Farad or so capacitor. This however require PSU which will charge it up gradually and also will have current limit which will not trigger your source limits.
Also, very good reset and brown out mechanisms are mandatory as power will rise up sloooooowly.

I designed GSM modem powered for years from lithium cell. It required particular gymnastics around power management: how not to overload battery, still provide 2 A peak current when modem is transmitting, how to put it too sleep, how to wake it up and so good times.

similar but possibly worse,  GSM modem on old school USB port, need ~2A peak, max from USB is 500mA with equivalent of max 10uF on VUSB

[lutkeveld]

The input LC filter. To make an appropriate calculation, I need to know the buck regulator inductor value and the switching frequency if you changed the chip meanwhile.

This is my current buck, but open to suggestion for a different part if that would work better

[temperance]

I designed GSM modem powered for years from lithium cell. It required particular gymnastics around power management: how not to overload battery, still provide 2 A peak current when modem is transmitting, how to put it too sleep, how to wake it up and so good times.

Been there, done that. You can't compare GSM modules with a wifi module. A GSM module (2G) requires up to 2.8 A peak for 8.1 ms.

Adding large capacitors:
in your case when using certain non rechargeable lithium type batteries that's a normal solution. The capacitor ESR is in those cases much lower than the battery resistance such that under transient conditions, the capacitors supplies the bulk of the current. During the off time, the remaining slots, the batteries can charge the capacitors again. Tadiran and some others supply small lithium capacitors for such applications.

Back to the WIfi module:

Wifi modules require only 300 mA for 2 ms.

Why capacitor are bad idea? This application is not about dealing with high frequency ripple where a small bit of stray inductance in series with the supply takes care of making sure the capacitor will supply the bulk of the required current.

Capacitor on the 5 V bus: the source resistance of the power port is unknown. As such, if you place a capacitor in parallel, the current will split between the source and the capacitor in an unknown ratio.

Capacitor on the 3.3 V bus: same problem. During a TX burst, the current will be divided between the buck regulator and the added capacitor. But unless the capacitor has a very low ESR, the bulk of the current during a transient will be supplied by the buck regulator in again an unknown/unpredictable ratio.

Anyhow, here is recipe for a filter. This filter provides at least 30 dB attenuation at the switching frequency of the regulator and maintains a low output impedance. The ripple voltage at the buck regulator should be about 30...60 mV with a 4.7 µF capacitor. (depends on the buck reg. inductor value which is not known. I assumed 1 µH a shown in the data sheet)

-The 22 µF capacitors with a resistor in series are the LC circuit damping networks. Instead of resistors in series with the capacitors, you can use regular electrolytic capacitors with an ESR between 0.5 and 1 R.
-The output capacitor must be placed as close as possible to the buck regulator and must have a capacitance of at least 4.7 µF at 5 V. This smallest MLCC capacitor able to achieve this has at least size 1210.
-The zener at the input: required because the power port output capacitor value and ESR are unknown and a correct damping network can't be provided. The zener diode clamps the overshoot when you plug this into the power port.

Of course the filter introduces a small ripple voltage at the input of the buck regulator. If the ripple of 30...60 mV at the input of the buck regulator is a problem, you can increase the 4.7 µF capacitor towards 10 µF.

The filter size can be reduced if you need less attenuation.

[temperance]

You can first try to increase the buck regulator inductance towards 6,8 to even 10 µH. This should reduce the peak input ripple current to below the power port 250 mA. Given the output current requirement of 300 mA, the 1 µH inductor in the typ. schematic provided by TI seems a bit low. (1 µH is more appropriate for a 1 A regulator)

Or, use 4.7 µH in the buck regulator and 4.7 µH in the input filter shown in my previous post.

[temperance]

Which in theory is 160uF on 5V, which would work much better for me than using 2000uf+

Something about this statement. If you calculate the stored energy you indeed get 2 mJ. However, his would mean you discharge the capacitor from 5 V to 0 V.

Instead, you need to calculate the required energy for an acceptable voltage difference. Let's say the power supply would be allowed to drop by maximum 0.5 V when supplying 2 mJ. This requires:

C= (I x t) / dV
C= (0.3 A x 2 ms) / 0.5 V
C= 1200 µF


But as stated earlier, this seemingly simple solution doesn't work because the power port output resistance is unknown. As such the current will split between the capacitor and the power port in an unknown ratio unless you force the current to split in a known ratio by deliberately adding a resistor in series with the 5 V power port.

[spostma]

I would use an ordinary $0,40 PAM2808 analog 0 - 1.5A constant current LED driver
to limit the charging current into the big buffering electrolytic capacitor like this: