SC18IS604 SCLK input - does it have a resistor network on it?

[peter-h]

I am getting a weird waveform on that signal, as if this chip had say a 10k +10k network on the clock input, so the signal floats to 50% of VCC when not driven.

I've never seen any such thing and the DS doesn't mention it
https://www.nxp.com/docs/en/data-sheet/SC18IS604.pdf

OTOH, the SCLK input is seeing all sorts of clock speeds because the SPI is shared between a number of devices. The DS says 1.2MHz max but I am sending up to 21MHz to it. I wonder if that mucks it up? It should not do that because SPI can run at lots of clock speeds.

Another aspect here is that my SPI (STM32F417) clock output may not be hard driven (to 0V) when no clock is being generated, so even a weak pullup will cause this behaviour.

EDIT: testing suggests there is indeed just a pullup inside this stupid chip, of the order of 90uA. See here for the resulting problem
https://www.eevblog.com/forum/microcontrollers/what-does-a-stm32f4-do-with-its-spi-clock-output-between-transactions/