• EEVBlog #543 – PCB VIA Current Investigation


    Dave tests the myth that plugging a PCB VIA with solder does nothing (or not much) to improve the current handling capability. Is manual wire feed-through any better?
    Does the industry rule of thumb of 0.5A per VIA have any basis?
    What is the typical plated VIA/hole thickness?
    http://saturnpcb.com/pcb_toolkit.htm
    Previous videos on PCB solder coating:
    http://www.youtube.com/watch?v=L9q5vwCESEQ
    http://www.youtube.com/watch?v=cScVqD6eIaU
    Does a PCB VIA halve in resistance like a PCB trace does when coated with solder?
    Forum HERE

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      • Nick

        Indeed an interresting experiment, and good to know rules of thumb.

      • Jay

        Thanks so much for this. I was thinking about this topic recently and was wondering how much difference filling the vias would make, so this video was very timely, and really helped!

      • David,
        Thank you once again for the Saturn PCB Toolkit shout out. I will reply to the #543 FB post once it is up regarding some of the topic items you hit on. Please not, the PCB Toolkit uses the IPC-2152, not the IPC-2221A for its numbers.
        Regards
        Ken
        Saturn PCB Design, Inc.
        http://www.saturnpcb.com

        • Thanks Ken
          Please don’t reply on Facebook though, I never use it so never see the replies! Best to post here, or on the EEVblog forum.

      • Danny Chouinard

        Nice investigating there, Dave.

        Interesting and valuable information.

        Always a pleasure to watch your blog.

        Cheers!

      • David,
        Thank you again for the Saturn PCB Toolkit nod in your PCB via current investigations.
        The reason the PCB Toolkit does not yield a strictly linear curve is due to the multipliers I use to keep the curve in line with the IPC-2152 findings.
        In 2009, the IPC replaced the IPC-2221A spec with the IPC-2152 spec. The old IPC-2221A used a well established formula for amperage and the IPC-2152 has generated charts based off of test measurements only, no formula. It gets a bit tricky because they also have a series of multipliers added on to adjust the final value based on certain PCB parameters. A PCB conductor’s temp rise over ambient is not only affected by amperage but also affected by many variables like PCB thickness, type of substrate, if the PCB has a plane, if there are parallel conductors…etc… It all boils down to thermal mass and that is why the filled via in your study can handle more current. Any mass that can act as a heat sink will aid the via / conductor in dissipating heat and therefore having a lower temp rise. I have argued however that there is a limit to this, a plane 250mils away from a 4mil trace will not do much in the way of sinking heat for example. Mass is also the reason that the via height affects temp rise, more mass means more heat sinking. Again, I feel there is a limit to this as well.
        What you are seeing in your chart is a slight readjustment between 1.5mm diameter and 1.8mm diameter due to a temp rise multiplier I have coded at that point. It’s a bit involved but basically I use a pretty large series of lookup tables to generate scalar multipliers to adjust the output that was calculated using the established formula. The IPC-2152 does have a formula for the conservative chart though (no multipliers) and that is coded into the PCB Toolkit as well but currently only works for the conductor calculator. I do have a new version coming out where I turn off the multipliers in the via calculator just like in the conductor calculator. This makes the output more conservative and for your setup instead of a calculated ~1.8amps the toolkit generates ~1.3amps.
        As for plating thinness, you are correct in saying that it varies with manufacturing which is why I call out a 1mil minimum in our fab notes. Typically, for a 1oz. plating (1.35-1.4mils) you will get 1mil in the hole due to the flow of the plating fluids not being equally distributed across the surface of the pcb layer vs. the smaller holes.

        Hope this helps
        Ken
        Saturn PCB Design, Inc.
        http://www.saturnpcb.com

        Link to the IPC-2152 worksheet written by a friend of mine, Jake Olsen:
        frontdoor.biz/PCBportal/HowTo2152.pdf

      • Good experiment. I like your way of investigation. Thanks for sharing your experiment details along with the video.

      • f4eru

        Typically, for a PCB with 30um copper, the vias are plated with only 10-15um

        Gruss

        Christoph

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