Learn FPGA from scratch

[suzhiming]

  Learn FPGA from scratch,I don't know anything about FPGA.I like these very much. Simulate using the chip EF2L45LG100B.
There are Chinese characters in the picture. Please don't report it.

video:https://www.bilibili.com/video/BV1TELazsEgs/?share_source=copy_web&vd_source=cc85b342080f282f8270cd6a82b94532 fn_sw.zip (128.35 kB - downloaded 111 times.)

[suzhiming]

Code: [Select]

`timescale 1ns/10ps
module fn_sw
(
a,
b,
sel,
y
);
input a;
input b;
input sel;
output y;

assign y=sel?(a^b):(a&b);
endmodule
/******************testbench of fn_sw*************/
module fn_sw_tb;
reg a, b, sel;
wire y;
fn_sw fn_sw
(
.a(a),
.b(b),
.sel(sel),
.y(y)
);
initial
begin
a<=0;b<=0;sel<=0;
#10 a<=1;b<=0;sel<=0;
#10 a<=0;b<=1;sel<=0;
#10 a<=0;b<=0;sel<=1;
#10 a<=1;b<=0;sel<=1;
#10 a<=0;b<=1;sel<=1;
#10 $stop;

end
endmodule
/**************************************************/


[pcprogrammer]

And what is your specific question about this?

If you are at the beginning of working with FPGA's you can find lots of information on the internet about them.

The Anlogic IDE does not support simulation directly for as far as I'm aware. To do simulation one needs a tool like for instance Modelsim, which has a free version supplied by Altera/Intel as part of their Quartus IDE suite.

In simulation there are levels on which one can simulate. There is logic level, which just takes your verilog or VHDL and simulates the logic in it based on the given test bench. Then there is gate or primitive level, where the low level elements of the FPGA are taken into account into the simulation. And there is full timing simulation, where the timing parameters of the low level elements are also taken into account. For the last two types one needs specific files from the manufacturer to be able to do those simulations. I have not done this for Anlogic FPGA's yet, so no idea on where the needed files are.

[iMo]

The best way how to learn from scratch with a lot of fun is following, imho:

1. buy a cheap fpga board with an fpga chip supported by your development software
2. take an existing verilog example, learn how to build it and how to program the bitstream into your fpga
3. learn how to edit the verilog sources (there are several files usually) of that example
4. make small changes in the example sources (learn to add/remove a functionality, use more i/o, rewire something, etc.), program the fpga and watch the results, step by step..
5. goto 4.

[pcprogrammer]

The best way how to learn from scratch with a lot of fun is following, imho:

1. buy a cheap fpga board with an fpga chip supported by your development software
2. take an existing verilog example, learn how to build it and how to program the bitstream into your fpga
3. learn how to edit the verilog sources (there are several files usually) of that example
4. make small changes in the example sources (learn to add/remove a functionality, use more i/o, rewire something, etc.), program the fpga and watch the results, step by step..
5. goto 4.

If you watch the video, you would see that the first two steps are taken care of. The OP has some nice board with a couple of 7 segment displays and push buttons.

https://www.bilibili.com/video/BV1TELazsEgs/?share_source=copy_web&vd_source=cc85b342080f282f8270cd6a82b94532

I checked it and it seems to be safe. The video itself is not giving information on what the original post really is about.

[Sal Ammoniac]

Does Tang Dynasty support SystemVerilog? If so, consider switching to that rather than the old version of Verilog syntax you're using.

[zapta]

  Learn FPGA from scratch,I don't know anything about FPGA.I like these very much. Simulate using the chip EF2L45LG100B.
There are Chinese characters in the picture. Please don't report it.

video:https://www.bilibili.com/video/BV1TELazsEgs/?share_source=copy_web&vd_source=cc85b342080f282f8270cd6a82b94532 (Attachment Link) (Attachment Link)

According to the log screenshot you were able to build and upload the design to the FPGA.  What do you want to know?

[suzhiming]

Draw a development board by hand.

an easier eda experience  lceda.cn version:v6.5.46

[suzhiming]

JPEG

[suzhiming]

an intact project

[zapta]

Is it related to EasyEDA?  They seem to use the same logo with a cloud symbol and a switch.

https://easyeda.com/images/System-Integration.png

[zapta]

Draw a development board by hand.

an easier eda experience  lceda.cn version:v6.5.46

If lceda.cn is a cloud tool, why do they have a 'Download' button?

[suzhiming]

installation of the collaborative version

[LovelyA72]

LCEDA is basically the Chinese version of EasyEDA. LC stands for JLC's LC. They offer an offline build that you can download. I am not sure why it's not an option for the overseas version.

[LovelyA72]

He's just wanna share his Anlogic FPGA learning process. He's trying his hardest to use English since he's in China. (fyi I am his friend!)

[radiolistener]

您可以使用AI聊天机器人来帮助改善翻译并纠正语法错误。

如您所见，我可以用中文写作且没有错误，即使我不懂汉字

[pcprogrammer]

您可以使用AI聊天机器人来帮助改善翻译并纠正语法错误。

如您所见，我可以用中文写作且没有错误，即使我不懂汉字

To save others some work:

You can use AI chatbots to help improve translations and correct grammatical errors.

As you can see, I can write in Chinese without errors, even though I don’t know Chinese characters

@radiolistener, how can you know for sure that it is correct Chinese without knowing the Chinese characters.     

[zapta]

LCEDA is basically the Chinese version of EasyEDA. LC stands for JLC's LC. They offer an offline build that you can download. I am not sure why it's not an option for the overseas version.

I tried EasyEDA once or twice for small circuits. It worked but it didn't feel solid like let's say Kicad.  If done right, web based engineering applications can be very competitive, for example, Onshape, a commercial web based mechanical design software competes very well with non web applications and feels very 'native'.  (Free for makers if anybody wants to try).

As for your friend, there are open sources FPGA design tools that were designed for ease of use and students in mind. For example, these two from an academic team in Spain https://fpgawars.github.io/ :

IceStudio - a graphical FPGA design tool where you design by drawing schematics. 

Apio - a command line FPGA design tool that was inspired by Platformio and provides simple commands such as 'apio build', 'apio sim', 'apio upload'.

(I use apio myself and also contributed some code, I recommend it installing from the nightly builds that are available here https://github.com/FPGAwars/apio/actions . I use it with Visual Studio Code as an editor but that's a personal choice. Let me know if you have any questions)

[suzhiming]

The model library is the highlight of this software.All goods of Lichuang.

[suzhiming]

The second counter is finally written, but there are many grammatical errors.

[tggzzz]

您可以使用AI聊天机器人来帮助改善翻译并纠正语法错误。

如您所见，我可以用中文写作且没有错误，即使我不懂汉字

To save others some work:

You can use AI chatbots to help improve translations and correct grammatical errors.

As you can see, I can write in Chinese without errors, even though I don’t know Chinese characters

@radiolistener, how can you know for sure that it is correct Chinese without knowing the Chinese characters.     

Vibe translation, of course

[suzhiming]

The second counter is ready.The third version is correct.I always make grammar mistakes.

[zapta]

You have a lot of cycles in that simulation. One way to make the simulations easier to read is to reduce the count constants with a #param.

For example

https://github.com/FPGAwars/apio-examples/blob/ec7da6db0ed17c9d22abc36a527b2a501e7cada0/examples/icefun/blinky/main.v#L3

https://github.com/FPGAwars/apio-examples/blob/ec7da6db0ed17c9d22abc36a527b2a501e7cada0/examples/icefun/blinky/main_tb.v#L14

[suzhiming]

 toggle  <= !toggle;


This is right.
But it's not what I want.

[suzhiming]

tri_gen  tri_gen.zip (0.65 kB - downloaded 25 times.)