I'd be deeply grateful if someone who is actually properly qualified at decoding dies shots would produce an annotated version of one of the many LTZ1000 die shots kicking about marking out the actual transistors, their CBE connections and so on.
The z-diode is designed as descriped in the LM399 diagram. It is connected with the red metal (cathode) and the black metal (anode).
The transistor Q1 is already there with it´s emitter connected to the blue metal in the center. The base is a part of the z-diode (red). The collector is connected from the edge (white).
So there is a transistor which is surrounded by the z-diode but it´s already in the z-diode structure.
The "avalanche lights" confirm this: You can see the base-emitter-junction on the edge of the middle circle whereas the z-diode-junction is buried under the surrounding ring.
Q2 consists of four transistors surrounding the z-diode and Q1 (grey, yellow, blue).
Looking at a larger picture with the bonding wires I can see:
Red connects to pin 3 - Zener cathode
Black connects to pin 4 - Q1 base/Zener anode
White connects to pin 5 - Q1 collector
Yellow connects to pin 6 - Q2 base
Blue connects to pin 7 - Q1/Q2 emitters
Grey connects to pin 8 - Q2 collector
So, the Black trace connects to the Q1 base/Zener anode and Red is the Zener cathode, not as stated "The base is a part of the z-diode (red)." So the base connection is the outer circle.
My head now officially hurts from sitting here for 15 minutes trying to imagine exactly what the 3D structure of Q1/the Zener actually looks like and I'm still not there. Fortunately shopping calls so I've an excuse to give up, at least for the time being.
I took another look at that thing and this is my best guess of what the internal structure might be, assuming they use the standard noncomplementary bipolar process.
(Attachment Link)
D1 uses the buried zener construction described in Linear AN82, but with a central hole to contain Q1. The anode consists of two P diffusions of different depth, breadth and strenght. The cathode is a strong and shallow N diffusion which fully covers the area of highest P concentration where breakdown voltage is lowest and actual breakdown will occur. This active part of the junction is located a few microns beneath the surface.
Q1 is a standard vertical NPN (top to bottom: EBC). Base is the same silicon as D1 anode, providing the necessary connection which is nowhere to be found on the surface. There is a thin, cross-shaped disturbance visible on the surface which is probably caused by a buried layer diffusion below. Such diffusion could connect Q1 collector to the four contacts surrounding the reference diode structure which are all wired to pin 5. Alternatively, D1 anode could have no hole and Q1 collector would be the N silicon which surrounds D1 anode, but then Q1 would have considerable base width and probably poor beta.
It is known that D1 anode is connected to the substrate and, according to designer Carl Nelson, there exists a subsurface Kelvin connection to the bottom of D1. I presume it all means that the anode is not isolated from the substrate by the buried layer, except for the aforementioned four thin lines. Between the lines, the buried layer is empty and the anode connects with the substrate.
A second similar ring of deep P diffusion is located outside, to isolate D1/Q1 from other transistors. This ring also is penetrated by the buried layer Q1 collector links. On its surface there is a metal connection to pin 4.
Q2 consists of four standard vertical NPNs placed around the reference structure and wired in parallel.
Comments, questions and arguments are welcome
...how did you paint this?
I used zero vector graphics capabilities and drew it like in Microsoft Paint
Yes, I know. But vector graphics would be yet another even more specialized software to learn. Raster editors are more versatile; everything I did today I will probably want to do to a photograph or some bitmap graphic downloaded from the Internet another day. In the past I used Gimp to alter schematics in PNG format, try that with a vector editor
wow, I was under impression that the picture was made in a chip design CAD.
However I doubt that one would see light from the buried junction. This would be rather deep inside the silicon so only very little of that light can escape.
I´m not sure about this.
A view days ago I tried to use a big KD501 transistor as a photovoltaic cell.
(https://richis-lab.de/Bipolar02.htm)
Across the base-emitter-junction I got the same current as across the base-collector-junction. It seems there wasn´t significant light reduction.The normal avalanche process should also not produce light as the energy from the hot electron is used to generate new pairs. The normal recombination in silicon is without any light and if any it would be in the IR range (~ 1 µm). It would be only if a hot electron recombines or excites some defect in some way.
I agree with you that hot electrons generate new pairs but some of them will recombinate. Otherwise you will get a real breakdown with 0V and destruction of the junction. (I´m not absolutely sure about the last sentence but that would be my interpretation.)
The hot electrons can have a higher energy than you will see while normal current flow in the semiconductor. With "normal" current flow and "normal" recombination you don´t see any light. I agree with that. But in my view there is recombination of hot electrons.
I tried to take a "maximum tilted" picture but you can´t really say where the light is generated:
1. I don't think that this project would belong into this thread, please delete and continue with your other one, you already opened.
2. Concerning the LTZ1000, why do you want to reinvent the wheel, again?
Maybe you should define precisely your requirements concerning stability figures and noise immunity, before discussing cosmetic aspects like the form factor, and (again) over-engineering the components used. Better than A9 and compact designs are already available.
Frank
Point 1 is well made, but how is re-using the A9 "reinventing the wheel", quite the opposite surely, and there's nothing cosmetic about form factors.
A form factor is a basic utilitarian part of a specification - there's a world of difference between a portable instrument and one intended for rack mounting. Form factor is probably point one on any outline specification for any product, so much so that the form factor implicitly or explicitly defines whole categories of products. Nobody wants a toilet that doesn't fit the implicit form factor, or a 50 cm mobile phone, or a 2.5 m long 'luxury' car.
Here is some data on an LTZ1000 ref I've been playing with, this does not look very good does it?
Here is some data on an LTZ1000 ref I've been playing with, this does not look very good does it?
Here is some data on an LTZ1000 ref I've been playing with, this does not look very good does it?
Any RF sources nearby? Neonlights on the ceiling? If you have a spectrum analyzer, please check of any unwanted RF.
It is hard to tell how good the LTZ1000 reference is. With a DMM reading the DC voltage one sees a combination of the external and DMM internal reference. With the DMM7510 this is the LTFLU and LTZ1000 combined. Depending on the DMM setting one may also have some extra contributions from the DMM (the DMM7510 has relatively high noise at 100 PLC - seems to be some odd Keithley specific thing).
So some 1.8 µV peak to peak is about the value one would expect. Naturally the noise reading show quite some variations. A reliable noise reading takes quite some times, so more like the median over some 10 intervals with some 100-1000 readings.
Yes I know that This is not a serious measurement, just a sanity check. Three or more multimeters (DMM7510 and 3458A) sampling the reference is what I had in mind for the serious measurement, and proper cables and shielding.
The reference used here is an old and unmodified A9 board from an 3458A. DMM7510 is what I had conveniently located near the power supply.