3458A Worklog

[MiDi]

Some additional comparison against another A3 with drifting U180 (now dead).
It shows that the original A3 has some noise issues and that the observed increase in noise with higher NPLC is untypical (NPLC comparison: https://www.eevblog.com/forum/metrology/3458a-worklog/msg5788505/#msg5788505).

Short:






±7V LTZ1000:

[MiDi]

Some upgrades on the CPU board:

• Userrams: 2x FM18W08 FRAM (DS1230) on 1:1 breakout
• Calram: FM16W08 FRAM (DS1220) on hybrid adapter
• Firmware: Swapped EPROMS with Winbond EEPROMs W27C512 (NOS, but readily available)
• Installed Option 001 (148k memory): 4x SRAM 256 Kb (HM62256)

The hybrid adapter can either be configured as DS1220 or FM16W08 with a jumper or solder bridge.
This makes programming with e.g. TL866/T48 much easier, details here: FYI Xgecu TL866II and T48 can't program FM16W08 FRAM chips

KiCad project files: https://github.com/EleDes/DS1220_FM16W08_Hybrid_Adapter

[MiDi]

Some results from replacing U170 LM358 with OPA2206 (https://www.eevblog.com/forum/metrology/3458a-worklog/msg6138685/#msg6138685).
All ranges except 100mV are now feeding ZGJC as expected (DC_BUF) - description & details: https://www.eevblog.com/forum/metrology/3458a-worklog/msg5870289/#msg5870289 & https://www.eevblog.com/forum/metrology/3458a-worklog/msg5871583/#msg5871583.
Even OPA2206 with its input overvoltage protection does not recover fast enough from input railing to -18V on 100mV range.
On 1V & 100V range the input pulse has lower amplitude and the OPA2206 is fast enough, here the LM358 is to slow for the fast changes from input DC_AD.

100mV: 1V: A3 Schematic:

U170 has only ±15V supplies as LM358 is rated only for 32V.
A better solution to OPA2206 would be to bridge 3V zeners CR174/5 to get ±18V supply for U170 and use e.g. an OPA2990 with RRIO, low power and >36V supply rating.
That should than even fix the 100mV range, despite it is not that relevant as the zero glitch is covered by noise there.

The behaviour was confirmed on 2nd unit, so it is likely a design flaw and not a fluke .
The origin of the short pulse on DC_AD when switching between 0V (AZ) and input signal is unclear, but it scales inverse with range.
The screen captures for all ranges with original LM358 are linked above.

My theory:
The DC input amplifier gets the charge injection from switching between 0V (AZ) & input signal and is floating during the dead time.
For 100mV it has a gain of x100, 1V x10 and 10V x1, 100V & 1000V are divided by 100 on input (HV divider RP7), then 100V gain of x10 (like 1V) and 1000V x1 (like 10V).
That would explain the observed lower amplitudes of the short input pulse for 1V and even lower for 10V (similar for 100V & 1000V range).

[Kleinstein]

The OPA2990 is only marginal high slew rate than the OPA206. It may be just enough, but could be close with a voltage that is only a little positive. To be really faster I would look at the OPA2991.

The negative pulse should come from the gate charge of Q11 when the zero is disconncted. This is well enough to saturate the main amplifier in the 100 mV range. There seems to be than quite some dead time (like 10 µs) before the precharge phase starts. That is the time when the voltage goes up in the 1 V range.

The the main amplifier than takes additional time to recover. U170 has only some 5 µs from when the main amplifier crosses some -10 V to when the comparotor is latched.

[MiDi]

Short recap of general function of ZGJC before diving into guts what it fundamentally achieves.
The zero glitch jump circuit is a clever trick HP engineers used to exclude the range -200mV to +200mV from the ADC - in detail: https://www.eevblog.com/forum/metrology/3458a-worklog/msg5870289/#msg5870289.
A question from first investigation remained: How is the offset of ZGJC corrected?
The answer is simple: AZ, it removes all offsets inside the AZ loop from the reading (even if AZ is off, the first reading is always done with AZ - the same as setting AZ ONCE).
This is main reason why 3458A heavily relies on AZ.

To see why this mystery circuit was implemented in the first place, ZGJC was disabled by desoldering the offset resistors R184/5 at input of rusn1 U180:26.
This was done on 2nd unit, 1st unit was setup to measure INL & DNL and K238 was used as voltage source for the sweeps.
The DUT was set to 10V range and the reference device to 1V for ±200mV and 100mV range for the details (±120mV limit).
Measurements were taken with 1 and 10NPLC setting.

From the results the naming of this circuit becomes obvious: an INL/DNL glitch at around 0V.
This now solves long lasting mystery of its purpose and how the always present glitch in MS-ADCs was eliminated - a key to achieve the (still unbeaten) INL/DNL performance of 3458A.
The origin of the glitch is still unclear, but DA of integration cap seems the main contributor.


1NPLC:
INL: Detail: DNL:

10NPLC:
INL: Detail: DNL:

[Kleinstein]

The INL error near zero is surprisingly large. The distance between the maxima / minima is also larger than I would expect with the rather fast modulation in the run-up.

The dielectric absorbtion is expected to cause on INL error somewhat similar. However I would expect much less (like 0.05 ppm max) unless the integration capacitor would be really horrible (e.g. worse than polyester). The error from DA would also not be only near zero, but also to a lower degree at some other voltages (like some 4 V and some 6.5 V  (1/3 and 1/2 the theoretical range).
So most of the observed INL error should be from a different source.
Another point is that the error is similar size for 1 PLC and 10 PLC. For the DA part I would expect a little less error at 10 PLC compared to 1 PLC.

There is a chance that those INL sources would also have the smaller brothers near other simple PWM ratios. Knowing where this is, one may be able to find those possibly weak points. The normal INL scans may just miss these points.

p.s.:
The distance between the minimal / maxima is not that far off: at 1 PLC the expected size of the run-up steps should be around 4.5 mV ( 2x12V * 50K/40K * 3 µs / 20 ms). The observed INL shows this "period" further out and double the distance in the center. The doubling may happen as one can get a modulation near zero not just with a pos / neg 1:1 pattern but also a 2 x positive and 2 x negative pattern.

[MiDi]

Follow-up of modding my A3 for lower noise.

1. -12ref amp divider (U180) was replaced with external RN LT5400 10k:10k (spoiler in last post)
2. Additional LPF was added to A9 ADR1000 reference output as suggested by Kleinstein (10R + 4700µF low leakage || 100nF C0G)
3. Additional filtering with 1nF C0G was added to non-inverting input of integrator U110 (ZR_LO) and between ZR_LO and ZR_HI (Suggested by chuckb)

 

4W Short / 0V ADC:

 

±FS (±12Vref from U160/U165 w/o AFE):

 

Conclusion:
Replacing the -12ref amp divider gave the expected effect of lowering and flattening the noise and solving the issue with this particular U180.
It did not solve the difference in +FS vs. -FS noise (no clue where this difference originates from), but noise of 10NPLC is now much closer to 1NPLC (formerly it was quite off).
Additional filtering of the output of the reference gives quite some improvement, but might introduce additional TC and LTD (would not recommend this excessive filtering).
Additional filtering of the reference on A3 did not improve noise - might be due to already excessive filtering on A9 reference board.

The noise is approaching the physical limits of the design.
The major contributors to noise are the integration resistors 40k/50k (32nV/29nV) and jitter from clock + U180 logic/switches (30nV/ps).
Calculated with Kleinsteins noise calculator (w/o AFE):
Jitter   noise nV/rtHz   AZ noise nV/rtHz
0ps      53            75
1ps      61            86
1.5ps   69            98
2ps      80            113

Latest measurements of mods with AZ are around 95nV/rtHz for 0V, around 93nV for +12ref and around 98nV for -12ref.

[wanghar]

So, the factors that positively contribute to noise reduction are: replacing LT1001 with ADA4522 (U160/U165, and U151), the 4x10µF caps (C160/C165/C151/C152), replacing LT1001 with OPA205 (U110), replacing the internal 10K+10K inside U180 with an LT5400, plus the two additional 1nF caps. Would the significance of noise reduction follow the same order? (I'm guessing that replacing U170's LM358 with an OPA2206 won't have any impact on noise reduction.)

One more question: Is replacing the internal 10K+10K inside U180 with an LT5400-1 to reduce noise a general-purpose improvement, or is it specific to your particular U180 that has some noise defects?

[Kleinstein]

A 10 ohm / 4700 µF filter for the reference can be tricky: the normal LTZ1000 reference circuit does not like large capacitive load. The more sensible fitler would be more 1 K (maybe 100 ohms) and 1 µF only for the ADC.
The effect of reference filtering may be more relevant with a LTZ1000 ref. compared to a ADR1000 version.

Replacing U170 is for settling issue. One would normally not expect much extra noise from that, but more INL issues from that.
The measurements still show quite some noise improvement from that step. One possible change in the noise could be if one is just at the edge for the Zjump comparator and thus get randomly both cases for the Zjump offset. A different offset and fixed one case can be lower noise at excatly that voltage.

Replacing U151 should not have much noise effect as the 5 V reference is only used for a rather small part.
It is surprising to get lower noise from replacing the U180 internal 10K/10K resistors. if they are small area, they may still have some excess noise.
This could also be an individual unit thing. There are some variations in the noise reported on different units. The noise for the starting point of this unit is a bit on the higher side.

The last curves shown are for the 1 PLC mode. The real strength of the 3458 is however the linearity in the 10 PLC and slower modes. The linearity in the 1PLC mode may not be as good.
How much the modifications help at 10 PLC can change a little. I would expect a bit more from replacing U165 and U110 and the 10K/10K resistors as these are likely 1/f noise source. The U170 replacement should have less effect, as this is more a transient effect.

[MiDi]

One more question: Is replacing the internal 10K+10K inside U180 with an LT5400-1 to reduce noise a general-purpose improvement, or is it specific to your particular U180 that has some noise defects?

It is special feature of this particular U180, but it might give a TC improvement (if the particular ADC TC is high) - more on that in an upcoming post


Did another measurements of zero glitch and at ±1/3FS (2nd largest glitches).
The test setup is the same as in https://www.eevblog.com/forum/metrology/3458a-worklog/msg6184037/#msg6184037, but this time 1st unit as DUT and 2nd as measuring device.
Additionally for the ±1/3FS an adjustable voltage source was added at the DUT input to provide the offset of around ±4.6V.
As the used adjustable voltage source is not that stable/low noise, it introduces wobble and might result in lower peaks, so take the results with a grain of salt.

1NPLC:
0V: +4.6V: -4.6V:

10NPLC:
0V: 0V, all runs:


As a side product this test revealed another design flaw: the ZGJC introduces quite some TC - details and a fix in an upcoming post.

[Kleinstein]

The INL at +-4.6 V seems to be just barely inside the 0.1 ppm + 0.1 ppm FS INL specs. The test was for 1 PLC, and the specs are for 10 PLC / 100 PLC. Still the the test aroud 0 V with ZJ correction off the 10 PLC case seems to be not much better than the 1 PLC case.

[wanghar]

Haven't seen the 10 PLC INL with the ±4.6 V offset, but I'd guess it's way far better than 0.1 ppm. Also, the 1 PLC INL isn't actually that bad – it's just that noise pushes some points out beyond 0.1 ppm.

[Kleinstein]

How much better the 10 PLC case is compared to the 1 PLC case depends on the the mechanism behind the INL. For dielectric absorbtion I expect quite some improvement (not all the way a factor of 10, but still maybe a 8 times improvement. In my crude approximation I get something like (log t_int / t_rundown) / t_int  for the dependence on the integration time) this part is however expected to be small anyway for the fast modulation in the 3458.

Errors in the fine slope part (ladder part of the ADC) may be part of the repeated pattern that extends well beyond the peak. This part will be reduced by a factor of 10 for the 10 PLC case. The fine patterns seen besides the peak are not all noise.

For INL from interference via the supply or ground (e.g. switch to clock, switch to OP-amps, comparator to flip-flop, ...) that gets stronger with repeated patterns, the 10 PLC case may show the same effect, just with the finer scale on the voltage.
The same would apply to effects like load dependent GBW for the integrator.
Some thermal efffects may even get worse for the 10 PLC case.

For the error around 0V the 10 PLC case is better, but not very much (like 75%).

[MiDi]

Haven't seen the 10 PLC INL with the ±4.6 V offset, but I'd guess it's way far better than 0.1 ppm. Also, the 1 PLC INL isn't actually that bad – it's just that noise pushes some points out beyond 0.1 ppm.

Need to repeat the INL measurements at ±1/3FS for 1 & 10NPLC when a lower noise/drift adjustable voltage source is available.



Overview of ADC TC change with mods:

Mods	ADC TC (CAL72 vs CAL175) in ppb/K	Comment
unmodified	-347
ADR1000	-341
ADR1000, U160 ADA4522	-406	U151+U160+U165 socketed, U160: +12ref amp, TC change likely from LT1001 TC (maybe additionally from sockets)
ADR1000, U160+U165 ADA4522	-336	U151+U160+U165 socketed, U165: -12ref amp, back to original TC indicates LT1001 TCs were matched (or coincidence?)
ADR1000, U160+U165+U151 ADA4522, U170 OPA2206	-335	U151+U160+U165+U170 socketed, U151: +5ref amp, U170: DC_BUF & FET MOD, no significant TC change expected
ADR1000, U160+U165+U151 ADA4522, U170 OPA2206, 4x10µF	Unreliable: downtime/high drift (-163)	U151+U160+U165+U170 socketed, 4x10µF: MKS2 C151+C152+C160+C165, from my estimation there should be negligible TC effect (10µF measured <300pA leakage 10V/21°C)
ADR1000, U160+U165+U151 ADA4522, U170 OPA2206, U110 OPA205, 4x10µF	Temp range <1°C (-239)	U110+U151+U160+U165+U170 socketed, U110: integrator, no effect on TC expected as offsets are rejected by AZ
ADR1000, U160+U165+U151 ADA4522, U170 OPA2206, U110 OPA205, 4x10µF, RN	-73	U110+U151+U160+U165+U170 socketed, RN: LT5400 10k for -12ref (replaces internal RN), most of TC improvement is expected from RN
ADR1000, U160+U165+U151 ADA4522, U170 OPA2206, U110 OPA205, 4x10µF, RN, LPF	-117	U110+U151+U160+U165+U170 socketed, LPF A9 ADR100 output: 10Ω - 4700µF (low leakage) || 100nF, should not have an effect on TC -> implausible
ADR1000, U160+U165+U151 ADA4522, U170 OPA2206, U110 OPA205, 4x10µF, RN, LPF, 2x1nF	Temp range <1°C (-118)	U110+U151+U160+U165+U170 socketed, 2x1nF C0G: ZR_HI/ZR_LO & U110 +IN(ZR_LO)/AGND, no effect on TC expected
ADR1000, U160+U165+U151 ADA4522, U170 OPA2206, U110 OPA205, 4x10µF, RN, LPF, 2x1nF, ZGJC disabled	-11	U110+U151+U160+U165+U170 socketed, ZGJC disabled: R184 (ZJUMP 619k: 0V or +400mV offset) & R185 (3Meg/-12ref: -200mV offset) disconnected from rusn1, TC effect plausible (see details below)
ADR1000, U160+U165+U151 ADA4522, U170 OPA2206, U110 OPA205, 4x10µF, RN, LPF, 2x1nF, ZGJC disabled (R185 connected)	-26	U110+U151+U160+U165+U170 socketed, R185 (3Meg/-12ref: -200mV offset) connected back to rusn1, R184 still disconnected (ZJUMP 619k), TC effect plausible (see details below)
ADR1000, U160+U165+U151 ADA4522, U170 OPA2206, U110 OPA205, 4x10µF, RN, LPF, 2x1nF, ZGJC R185 ±12Vref	-24	U110+U151+U160+U165+U170 socketed, ZGJC R185 ±12Vref: R185 (3Meg) switched between + and -12ref with ADG1219 steered by ZJUMP (±200mV offset), TC effect plausible (see details below)

Details in the attachments (selection provided, as only 10 attachments allowed)
For the TC & drift fitting, penalized linear least squares was used (linear TC & cubic B-spline drift with discontinuous segment offsets after gaps and 3h warm-up exclusion).

Exchanging the RN for -12ref amp was primarily done to get rid of the excess noise (see previous posts), but for this specific U180 it occasionally was the major contributor to the ADC TC.
This is not applicable in general: it will only decrease TC for specific U180 and additionally LT5400 has some spread on tracking TC itself.

The effect on TC after adding the LPF at the output of the ADR1000 makes no sense, any ideas?

At first, disabling the ZGJC was only done to measure the INL glitch at 0V, but glad I decided to have a look at the effect on TC additionally.
Quite a surprise, first thought the large effect on the ADC TC made no sense at all.
After some deeper investigation, it became clear that the high TC of the rusn1 switch in conjunction with the resistors R184/R185 of ZGJC introduces TC around -100ppb/K.
This revealed another design flaw, which can simply be fixed by adding a SPDT switch and removing R184.
R185 (3Meg) switched between + and -12ref with switch (ADG1219) steered by ZJUMP (±200mV offset).

ZGJC mod:

Configuration	abs. TC in ppb/K	TC change in ppb/K	theoretical TC change in ppb/K
w/o ZGJC	-11	0	0
with ZGJC	-118	-107	-109
R185 only	-25	-14	-19
R184 only (calculated)	-104	-93	-91

To calculate the theoretical TC change the following equation was used:
$$ TC_{\rm ZGJC} = -\frac{ R_{\rm sn} \cdot TCR_{\rm sn} \cdot \left(\frac{1}{R_{\rm jp}}+\frac{1}{R_{\rm jn}}\right) }{ \left(1+R_{\rm sn}\cdot\left(\frac{1}{R_{\rm in}}+\frac{1}{R_{\rm jp}}+\frac{1}{R_{\rm jn}}\right)\right) \cdot \left(1+\frac{R_{\rm sn}}{R_{\rm in}}\right) } \quad{\rm with}\quad R_{\rm sn}=14.4\,\Omega,\quad TCR_{\rm sn}=4000\,{\rm ppm/K},\quad R_{\rm in}=50k,\quad R_{\rm jp}=619k,\quad R_{\rm jn}=3Meg $$

CAL72 calculation:

Code: [Select]

CAL72 = CAL2 * 100 * RAM[A5+0x14B8] / measure_sum_40058(10)
CAL72 = DCV gain 10V (ACAL)
CAL2 = 7V Reference (CAL)
RAM[A5+0x14B8] = line period in units of 100 ns (LONG (10E6/LFreq + 0.5), written by command LFREQ: when power is applied, the multimeter measures the line frequency, rounds it to 50 or 60 Hz and sets the A/D Converter's reference frequency to the rounded value
measure_sum_40058(10): Calls 0x040058 with N = 10 to obtain a differential measurement sum
differential measurement sum:
add measurement from first phase configuration
subtract measurement from second phase configuration
-> That would fit to the 10NPLC measurement of 7V and 0V at the beginning of ACAL DCV (ALL)

A3 Schematics:     from: https://github.com/EleDes/3458A-A3-Schematic-KiCad

[Kleinstein]

With the Zjump correction from +-12 V, one may want to increase the the resistor R185 to more like 10 M to get a similar shift as with 0/5 V switching.
A nice find that R184 has a somewhat significant effect on the TC. It is still in the range, where depending on the unit this could be bad or good for the overall TC.

The reference filtering could be effect from capacitor leakage and with an electrolytic capacitor also from delayed thermal effects. The filter not only filter reference noise going towards the ADC, but also current noise form the ADA4522 going back to the reference. With the relatively long cable from the reference to the ADC and the relatively have frequency part in the AZ amplifier current peaks there can be odd RF effects, both with and without the filter.
With the ADA4522 at the ADC it absolutely makes sense to have some filtering. One may not need a very low cross over frequency though: filtering the low frequency reference noise is very hard.
The more relevant frequencies for the the filter would be higher: ~ 1-100 MHz for the ADA4522 spikes and  20-200 kHz for reference noise aliasing with the ADC reference modulation frequency. So a smaller capacitor could be enough and it may matter at what end for the cable the filtering is.

[MiDi]

With the Zjump correction from +-12 V, one may want to increase the the resistor R185 to more like 10 M to get a similar shift as with 0/5 V switching.

Rusn1 is a virtual (near) 0V:
R184 619k 0/5V: 0/+8µA (0/+400mV)
R185 3Meg -12ref: -4µA (-200mV)
R184 + R185: -4/+4µA (-200/+200mV)

R185 3Meg -12/+12ref: -4/+4µA (-200/+200mV)

R185 10Meg -12/+12ref: -1.2/+1.2µA (-60/+60mV)

This does not comply with your statement.

A nice find that R184 has a somewhat significant effect on the TC. It is still in the range, where depending on the unit this could be bad or good for the overall TC.

For the individual unit the ZGJC fix only improves the CAL72 TC if lower than -60ppb/K initially.
For higher than -60ppb/K according to theory an additional resistor between rusn1 and AGND gives ZTC:

$$R_{\rm tc\_comp}=
\frac{
R_{\rm sn}\cdot\left(TCR_{\rm sn}-TC_{\rm CAL72}\cdot\left(1+\frac{R_{\rm sn}}{R_{\rm in}}\right)\right)
}{
TC_{\rm CAL72}\cdot\left(1+\frac{R_{\rm sn}}{R_{\rm in}}\right)^2
}$$

E.g. for +0.5ppm/K CAL72 TC a 115k resistor would give ZTC.

The reference filtering could be effect from capacitor leakage and with an electrolytic capacitor also from delayed thermal effects. The filter not only filter reference noise going towards the ADC, but also current noise form the ADA4522 going back to the reference. With the relatively long cable from the reference to the ADC and the relatively have frequency part in the AZ amplifier current peaks there can be odd RF effects, both with and without the filter.
With the ADA4522 at the ADC it absolutely makes sense to have some filtering. One may not need a very low cross over frequency though: filtering the low frequency reference noise is very hard.
The more relevant frequencies for the the filter would be higher: ~ 1-100 MHz for the ADA4522 spikes and  20-200 kHz for reference noise aliasing with the ADC reference modulation frequency. So a smaller capacitor could be enough and it may matter at what end for the cable the filtering is.

Sure it will have an effect on the value and drift/TC for the reference (ZR_HI), but for the ADC gain drift/TC?
Definitely would not recommend implementing the LPFs presented here in other units.

To lower the reference noise into insignificance an active LF LPF could be used, that would give the advantage of using a low LTD LTZ1000 with higher initial noise compared to ADR1000.
Active LPF propossal: inverting LF LNA with e.g. 10µF - 1Meg input (~16mHz corner frequency) and e.g. 4x OPA828, combine the outputs from LTZ1000 and LNA with a RN that cancels the gain of the LPF.
That would attenuate the noise from LTZ1000 nearly down to the NF of the LPF effective to <1Hz.
For AZ the key is to have the flat noise part inside the BW (e.g. <2.5Hz for 10NPLC 50Hz).

[Kleinstein]

I am afraid a low pass filter with a very low cross over could easily add drift. With 1 Meg ohms it only takes 1 pA of change in the leakage / bias current to get 1 µV of voltage drop. It may be possible, but quite some effort, up to the point that a 2nd LTZ reference could be cheaper and definitely more reliable.

The part of the reference noise that can be filtered out are the higher freuquency part that aliases back from the feedback modulation (e.g. 20 kHz -200 kHz). This part is also effective (even a bit more than with voltage) when reading 0 V.  This filtering would not need much, like an 1 kHz cross over.

Another part one could filter out is around 2.5 Hz for 10 PLC (and higher) and 25 Hz for 1 PLC. This part gets a bit more weight than one might expect, as half the time is spend reading zero and thus not really following low frequency noise of the reference. Like the classic reference noise this noise part would be effective proportional to the input voltage. Because of the 1/f nature the classic noise part would normally still be the more important part.

[MiDi]

I am afraid a low pass filter with a very low cross over could easily add drift. With 1 Meg ohms it only takes 1 pA of change in the leakage / bias current to get 1 µV of voltage drop. It may be possible, but quite some effort, up to the point that a 2nd LTZ reference could be cheaper and definitely more reliable.

Not too complicated nor expensive, just add second stage LPF with e.g. 1000µF/10k, POC example attached.

There is a significant difference between AZ noise at 10NPLC filtered (orange) vs unfiltered (green, 2nd unit stock), comparison of short for 1 vs. 10NPLC attached.

[Kleinstein]

There is a significant difference between AZ noise at 10NPLC filtered (orange) vs unfiltered (green, 2nd unit stock), comparison of short for 1 vs. 10NPLC attached.

I expected some improvement from reference filtering also for the shorted input. However I am a bit surprized the effect is that large. It is still a bit tricky to calculate as the noise specs for the LTZ1000 don't go all the way to 200 kHz and the details of the ref. circuit can give noise peaking just in that range.
The reduction in noise for the shorted case should be from the relative high frequencies (like > 20 kHz and especially around half the FB loop frequency), not the rather low frequencies. To remove that part a simpler filter would be sufficient. I have seen a large effect in the noise when the filtering is removed also with my ADC. Because it have a more noisy LM399 ref. the noise about doubled without the filter ( 5 K and 6.8 µF effectively muliplied by 2.9).

The filter / noise cancelation circuit is a nice solution. Most real world ref. circuits would like the reference part a bit higher impedance (e.g. 100 ohm and 1.02 M), but that is easy.