HP 34401A hacks and upgrades

[Kleinstein]

The resistor for the RC filter does not have to be stable. There would be no problem using the cheapest carbon type or Pt1000. A moderate change in the time constant is absolutely no issue. Depending on the position on the PCB a large thermal EMF at the resistor could be an issue, but usually not much temperature difference over a 603 size resistor.

The filtering part is a compromise: a larger resistor give additional white noise and some extra drift from drift in the AD706 input current.
A 47 K resistor could be a sensible compromise. The cross over is just low enough to get much of the 3 or 2.5 Hz noise band from the 10 PLC AZ cycle sampling the reference mainly half the time only.
The part of the reference noise that is removed is still not much, especially with a ADR1399 reference.
For the 10 PLC case the noise part would be roghly 2-4 Hz * 50-100 nV/sqrt(Hz) or some 100-200 nV RMS noise that could be removed. compared to the ADC noise this is still only relatively little. So not sure much filtering is really worth it.
Filtering the really low frequencies (like < 0.1 Hz) as seen in logging are very hard to filter anyway. Here the ADR reference would be the main step up.

[iMo]

I've repositioned the 3u3 at the input of the U401B (powering the MCU_ADC and 4053) to be not so close to the 399 and added the snubber as well..
 

PS: What to do with the +5REF (of the MCU_ADC) decoupling?
There is 10nF only (I will doublecheck its value on the pcb later on)..
I will try to place an additional 10nF smd close to the MCU directly at the pcb..

Btw., it calls for an additional buffer opamp dedicated to the +5REF, placed on the top of the MCU (with a groundplane on the bottom side of a small pcb)..
All is needed is a small cut of the +5REF trace close to the MCU's pin.

[Kleinstein]

For the µC Vref filter one has kind of 2 options:
a) large capacitor, so that the voltage does not drop from an ADC conversion. One should also have only a small drop, even for high speed conversions. So one may want less resistance.
b) rel. small capacitor, so that the RC filter settles before the next conversion (e.g. < 1 ms range for the faster modes !)
  100 ohms and 10 nF would be 1 ms and thus could be just recovering in time.

Another 10 nF might cause issues (noise) with the very fast conversions. If at all maybe add a lot of capacitance, like 10 µF to be more in the first regime.

One could try something like an extra, buffer for less drop / lower noise, but it is still only a 10 bit ADC with not very low noise to start with.
One may not even need to cut a trace: one could remove the R449 and use the pad for wire. The extra buffer could be from the input of U401B, so not in series with the existing butter, but separate.

[iMo]

With low noise zeners and good decoupling, I would expect at an ideal situation we see a kind of banding with the ~10bit adc.
Like when the measured voltage will stay within 1LSB of the MCU_ADC for some "longer" duration..

[Kleinstein]

The auxiliary ADC is used for the difference from start to end. Which values are actually used is kind of random. This way INL errors of the µC internal ADC cause some extra noise there. Also the µC internal ADC is likely not super low noise to start with as it uses a pretty small sampling capacitor. Another point is the accuracy of the scale factor and having 2 difference values.

So I would not expect the overall result to be that stable to see stable values over repeated readings. If at all this may happen with the shortest integration times and thus limited overall resolution. So I would expect a hystogram well wider than just a few quantization steps.

[iMo]

As the LM399#2 was telegraphing heavily I replaced it with LM399#7 with no morse (yet) but a little bit more noise.
While waiting on the low TC resistors, out of curiosity, I soldered in a 100k (0805 smd noname used, 100-200ppm/C) and fresh wima 3u3/50V red brick (glued in close to the AD706 U400A package).

The resistor did not fit into the extremely limited space therefore I used thin copper wires. The capacitor is wired in with thin copper wires as well. Capacitor is grounded in the same point as the snubber is (snubber is at the bottom side of the pcb). After some troublesome soldering I had not cleaned the pcb (because of tiny preliminary wiring), closed the dmm case (no additional foam hat on the 399) and let it ran overnight.

Below is the result - the expected level was ..135uV (measured before). Done with 10NPLC against the ADR1001#1.

Till the morning it [partially] settled down at aprox ..175uV, so the diff is about +40uV at the "10V", it means the input of the 706 dropped down by 40*0.7= 28uV.
With 100k R it means some 280pA through the R, assuming the C_leakage "much" lower than the input current of the 706, the 706's  input current might be say 200pA (at say aprox 45C pcb temp, the aluminum shield above the pcb is at aprox 41.5C).

The initial capacitor leakage and TC may comtribute as well..

The shape of the relaxation after soldering close to the 706's package is pretty similar to the issue I mentioned couple of times - when my 34401 is switched off for a longer period the initial power on follows that shape with an initial up by 2-3ppm and then after couple of days it reaches the expected values. So it seems to me it is caused by the 706 epoxy package stress induced by the pcb.

EDIT: above deleted as it was a wrong deduction. Later on you may see the initial bump up and then relaxiation down is caused by the large leakage of the capacitor in the RC low pass, and the TC of the leakage, and of forming of the capacitor in time. With larger temperature, like 40C in the box, the leakage rampups significantly (it creates large voltage drop on the R and therefore the dmm's voltage reading tops) and then the C leakage slowly goes down (and the dmm's voltage reading goes down as the R drop lowers).

PS: noise with the RC filter - will be measured later on..

[iMo]

Ok, installed fresh resistors from a reputable vendor, went fine, even the exercise is not for fainthearted makers..

After an initial cleanup I fired up the meter - see below - and let it run overnight. The initial warmup looks pretty different compared to above LM399#7 and preliminary wiring. Below some data.

Note: the meter's 10V range has not been adjusted against my ADR1001#1 yet so it does not show the "proper 9.999896V" but 10.120.505 because the ADR1399#1's voltage is way lower than the HP399's one.

Because of kind of weird results I stopped the measurement this morning and double checked the voltages - ADR1399#1 shows 6.921V and all the other voltages look ok as well.

Now - the issues - the 6.921V creates 10.120500V against my ADR1001#1 reference, so the resolution is 1uV via serial (all my measurements before were below 10V with the "additional 7th digit"), the +5REF is now much lower as well.

The STD below is way much higher (one would say "all over the place") than with any previous 399s, also see the missing code in the TC plot.. With higher internal temperature the STD increases. So we have to investigate.. 

Note:
- the TC plot below is against the internal dmm temperature during the warmup
- 10NPLC against ADR1001#1
- STD over sliding 100samples (40secs)
- the 47k (RN73R1JTTD4702F10CT-ND) and 820 ohm (RN73R2BTTD8200F10CT-ND) resistors are [should be] 10ppm/C thin film one (digikey), the snubber's R is a piece of manganin wire with aprox 6ohm
- I also replaced one zener dropper in +15V (BZX84C3V3) (was TH).

I let the meter run for a couple of days while thinking why the STD is such huge, and then I will adjust the 10V range against my ADR1001#1..

PS: could it be those resistors are such noisy?..

[Kleinstein]

When changing the 5 V Vref, one would need a new value for the internal CAL constant for the µC internal ADC. If not one gets additional noise and DNL error (may not be visible for the 10 PLC case, but could with 1 PLC and less). One may see this extra error in the histogram for 1 PLC conversions.
Without a new adjustment ( ? service CAL ?) changing the VREF part significant is no a good idea.
The higher noise could be from this adjustment. The extra noise would also be more with shorter integration.
If there is no way to do the software adjustment, one could trim the 5 V analog and aim for lowest noise with a fast (e.g. 0.02 PLC) mode.

Both the filter resistor and the snubber are not critical for the resistor quality: the TC, excess noise and exact value don't matter. So a +-20% 5000 ppm/K would be no worse. For the snubber parasitic inductance could be an issue, but likely not so bad.
Excess noise does not matter because the resistors see essentially no current.

[iMo]

The adjustment could be done via front panel, I did it many times before. Of course it must be done, I want to do it step by step.
Hopefully it can accomodate the +5REF change when lower, with higher +5REF it showed "typical STD" without adjustment (with four 399s I had in there, with voltages 7.002, 7.026, 7.063 and 7.23V[MAC199] the STD was inside an say 1.6-2.1uV window).
Btw +5REF "should be close to the MCU_VCC" so the divider would perhaps need some adjustment as well.. No idea what -XXmV does there..

The 820ohm sees 3.6mA (but the zener's r=0.2ohm so perhaps its TC and noise is not so critical)..

PS: [OT] An anecdotal remark: those resistors are "..with improved moisture resistance by high humidity protective coating, low current noise, high reliability.." one. ..so they can keep moisture for a long time.. 

[iMo]

Running overnight with adjusted 10V and ADR1399 (10NPLC) - preliminary..
Below ADEVs (TimeLab), the HP399 one were long measurements at 100NPLC and with larger ambient temp changes during the night.

[iMo]

After adjusting at 10V range the STD looks similar to that of the LM399#7 - see below.
The difference for integration times below 100secs one can see in the above ADEV.

So my preliminary conclusion:
========================

1. the ADR1399 in HP34401A may help when the original HP399 pops, jumps, drifts too much, or random walks (my case).

2. as Kleinstein indicated couple of times - the filtering around XX399s in HP34401A has minor effect, the HP34401A's noise is dominated by the a) ADC, b) ADC_MCU and c) the DUT (ADR1001#1 in my case, "noisy").
That is visible with shorted input measurement of the STD where it was within an 1.3-1.9uV window. The xx399s and ADR1001#1 added perhaps 200-300nV on the top.

3. the other experiments/hacks may be focused on the filtering or buffering around ADC_MCU, and/or replacing the OP27 or AD711 or both in the ADC..

=======================

I will now let the ADR1399 run for several weeks and observe.
And during our regular summer metrology meetup at my yacht on Frigate Bay Beach we may try with Jaromir to measure his ultra low noise DUTs.
 

[Kleinstein]

Replacing only the AD711 would not help much. Replacing the OP27 may help and also replaceing the AD711 would make it easier (or get away without) to adjust the resistors.

It really looks like adjusting the 10 V also fixed the noise issue, likely by also adjusting the µC internal ADC scale factor.

[iMo]

I may try to play with the decoupling of the MCU_ADC (+5REF) later on when the new ADR1399 settles itself.
Perhaps there is a value of the capacitor C449 (10nF today) where the MCU_ADC's noise is "minimal". Also its increase to a much larger value (like that 10u discussed above) is worth trying.

For the adventurous hackers the adding of a separate buffer in front of the +5REF MCU's input might be an interesting experiment as well.

Replacement of the OP27 and AD711 has to be planned with great care, imho.

[Kleinstein]

When testing the µC ADC internal noise, it would likely make sense to do the test with 1 PLC or even super short integration. This gives more noise contribution from the µC internal ADC. The 10 PLC case already has some of the integrator noise.

[iMo]

Btw., I've seen this when playing with the C449 today..
With 10u it was at 5uV std all the time, with 5n6 added (drop by 2ppm) it was lower std than shorted for aprox 5 minutes with box opened. When box closed it goes up to 1.6-2uV std. The lowest std I saw was wandering between 1.23-1.35uV..
The RC filter and powering at the +5REF MCU_ADC needs some tweaking, there is a clear dependance on internal temperature somewhere..
PS: I wired the ADR1001 reversely, the minus range not adjusted. All with 10NPLC.
Orange the std sliding over 100samples.

[Kleinstein]

1.6 - 2 µV would be a sensible std for the 10 PLC mode. For testing the effects of VREF filtering, I would look at the noise in the 1 PLC mode. This has 10 x the influence of the µC internal ADC and is thus more sensitive to changes at the filtering.

From the µC datasheet the ADC gain is not very temperature dependent. Also the integration capacitor should normall be a C0G type and thus low TC.
One may check how much the 5 V supply to the µC changes with temperature. This might effect the current for the Vref pin and this way the Vref.

[iMo]

The problem with 1PLC might be the data rate and processing (like the std).. Never tried with 9k6 serial and 1PLC.. I think I have the std in directly the meter's menu, I will check later on.. Enough for today..

[Kleinstein]

9600 baud should be just fast enough for 1 PLC auto zero date (some 24 or 29 SPS depending on mains frequency).
They give some 55/s  for 4.5 digit mode. As the noise in AZ mode is approximately white noise it would not matter if reading are slower with extra delay.

[iMo]

Below the AC signal at C449 (10n+5n6 cer.), 10NPLC 10V in. DC 4.918V. Box opened. Scope floating (isol.trafo).

[Kleinstein]

There are quite some spikes in the ref. voltage, that are likely mains frequency related (50 Hz). Are they real or more an artifact from probing.
If it is really in the signal and mains related, I would consider starting to look at the rectifier (maybe reverse recovery spikes from a slow rectifier and sharp edges in mains) and initial filtering. Maybe also look at the normal supply.

[GigaJoe]

i'm not much familiar with schematic ...
but for U401 , input voltage divider terminated to AGND,  capacitor to GND ( can be same of split ground)
I think, R422 are failsafe to avoid negative output during transition process ..
it can be source of noise..

[iMo]

Re those 20ms peaks - there is a suspicious signal "LSENSE" (most probably sensing the mains frequency) derived from a transformer winding via a 42k resistor and 6.2V zener CR554, fed directly into a MCU's pin.
The 50Hz almost square signal (there is a 100n capacitor parallel to the zener) at the zener is from 5.7V to -0.7V. This may create mess via ESD diodes, imho.
Btw there are aprox 100-300mV peaks of various freqs between all inguard ground segments.. It is a 2 layer board..

[iMo]

i'm not much familiar with schematic ...
but for U401 , input voltage divider terminated to AGND,  capacitor to GND ( can be same of split ground)
I think, R422 are failsafe to avoid negative output during transition process ..
it can be source of noise..

That R422 (46ohm) is a part of the RC filter for powering the 4053 switch in the integrator.. There are 5BV (5V for logic) and 5VB (the 4053 Vcc) voltages.. So the U401B is powering both MCU_ADC (+5REF) and 4053 integrator switch (via that +5VB output).
Above scope pictures are from +5REF signal - power of the MCU_ADC (both ref and digi/analog logic of that MCU_ADC).

Power up is done by R406 and CR404 diode..

[Kleinstein]

A signal the exceeds the supplies like the Lsense signal is really bad. Even if it does not damage the chip the extra substrate current can cause malfunction, like extra input bias or higher than normal noise. So limiting the LSENSe signal before it reaches the µC can be a good idea (may get away with shottky diodes).

[iMo]

I wired a 3.9V in parallel as quick fix and the the voltage at LSENSE is from 3.9 to -0.7, but the result is 10.120V instead of 9.999..
This entire meter is build around zeners..   
Would need a 5.1V zener and a schottky in parallel, or those two schottky one..

OK with 2x BAT42 I get 5.30 to -0.38V and it shows 9.999.. I let the 6.2V zener there..