HP 34401A hacks and upgrades

[iMo]

The 34401A does not return all numbers (when talking 6th and 7th decimal digit in case of voltages <10V) - see the thread on 34401A digits.
Below the .zip with .csv 624k samples from the measurement with missing bin.
Time, Elapsed_millis, DMM_temp, AMB_temp, DMM_voltage_raw (in exact string as it comes from 34401A serial).
You may investigate..

PS: the math inside 34401A is int32, with many tricks to fit into. It seems the final floating point format printed out via hpib/serial is simply formatted off that int32 math..

See - 95% of the voltage values (in that 624k samples) have got only 7 variants of the last 2 digits pairs :

Code: [Select]

Observed digit pairs:
---------------------
26 :   139231 ( 22.31%)
36 :   120347 ( 19.28%)
15 :   118180 ( 18.94%)
05 :    74726 ( 11.97%)
47 :    71851 ( 11.51%)
94 :    37887 (  6.07%)
57 :    29695 (  4.76%)
83 :    15619 (  2.50%)
68 :     8346 (  1.34%)
73 :     5014 (  0.80%)
78 :     1588 (  0.25%)
62 :     1209 (  0.19%)
89 :      203 (  0.03%)
52 :      184 (  0.03%)
41 :       24 (  0.00%)
99 :       17 (  0.00%)

[iMo]

As the 100PLC looks almost identical as the 10PLC (see above the ADEV live) let me wrap up the HP399 replacement exercise:

1. the noise in 10V range at 10PLC and 100PLC went down by say 30%
2. in the RC lowpass after the ADR1399 the leakage of the C is extremely important, should be lower than 100pA at 45degC for best performance
3. the higher the R the more the leakage of the C is pronounced, the leakage and its TC (and other effects related) may create nasty slow fluctuations and hysteresis
4. the minimal RC configuration I would consider is R=10k and C=100-470nF (ie. MKP one with low leakage)
5. I would avoid Wima X.XuF red bricks for 50V= which have small physical size but large leakage at 45C..

The additional attempts to decrease the 34401A's measurement noise may include:
  a) adding a fast buffer into the +5REF of the auxiliary ADC
  b) replacing the OP27 and the AD711 in the integrator (with the divider ratio change based on the opamps used as per Kleinstein's advise above).

[Dr. Frank]

As the 100PLC looks almost identical as the 10PLC (see above the ADEV live) let me wrap up the HP399 replacement exercise:

1. the noise in 10V range at 10PLC and 100PLC went down by say 30%
...

The additional attempts to decrease the 34401A's measurement noise may include:
  a) adding a fast buffer into the +5REF of the auxiliary ADC
  b) replacing the OP27 and the AD711 in the integrator (with the divider ratio change based on the opamps used as per Kleinstein's advise above).

Noise improvement is only as I expected recently: https://www.eevblog.com/forum/metrology/hp-34401a-hacks-and-upgrades/msg6245077/#msg6245077

Yes, please check the newer OpAmps, if they are giving any improvement.
Thanks for your research!
Frank

[iMo]

..Yes, please check the newer OpAmps, if they are giving any improvement.

The replacement of the opamps in the integrator has to be planned carefully.
Without having some indication (off an analysis or a simulation) the improvement will be, say, another at least 30-50%, I most probably will not do it.
When playing with the 1399 only there is always a chance to revert the changes back without introducing some irreversible effects.
My measurement/adjusting options are limited today so messing with the ADC's opamps is an exercise perhaps more suitable for people with easy access to high-end gear (to evaluate the impacts of such a change)..

[Kleinstein]

I just put the numbers in my spreadsheet for calculating the ADC noise. The numbers are not super accurate, as some numbers (e.g. jitter, µC noise) are just not known. At least the not op-amp related part is the same in both cases.
With the original OP27 it gives 1.39 µV RMS for 10 PLC (and shorted input).
With noise data of an OPA140 (13 nV/sqrt(Hz) at 2.5 Hz) it gives 0,97 µV.
With noise data of an OPA205 it gives 0,96 µV.
That would be around 30% less noise for 10 PLC. Starting with a little more measured noise (1.5 µV) this could mean more noise from other source (e.g. jitter and the µC) and thus a bit less noise reduction.
There is still quite some uncertainty on the OP27 current noise, as the main noise source from the OP27. I assume 4.5 pA/sqrt(Hz) at 2.5 Hz as the effective frequency for 10 PLC (50 Hz).
So I would expect roughly 20-40% noise reduction for 10 PLC.
For 1 PLC the difference would be quite a bit smaller as the µC internal ADC would dominate and there is less current noise at the higher frequency.

[iMo]

The OPA205 has almost the same GBW as the AD711. Would it not introduce some instability/ringing etc? That may require different compensation of the opamps (ie. messing with caps and/or increasing the divider ratio between 205 and 711 somehow)..

[Kleinstein]

The OPA205 would be a replacement for the OP27, not for the AD711.
In the 34401 the OP27 is used for the precision part. That OP-amp needs low noise also at low frequencies, with a source resistance of some 15 K.
The current noise is the weak point of the OP27, especially at the relatively low frequency of 2.5 Hz for the 10 PLC mode.

The OP27 has a divider 8.2K 1 K behind it to effectively slow it down to a bit under 1 MHz. So the replacement for the OP27 should have at least 1 MHz GBW, ideally a bit more. The OPA205 is a little slower (3.6 MHz vs 8 MHz) and would thus want less divider (like 3 K and 1 K - may need to tweek it a bit) if used with the AD711. If it rings too much, one might want an extra 100 pF + 220 ohm to ground at the integrator input.

The AD711 is only the 2nd OP-amp in the integrator and essentially only needs to be fast and low current noise (e.g. any fast FET type would work).
The AD711 is a bit odd choice here. Faster would be better, but could have been a cost factor.
A slightly faster OP-amp would speed up settling / have less ringing at the integrator input which should not have a negative effect on INL. It would make the divider less critical, with an easier balance between speed and ringing for the integrator.
There are now many FET types with GBW in the 10 MHz range to choose from (e.g. OPA172, OPA197, OPA141, OPA1641).  I don't like the TLE2071 very much as it gets extra supply current when saturated to one side. The OPA1677 would be OK, but AFAIK is not available in SO8.

Good combinations are:
OPA205 (in place of OP27),  divider R420 -> 2.2 K and an OPA172 / OPA141 / OPA1641/ OPA197 (a bit lower power) in place of the AD711
or
OPA140 or OPA141 (in place of OP27),  divider unchanged and an OPA172 / OPA141 / OPA1641 / OPA197 in place of the AD711

For my ADCs, I have (or had) working combinations with  OPA145+TLE2071, OPA1641+OPA172, OPA141+ 1/2 of OPA1642. The later 2 are with a 6.8 K / 1 K divider, but 8.2 K and 1 K would work too.

[grx]

Here is a new hack: VFD replacement!

[iMo]

Another hack with the above LCD display could be to introduce median instead of the average HP natively makes in order to get their 100PLC and add the 6th decimal digit as it comes off the hpib/serial (but not sure the VFD protocol supports the 6th).
Easy to add into that stm32F103 used in that LCD controller.
Below ADEV at 10PLC with median vs the native 100PLC (I do the median in my stm32F103 hanging on the serial output).
You'll get a different meter  ..

[iMo]

..For my ADCs, I have (or had) working combinations with  OPA145+TLE2071,..

@Kleinstein: what your excel calc would show for the OPA145+AD711 and OPA140+AD711 combos?
PS: asking as I have the 140/145 handy and the 711 is not so off of the others in that position (like 16V/us vs 20V/us, not sure how it is with settling time). The 145 is a little bit worse in TC of its offset against the 27 and 140. Also the input current of both 140/145 will rise 4x inside the box (compared to ambient).

[Kleinstein]

Noise wise the "fast" OP (AD711 in 34401) in the compound integrator should not matter. At least I don't have it in my calculation. It may have a small influence for the noise the µC internal ADC sees from the higher frequency part, but this should still not be much. The µC internal ADC is way more noisy than the AD711.
The OPA145 has marginally higher noise than the OPA140/141, but the difference is not large and one would hardly notice the difference.

The main point of replacing the AD711 would be to make it easier with the stability. With the OPA140 + AD711 one would have to tweak R420 (about 9 - 12 K range) and maybe add a RC element to the integrator input.
Ideally it should not be that tricky as it worked with the OP27 / AD711 combination. The relevant frequency should be some 1 MHz. The phase reserve around 1 MHz for the OPA140 should be even a bit higher than for the OP27. The OPA145 has a little less phase reserve, but still similar to the OP27.

If the combination OPA140+AD711 causes too much ringing, one could still change the AD711 to something like OPA141 or OPA172, which would make it easier (R420 = 5 K .. 10 K should work) to get a stable and fast settling solution.

[iMo]

..and finally the STD and ADEV with shorted inputs..

Edit: added ADEV/MADEV with more samples..

[TUMEMBER]

..and finally the STD and ADEV with shorted inputs..

Could you apply the variation study to the "data from the top image"?
I am curious about the "value" and how it improves with subsequent modifications, is there a trend visible?
variation-analytical statistics ----  Homoscedasticity_and_heteroscedasticity

[iMo]

..let us wait on the improvements in the Statistical Package from GigaJoe, perhaps he will put there the variation analysis.
So far the trend is visible, the mean of the sliding STDs went down from 1.85uV to 1.45uV (with 10V ADR1001 input) and with the shorted input it is 1.39uV.

PS: Out of curiousity I asked Chatgpt to say something about the ADEV picture above and it basically said "..the taus till tens of secs are not dominated by the OP27's input current flicker..", "..the replacement of the OP27 with OPA140 may show some improvements for taus in the region of 100-5000 secs..".. But generally it suggests to be not overly optimistic about the result of the OP27 replacement..

The Grok in opposite said "..The dominant 1/f signature across this tau range (~1s till thousands of secs) aligns strongly with input current noise from the OP27 (bipolar) interacting with the high source impedance at the integrator summing node..", "..Probability of noticeable improvement: Quite good — I’d now [Note: after I told him the AZ was ON] estimate 18–35% reduction in the mid-to-long tau ADEV region and in the sliding STD average. Realistic target after swap: average sliding STD around 0.95–1.20 µV, with the ADEV curve shifting downward nicely in the 1–1000 s flicker region.." and it recommends me the swap of the OP27 for the OPA140 as the first step..

PPS: added NSD with the shorted inputs (the data are same as the above ADEV)..

Code: [Select]

================ NSD ANALYSIS ================

Samples              : 194427
Start time           : 0.000000 s
End time             : 78594.275000 s
Median dt            : 0.404000 s
Estimated fs         : 2.475 Hz
Record length        : 78594.27 s
DC mean removed      : 9.976697e-06 V
RMS noise            : 1.396133e-06 V
Integrated noise     : 1.395591e-06 V_rms

[iMo]

A sim with the 34401A's ADC - OPA140+AD711 with various R420 and R421.
This is not multislope (the ASIC logic is missing), but a sim for a look at signals around the opamps with different R420 and R421.
PS:
a) the first R parameter in the list is green..
b) the COMP goes to ASIC's comp set to 2.5V
c) the CMP goes from ASIC to the 7474 Data input (synced by clock)
d) the 7474's creates 2 sigs for B and C inputs of the 4053 switch (switching the current sources)
e) FLASH goes to the MCU_ADC

[Kleinstein]

The OPA140+AD711 integrator seams to not ring very much even with a 6.8 K / 1 K divider. How accurate the models are is still open. At least it suggsets that R420 is not that critical. So one could try even with the original 8.2 K for R420 first. From the simulations the R420 = 10 K looks slightly better, but not very much difference.

How the divider is adjusted (R420 or R421) should not make a difference. It should be only about the ratio.

[iMo]

This with the OP27 and various R420s..
It looks like the edges are a litlle bit "lazier", say 100-200ns.

PS: added with OPA145 and R420 - the slowest variant..

[iMo]

 

OPA140 installed..

[iMo]

All 10PLC against 10Vref (ADR1001#1).
ADEV/MADEV later on when DMM temp stable (so far ADEV at 1sec went down from 900nV/OP27_1399 to 613nV/OPA140_1399).
Sliding STD went down from 1.45uV/OP27_1399 to 1.0uV/OPA140_1399.
The 10V reading went up by ~45uV with OPA140_1399.

SHORTED inputs at 10PLC and 10V range with OPA14_1399 below..

[Kleinstein]

The noise improvement is about what was expected. It may be a bit more visible with the shorted input case. It is a bit surprising to see so mauch change in the gain / absolute reading at 10 V.

[iMo]

Shorted inputs above..

STD with shorted input at 10PLC went down from 1390nV/OP27_1399 to 895nV/OPA140_1399.

Note: Last weekend I zeroed front/rear, btw. (was +9.7uV off).

I wonder what I can gain from playing with the R420..

[Kleinstein]

R420 could improve the settling speed a little. However the simulations did not show much ringing (the AD711 seams to be somewhat well behaved as integrator and maybe was choosen for this reason, despite of low speed).
One may want to check the DNL again (e.g. at 1 PLC or even faster). More ringing could have an effect on the INL.

[iMo]

I now run an overnight+ measurement to get some ADEV/MADEV at more stable DMM temp.
I've also adjusted the 10V range to my ADR1001#1 voltage, thus we will be below 10V.
Next step will be to look at the OPA140's output with my scope as it is accessible from the bottom side of the pcb.

BTW: do we have a description of the MS_III algo they use? Perhaps I will try to write a state machine in LTspice thus we may simulate a complete measurement. The ASIC has got only 1bit input (say the COMParator's output) and 1bit output (into the D of the 7474 which creates then 2 bits for the 4053) related we need to handle there..

[Kleinstein]

The feedback part of the ADC is relatively simple, but I don't know the exact time when in the cycle the comparator is read. One comparator reading decides between the 2 possible PWM ratios. The exact time should not matter much. One would not even need a complex state machine: mainly another flip-flop and clock to latch the comparator and clocks to control the set / reset signals of the  7474 FF.
I don't know exactly when the µC ADC is reading the residual charge. My guess would be somewhere in the fixed part of the patter, like just before the variable part that changes with the comparator starts.

[iMo]

This is a NSD from first measurments with OPA140 - I wonder where those 2 strong lines are coming from..
Could it be a beat with the master ADC clock related stuff and 50Hz mains?
Or multislope related beats or tones?

PS: added similar with OP27..