Looking for replacement component for Clock Buffer/Level Shifter

[Stupid Bear]

Working to redesign an old piece of hardware. They used an old Renesas IC as a clock buffer but it also had dual voltage inputs so that it could translate voltages. This has been discontinued and I cannot find another IC that does the same thing, particullarly as I need to shift from 5V to 3.3V. Any thoughts as to a replacement chip or perhaps another way using 2 chips?

[PCB.Wiz]

There are many dual supply level translators.
Perhaps give the part number and schematic with waveforms?

[bson]

74LVC1G125

[Stupid Bear]

the IC is ICS580-01. there are a couple of variations of this in the family but basically they are multiplexers that are also effectively buffers. We only use them as buffers and level translators. They also take in 2 voltages - one for the input and another one for the output. They also hit 200Mhz although I doubt we go even half that.

74LVC1G125 - This a buffer not a clock buffer. My understanding is that clock buffers have a more defined shape ( less ringing ) and less jitter. Not sure how using a regular buffer would impact the signal.

[PCB.Wiz]

the IC is ICS580-01. there are a couple of variations of this in the family but basically they are multiplexers that are also effectively buffers. We only use them as buffers and level translators. They also take in 2 voltages - one for the input and another one for the output. They also hit 200Mhz although I doubt we go even half that.

That part does a whole lot more than simple level translate, if you do not need MUX or auto select etc, you can use something much simpler.

74LVC1G125 - This a buffer not a clock buffer. My understanding is that clock buffers have a more defined shape ( less ringing ) and less jitter. Not sure how using a regular buffer would impact the signal.

Not many parts actually define jitter. That ICS580-01 has no jitter specs or even Tplh / tphl indications.
Pulse shape/ringing  is determined mainly by PCB tracking and terminations.

If you already use a dual supply buffer, I'd suggest sticking with that topology, the LVC1T45 is a very common dual Vcc example.

The Nexperia 74LVC1T45 specs 1.2 ~ 5.5 V, and 210Mhz for 3v3 <> 5v

There are newer parts like Nexperia's AXP1T34, (one way) which spec a very wide 0.9 V to 5.5 V either side translate range, and being one way, the Cin is a lower 1.5pF vs 6pF for the two-way part.
The  TI  SN74LXC1T14 is close, 1.1~5.5V inverting, but that's not likely to bother you ?

(confusingly the Nexperia AXP1T34 is not to be confused with the Nexperia 74AXP1T34    )

[tggzzz]

74LVC1G125 - This a buffer not a clock buffer. My understanding is that clock buffers have a more defined shape ( less ringing ) and less jitter. Not sure how using a regular buffer would impact the signal.

To give a solid answer to your original request needs more information, e.g. voltages, load capacitance and resistance, transition times, and PCB layout.

The waveshape is often determined by the components and PCB surrounding a driver.

An extreme example is using 74LVC1G devices to generate a fast edge to test oscilloscopes. If there are three 74LVC1G devices in parallel, then I've measured a 50% overshoot with very visible ringing (5V supply, peak output voltage >7V). But putting a 143ohm resistor in series with each output (so 50ohms in total) driving a 50ohm load gives a reasonably clean edge: 2.5V 250ps risetime with ~5% overshoot. At those speeds good PSU decoupling is important.

Jitter is often limited by PSU noise, caused for example by what's happening elsewhere in the circuit.