Author Topic: My PSU design ripple and noise with picture measurements  (Read 41014 times)

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Offline VEGETATopic starter

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Re: My PSU design ripple and noise with picture measurements
« Reply #175 on: November 13, 2022, 12:44:27 am »
Hello,

boards arrived, tested and it works perfectly fine as intended except for one thing.

Well, ripple for 3.3v is about 5mv p-p which is awesome! you can add the noise sparks and it become less than 10mv p-p. I consider this a win!

however it is not the same for 5v rail, which can go to 40mv p-p sometimes!

I figured it could be due to layout, therefore I attached the layout pics...

any suggestions??

I will make another board for more testing, which originally was to test putting 3 vias for routing the 5v signal as seen in attached image but now I need to see what to do really.

I highly appreciate your suggestions

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Re: My PSU design ripple and noise with picture measurements
« Reply #176 on: November 13, 2022, 06:41:44 am »
here are the problems which I think might have caused this bad 5v rail despite 3.3v is perfect:

1- long travel of 5v signal from first stage filtering (C9 and others) to ferrite bead FB3:

as mentioned, in manufactured design the signal goes under 3.3v signal by only 1 via not 3... I made them 3 vias later on.

however, 3.3v signal is very short and direct as seen.

TI rep engineer didn't like placement of the ferrites and their signals being under one another, basically that whole area. they called it "cross talk" and "overlap" due to high frequency resonance of the ferrite beads.

what do you think?

2- the 5v rail filters are near the 12v rail which is minimally filtered:

not so much there but still listed this as a possibility. the 12v rail signal is at the very right of the board but somehow near the 5v filters.



I will post waveforms soon but trust me that 3.3v total ripple noise figure is about 3-10mv p-p which i assume the best one can get from such buck designs.

my possible solution which I started to accept is to make the board 70mm length x 50mm width instead of 50x50. the 20mm of length will help me re-distribute the ferrite beads and final filter caps to make connections to 1st stage extremely short and direct + very far from each other. so no cross talk or anything to be feared. also, will make me shift the entire thing to the left side which makes everything very far from 12v signal line


is my analysis good?

what do you think?

I was very happy for 3.3v rail results but got disappointed for 5v ones... really thought i was ready for production...! very hyped! now more testing boards and time has to be consumed but I ask all these questions to make sure the next test board is the final one.

best regards

Offline T3sl4co1l

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Re: My PSU design ripple and noise with picture measurements
« Reply #177 on: November 13, 2022, 06:58:47 am »
Possibly this is a candidate for a slotted ground,



Pink arcs: switching currents circulate under the regulator.  This is mostly local, but some leaks out into the surrounding ground plane -- no conductor is ideal.

Pink 'U': a slot here would prevent currents from flowing into the connector and filter area.

Downside: the plane suddenly stopping here, means whatever current would've been carried by it, is instead wide open and exposed in the slot.  This can make induction worse, for example.  (Keep traces at least a board thickness away from the slot.)  Maybe there's more voltage across the slot, than there was across the plane before.  This could increase common mode noise (even given the input CMC).

The extra 12V trace would be spanning across this slot, carrying 100% of the voltage on one side of the slot, across.  It must be filtered locally, with an inductor to absorb that (AC) voltage drop, and a capacitor to firmly [AC] ground it again.

To explain further: the pink arcs represent current flowing under the regulator, at least very vaguely.  Normally, that current is "shorted" out (no short is ideal, but copper is nearer to a short than say air is), so the voltage drop is small, and confined locally (read: dropping inversely with distance from the source, or probably faster than that, up to an exponential drop with distance).  With the slot, the voltage drop is not shorted out, but left hanging.  Which puts some voltage on one side of the slot, that isn't present on the other.  Hence, common mode voltage appears between the two sides.

But the best solution is to optimize out all the extraneous capacitors (I think you will find you get the same noise level with a fraction as many), place the regulator off to the side or in a corner where its currents can be better localized (using the natural board edge as a slot, as it were, but more to the point, also routing in/out from just one side of the region), and joining the connectors as well as possible (solid ground plane between them) and filtering local to them.  Such a layout will take more blank PCB space for noise separation, which will be obtained by optimizing the filter components.

Tim
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Re: My PSU design ripple and noise with picture measurements
« Reply #178 on: November 13, 2022, 07:29:19 am »
I didn't really understand all that you said but I kinda understood that "U" that you put made a slotted ground meaning 2 ground plains separated which prevents currents from circulating properly which forces them to travel near or under the 5v rail signal (= along the slot).

however, the arcs you put are not an issue IMO because most of them are feedback resistors network and one for some internal regulator cap... all grounded properly as seen while switching currents should come only from one pin per rail and as seen coupled to ground with multiple vias. how can this be an issue?

there cannot be any modification to the 12v long trace since this is how the board and product shape is. assume we got the ground plain to be properly done, will this trace do any harm without putting an extra inductor to it? I can put caps though.

I'd like to remind you that the bottom layer is all ground with minimal traces so i think even if the slot exist on top layer, the bottom ground should be there. or am I wrong?

I have followed datasheet and rep engineer layout guidance for the regulator, besides the issues i spoke of. I don't know what caps you speak of, do you mean first or 2nd stage filtering?

my next plan is to make length 70mm and change the layout as drawn in attached image.

this way there will be no ground slots or disconnections but rather very short and direct connections for the rails with 0 cross between them as they will be very far.

is this what you meant?


note that the capacitance are sized according to design and datasheet calculations and so on, don't really recall exactly but be sure they are correct value.


what do you think?

Offline T3sl4co1l

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Re: My PSU design ripple and noise with picture measurements
« Reply #179 on: November 13, 2022, 09:17:45 am »
I didn't really understand all that you said but I kinda understood that "U" that you put made a slotted ground meaning 2 ground plains separated which prevents currents from circulating properly which forces them to travel near or under the 5v rail signal (= along the slot).

Not really two. Different regions of the same. The pour will still be solid around the left (where the 'U' does not extend).


Quote
however, the arcs you put are not an issue IMO because most of them are feedback resistors network and one for some internal regulator cap... all grounded properly as seen while switching currents should come only from one pin per rail and as seen coupled to ground with multiple vias. how can this be an issue?

You "don't really understand", yet you deny the possibility?  (Namely, that currents flow over an extended range, a fuzzy, broad path, not a straight line.)

Wait, do you think current follows the "path of least resistance"?  As in, the infinitesimal narrowest and shortest possible path between two points?  Fucking hell that phrase is so harmful.  It should not be repeated, it so easily leads to such conclusions.  I wish people would expunge the phrase from history itself!

Needless to say, current does not follow such a foolish path.  It's a field, it spreads out along conductors, particularly between their facing sides (at AC).

Current flow in the area has little to do with which exact components are there.  I don't care about the feedback resistors.  They're irrelevant to this flow.  The primary switching loop is between the chip and the bypass caps (above it).  Currents can nonetheless extend down even below the chip.  It is my guess that this is the effect at work here.

There are other tests that could be done to confirm this, but I'm remembering now, it's training cats to pull teeth to get you to test anything the least bit confusing... so, nevermind.


Quote
I'd like to remind you that the bottom layer is all ground with minimal traces so i think even if the slot exist on top layer, the bottom ground should be there. or am I wrong?

...All layers...

As in, you could literally saw through the board, and maybe actually demonstrate exactly this with the PCB you have.  I might not recommend that, for a variety of reasons, but from such a process, that's where the copper would be (and wouldn't).  Removing copper on all layers, and leaving PCB material (FR4), is fine there.

But if you're going to the trouble of a new board, I would again suggest a better layout emphasizing the grounding between connectors.


Quote
I have followed datasheet and rep engineer layout guidance for the regulator, besides the issues i spoke of. I don't know what caps you speak of, do you mean first or 2nd stage filtering?

Reps don't know anything, it's blind luck if they are helpful at all with EMC issues.

More exactly, they aren't particularly different, as a class, from any other EEs.  Among which, EMC knowledge is rather spotty at best, and full of partial or mis-conceptions.


Quote
my next plan is to make length 70mm and change the layout as drawn in attached image.

this way there will be no ground slots or disconnections but rather very short and direct connections for the rails with 0 cross between them as they will be very far.

is this what you meant?

I can't tell what components are supposed to be here.  I guess the one connector is shown.  Where are the others?

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Re: My PSU design ripple and noise with picture measurements
« Reply #180 on: November 13, 2022, 10:00:15 am »
Quote
You "don't really understand", yet you deny the possibility?

it is that I understood you meant something related to feedback resistors since arcs were on them... now i know you only meant switching node currents from switcher to inductor. this I agree with you on it for sure.

Quote
Wait, do you think current follows the "path of least resistance"?

I know this famous line is not really that straightforward. I saw many videos on return path current and so on and how to optimize layout for it.

Quote
But if you're going to the trouble of a new board, I would again suggest a better layout emphasizing the grounding between connectors.

this is good and practical to do, can you tell which connectors exactly? I can start tonight especially if I extend the length of the board by 20mm which will make really nice space to work.

Quote
Reps don't know anything, it's blind luck if they are helpful at all with EMC issues.

this was my thought as well but at least I wanted to involve someone to take a look at my layout. she did emphasize on the "cross talk" between the two rails due to overlap of the ferrites as i mentioned above. do you think it is an important issue?

Quote
I can't tell what components are supposed to be here.  I guess the one connector is shown.  Where are the others?

hmm i guess I put arrows to tell which is which. it is a mere rough drawing... for example that half-T shape is for first stage capacitors, I draw it like this since it is the same way I layed them out if you return to the layout picture. the bold line indicates power signal path... now it is straight and short with no cutting of any ground or making slots (to my knowledge).

FB is ferrite bead, 2nd stage is for 2nd stage filtering caps which originally were at the bottom left of the design... now in this suggested drawing they are spaced well to ensure no cross talk.. etc.

any suggestions?

Quote
There are other tests that could be done to confirm this, but I'm remembering now, it's training cats to pull teeth to get you to test anything the least bit confusing... so, nevermind.

I have owon isolated usb scope and nothing more.

i was thinking to make some tests like putting extra elec. caps, or remove the 12v rail trace (scratch it from its origin) so that I see if it is the one affecting the 5v rail... also thought of removing 3.3v rail ferrite bead to make only 5v rail exist to see if ferrites affect each other... hmm also maybe take scope measurements at the end of stage 1 filtering caps for both rails to confirm that the problem happens in later stages as i suspected, namely the long 5v trace from 5v first stage filters to 5v ferrite bead.. the one which made the slot to begin with.

I am open to suggestions... to make sure the new test board is finally the last revision. and always thanks for your continuous support.


EDIT: I made another rough drawing for the suggested new layout. sorry right now in work i don't have my laptop to do proper kicad layout.

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Re: My PSU design ripple and noise with picture measurements
« Reply #181 on: November 13, 2022, 05:49:56 pm »
I've been thinking if instead of the 5 2nd stage 10uF ceramics... I put 4 ceramics the same + 1 22uF elec. cap + 1uH inductor to further smooth it out. is it better?  ofc, using the better layout.

so it becomes:

1st stage caps -> the ferrite bead -> 2x 10uF ceramics -> 1uH L -> 1x 10uF ceramic + 1x 22uF elec. cap near the output pin.

for your opinion.


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Re: My PSU design ripple and noise with picture measurements
« Reply #182 on: November 13, 2022, 08:35:03 pm »
I have done extensive measurements as seen here: https://slow.pics/c/NlypkqhL

each picture has its own title so you can know what it is.

I noticed it delivers 25mv p-p at full load for 3.3v which is, unfortunately, similar to another cheaper PSU on the market... so it would not make sense to make this one. I wonder why really... that psu is very basic without filtering at all just 33uH + 100uF or so at the output of a generic buck regulator. previously I said 3.3v delivers 5mv but that was at very light load.

one thing I noticed with this design is that signal before inductor is better than after 33uH inductor, which is weird really. it is supposed to be better and smoother.

also it gets worse at the switcher input pins themselves, which is after the ferrite beads and some filter caps.

so assume i removed the 2 input ferrite beads and the inductor, then tested it... do you expect better result overall? since input noise is a critical figure and main cause for output noise level. but most importantly i wanted to understand why this happened in the first place.

for your kind help, I am a bit frustrated after all that huge effort.

Notice that this design uses TPS54394 instead of the TPS62913 initially used with first version of this circuit.

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Re: My PSU design ripple and noise with picture measurements
« Reply #183 on: November 13, 2022, 09:03:09 pm »
it is that I understood you meant something related to feedback resistors since arcs were on them... now i know you only meant switching node currents from switcher to inductor. this I agree with you on it for sure.

Ah, OK.


Quote
this is good and practical to do, can you tell which connectors exactly? I can start tonight especially if I extend the length of the board by 20mm which will make really nice space to work.

Any connectors with wires.

Which... is what connectors are usually for.

But more particularly, connectors with grounds connecting to other things.  Outside environment.  Floating fan connections, say, probably not so much, but input and output, especially yes.


Quote
this was my thought as well but at least I wanted to involve someone to take a look at my layout. she did emphasize on the "cross talk" between the two rails due to overlap of the ferrites as i mentioned above. do you think it is an important issue?

External field of ferrite beads is small.

Beads per se, are probably not what you want here anyway (they saturate under DC bias), but ones that big are probably okay.  A regular inductor like 1uH or so would be more compact.

Coupling between the beads is irrelevant; what matters is their absolute impedance, and some coupling between those impedances makes no difference.  Well, if it was like 50%+ coupling, that'd be weird and probably bad, but that's not going to happen on board even with unshielded spool style inductors.

Coupling between beads and switching inductors, more important.  I'd keep at least one inductor width between the inductor and the filter ones.  Which is a fine place to put capacitors.

Like, this would be feasible:



All the switching currents cluster tightly around the regulator, at great distance to the connectors; probably the slot is still better to use, and that keeps current away from the between-connectors path.  Think in terms of a 'T' section, with the top of the 'T' being the path between connectors, and the regulator being placed on the stem.  One side of the 'T' just happens to be bent around (towards the bottom, with the long connector), but topologically that makes no difference.


Quote
hmm i guess I put arrows to tell which is which. it is a mere rough drawing... for example that half-T shape is for first stage capacitors, I draw it like this since it is the same way I layed them out if you return to the layout picture. the bold line indicates power signal path... now it is straight and short with no cutting of any ground or making slots (to my knowledge).

Oh, so like as-is, but in a more vertical section.  Yeah, that avoids the slot for example.  It still puts the regulator between connectors though.


I have done extensive measurements as seen here: https://slow.pics/c/NlypkqhL

each picture has its own title so you can know what it is.

"Extensive" yeah but they're all at uselessly large scale (10ms+) so I don't have a clue what the actual EMI is like.  And you didn't take a common mode measurement (between connector grounds, or ground and oscilloscope) so it's impossible to tell how much the CMC is doing, or how much DM or other filtering is really needed.

Unless those have been added, I haven't checked since last time.

Tim
« Last Edit: November 13, 2022, 09:06:53 pm by T3sl4co1l »
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Re: My PSU design ripple and noise with picture measurements
« Reply #184 on: November 13, 2022, 09:46:38 pm »
Quote
Any connectors with wires.

Which... is what connectors are usually for.

But more particularly, connectors with grounds connecting to other things.  Outside environment.  Floating fan connections, say, probably not so much, but input and output, especially yes.

here i have that bottom right connector which is board-to-board connector. nothing else, besides the one in left side which is just the 5v rail as an extra connector for modding.

what is my mistake here and how you suggest i fix it? does it have to do with bottom right connector having bad ground path to the regulator ic?

____


your suggested layout might not work due to the regulator IC itself having the 2 output stages on opposite sides, please check it up: TPS54394.



so to sum up your suggestion, you want me to keep L and its first stage caps near the IC which is already done... however, you want me to move the 2nd stage (starting with bead) away from the main inductor... as far as possible so that no field or coupling happens... correct?? hmm I think the beads and 2nd stage are kinda far from main L... but do you mean that L and first stage itself are close to the output connector itself??

are you sure 12v trace won't cause problems despite traveling all that distance under the filtered clean rails? also the 3.3v and 5v themselves, is it ok to travel that long?

btw here are pics for the actual board: https://imgur.com/a/6ANuRwu   < now you see everything.

and here are the key components:

common-mode choke: PA4339.132NLT
ferrite beads: Fair-Rite 2773021447
main filter inductor: inductor_MCS0630-4R7MN2_7.3x6.6 (4.7uH from LCSC since the ones in datasheet and eval board are expensive)
33uH inductor: LCSC C182163



now for the slot, it kinda makes sense. i can just make a no copper zone in kicad. but we still need to see how the switch ic to be placed since as i said its inputs are from both sides not like you drew it. the slot you suggested forces the current not to go from switcher ic to the connector.


do you think I need to get the eval board (https://www.ti.com/tool/TPS54394EVM-057) and test its actual performance? or make another version myself with your guidance? I saw the eval board give about 15mv p-p which is still not 10mv i want.


since the main L is our biggest problem, they have 2.2uH and I have this 4.7uH. is mine that much worse?

actually if this is the main cause, I can invest in getting a really nice coilcraft\tdk\pulse-electronics\etc.. inductor and shave off some unnecessary stuff like maybe the input 33uH inductor and the 2 input ferrites... this could be kinda financially ok if it boosts performance.


 ___

as for measurements, kindly tell me what to measure and at which conditions and I will do them tomorrow.


Offline Mechatrommer

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Re: My PSU design ripple and noise with picture measurements
« Reply #185 on: November 14, 2022, 07:28:36 am »
anyone knows how to cancel out the noise of the probe before using it? I mean when the probe is not connected to anything... it still displays some waveform which I think affect real measurements.
Probably only when set to high sensitivity and it's mains frequency or some local noisy SMPS.
Just normal shit you need to work with or ignore.

the problem is that I need to measure power supply noise and ripple to below 10 mv which is why I need to null this.

so there is no solution or workaround?
read jim william's app note, tektronix probe primer abc etc on how to deal with low level noise measurement. use 1x probe, short cable etc is key.. as jim said, the best probe is no probe.. there is no such thing as to cancel noise of passive probe, you probably started with unshielded, hence crappy passive probe in 1st place, solution is get decent brand probe. I saw earlier suggestion to use diff probe, i dont know how that helps as diff probe is such noisier in itself. And with cmrr and phase mismatch issue, you probably get junk reading, as i believe you already figured out. Ac coupled 1x probe to dso is the key when 10x passive probe is not reading it anymore, no need fancy or active probe.. btw I'm also working on similar smps noise issue and carefull pcb layout, except mine is variable output for preregulation purpose. I'm getting there, after changing inductor value, i get 40 to 60mVpp on linear output during switching. I'm spinning another pcb version with more carefull layout hopefully to get better noise performance.. i have this hypothesis of 'the rain of noise bandwidth' where each bw will take different path from hi freq returning along signal path (least reactance)  to low to dc freq returning in straight path (least resistance) or rain of 'coupling' or 'crosstalk', electromagnet 101.. when current move in circle, em induced and hence current on the other intersecting tracks... gnd plane is a 'circuit', not a 'plane' as we might have think. if you can avoid this 'rain in the return paths' in pcb layout, then its better, if not, i think i need to provide umbrella, ie slot(s) in gnd plane to steer away this rain of noise.. but care not to run signal or power on top of this slot.. you can google rules on slot in gnd plane. Ymmv.
« Last Edit: November 14, 2022, 07:42:33 am by Mechatrommer »
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Re: My PSU design ripple and noise with picture measurements
« Reply #186 on: November 14, 2022, 08:23:18 am »
anyone knows how to cancel out the noise of the probe before using it? I mean when the probe is not connected to anything... it still displays some waveform which I think affect real measurements.
Probably only when set to high sensitivity and it's mains frequency or some local noisy SMPS.
Just normal shit you need to work with or ignore.

the problem is that I need to measure power supply noise and ripple to below 10 mv which is why I need to null this.

so there is no solution or workaround?
read jim william's app note, tektronix probe primer abc etc on how to deal with low level noise measurement. use 1x probe, short cable etc is key.. as jim said, the best probe is no probe.. there is no such thing as to cancel noise of passive probe, you probably started with unshielded, hence crappy passive probe in 1st place, solution is get decent brand probe. I saw earlier suggestion to use diff probe, i dont know how that helps as diff probe is such noisier in itself. And with cmrr and phase mismatch issue, you probably get junk reading, as i believe you already figured out. Ac coupled 1x probe to dso is the key when 10x passive probe is not reading it anymore, no need fancy or active probe.. btw I'm also working on similar smps noise issue and carefull pcb layout, except mine is variable output for preregulation purpose. I'm getting there, after changing inductor value, i get 40 to 60mVpp on linear output during switching. I'm spinning another pcb version with more carefull layout hopefully to get better noise performance.. i have this hypothesis of 'the rain of noise bandwidth' where each bw will take different path from hi freq returning along signal path (least reactance)  to low to dc freq returning in straight path (least resistance) or rain of 'coupling' or 'crosstalk', electromagnet 101.. when current move in circle, em induced and hence current on the other intersecting tracks... gnd plane is a 'circuit', not a 'plane' as we might have think. if you can avoid this 'rain in the return paths' in pcb layout, then its better, if not, i think i need to provide umbrella, ie slot(s) in gnd plane to steer away this rain of noise.. but care not to run signal or power on top of this slot.. you can google rules on slot in gnd plane. Ymmv.

I think my Owon VDS1022I came with these along the probes themselves:



I mean the spring ground item (don't recall its proper name).

I guess this is the best I have right?

in my design I got final 3.3v output of about 25 mv p-p ripple which is similar to another cheap design, which frustrated me since I wanted to do better... to reach <10 mv p-p. the 5v rail is worse, it is +30 mv p-p with lots of noise rather than ripple.

weird thing is that the other cheaper design showed similar behavior of 5v rail being noisier while 3.3v rail just ripple.


the PSU is for Dreamcast and the main power is for 3.3v rail (2.5~3 amps) while 5v rail not so much (maybe < 0.5 amp).

what do you suggest for routing and other optimizations?

Offline Mechatrommer

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Re: My PSU design ripple and noise with picture measurements
« Reply #187 on: November 14, 2022, 08:57:11 am »
I mean the spring ground item (don't recall its proper name).
I guess this is the best I have right?
yes thats your best at cheapest cost and easiest quick way. probe very close to output node and ground plane. here https://www.analog.com/media/en/technical-documentation/application-notes/an101f.pdf (read carefully Appendix C) jim is using single ended pre-amplifier to make measurement, so you may want to build your own or find equivalent of HP461A if you are really serious looking into uV range.

in my design I got final 3.3v output of about 25 mv p-p ripple which is similar to another cheap design, which frustrated me since I wanted to do better... to reach <10 mv p-p. the 5v rail is worse, it is +30 mv p-p with lots of noise rather than ripple.

weird thing is that the other cheaper design showed similar behavior of 5v rail being noisier while 3.3v rail just ripple.
the PSU is for Dreamcast and the main power is for 3.3v rail (2.5~3 amps) while 5v rail not so much (maybe < 0.5 amp).

what do you suggest for routing and other optimizations?
i'm also learning and its hard to see whats on your pcb... i may give you useless advice anyway, so imho its not worth it to act like clever guy. imho you have to work yourself based on advices you received so far.. but i wonder why you want to still fight if its like an impossible battle? its like large promising market for Dreamcast PSU? many people in your place play Dreamcast? that you have to nail down other competitors in market? how about i give you advice, stop playing Dreamcast? ;D or does it need so low noise to work properly? i say thats a bad design for game console. or is it only yourself that want to challenge yourself? 30mVpp for smps is good output already imho. ymmv cheers.
« Last Edit: November 14, 2022, 09:03:04 am by Mechatrommer »
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Re: My PSU design ripple and noise with picture measurements
« Reply #188 on: November 14, 2022, 09:05:36 am »
Quote
yes thats your best at cheapest cost and easiest quick way.

I will try to use it soon and write feedback here.

Quote
'm also learning and its hard to see whats on your pcb... i may give you useless advice anyway, so imho its not worth it to act like clever guy. imho you have to work yourself based on advices you received so far.. but i wonder why you want to still fight if its like an impossible battle? its like large promising market for Dreamcast PSU? many people in your place play Dreamcast? that you have to nail down other competitors in market? how about i give you advice, stop playing Dreamcast? ;D or does it need so low noise to work properly? i say thats a bad design for game console. or is it only yourself that want to challenge yourself? 30mVpp for smps is good output already imho. ymmv cheers.

I am into retro gaming and it has nice community of people. yes, 30mv is fantastic but I still want to do better. the market for alternative PSUs exist but I wanted to make one that beats the others... if so, people will buy it for sure. Plus, the challenging thing you spoke about.

the lower the noise the better for retro consoles since it is all about analog video which gets affected by noise... 30mv or so is not bad really but as i said, i wanted better.

actually, all i wanted is to have better noise figure than others. that is all. later on i will create a mains powered psu to act as full replacement of the original psu... this will be based on this design but have something like meanwell ac-dc module as input.

i am fine with your advise since i am not an expert. i have done several revisions already but i cannot beat the 20-30 mv limit!

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Re: My PSU design ripple and noise with picture measurements
« Reply #189 on: November 14, 2022, 10:54:51 pm »
Hello,

I have used the spring and isolated the scope and stuff from other mains chargers as much as possible, here are the images: https://slow.pics/c/0H7FqG0j

all images are for my design except for when labelled "competitor".

any more images at certain time bases you need me to take?

^
All this for the newer design using TPS54394 dual buck.

However, as you know, I started this project using TPS62913 low noise buck regulator, I have dug it out and tested it as well... here are the pics for it + schematic attached: https://slow.pics/c/gQsPrODG  (layout picture available too, 3.3v rail is the first pin from the left of that 6-pin connector).

I switched from that IC due to price + it is almost always out of stock.

we used DLW5BTM501SQ2L common-mode choke, then we wanted to search for one which is better at attenuating 20-50 mhz noise... then i found PA4339.132NLT but I never used it in that "older" design due to out of stock IC but rather in the new design.


weirdly enough, the 5v rail of the older design is very clean, much better than newer design. but both suffer from 3.3v...

how do you think i can improve the new design taking all these stuff into consideration?

Offline jonpaul

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Re: My PSU design ripple and noise with picture measurements
« Reply #190 on: November 14, 2022, 11:51:20 pm »
bonjour à tous

Seems a classic case of poor measurement and probing technique

Suggest use BNC >>RG174/U coax, >> 450 Ohm series R make Zo probe with very short shield to plane loop. Dump the Chinese clone probes.

Check à good text on high frequency PCB layout and SMPS design and theory.

Do not depend on the TI application notés as gospel

Just the ramblings of an old retired EE

j
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Offline T3sl4co1l

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Re: My PSU design ripple and noise with picture measurements
« Reply #191 on: November 15, 2022, 05:23:00 am »
Take a picture of how and where you're probing.

Take waveforms at, at most, 5µs/div.  Zoom in during the load pulses.  I don't care what the load is doing on the order of 100s of Hz.  Your power supply should be (and is!) at least good enough not to have the least care what's going on at such boring frequencies!

Preferably, replace the Dreamcast with an actual load resistor, so you aren't seeing those damn load cycles as it's running.  What is it running, anyway?  Home screen?  Is a game loaded?  Is it rendering a lot or just a little?  Who knows.  The load is probably inconsistent and not reproducible.  Get it out of the lab!

Build your own step load generator to do that in a better controlled fashion.

Or, if this is actually what you are concerned with -- low frequency or DC response of the supply, not the filtering you've been concerned with for the last, this thread -- then realize that that is where you must focus your attention, (almost) no amount of capacitors will affect this aspect of the response!

Label your figures properly:
"3.3v competitor with spring" -- with spring where? How is it wired, where is it probed? Who is the competitor, how did they lay out their circuit, what other relevant points should I draw from this, etc.?
"both channels loose with spring math" -- loose how?  Floating in space?  Are the two probes' springs tied together or loose (open) as well?  What math? I don't see a function anywhere on screen!
"both channels with springs-ch1 for 3.3v and ch2 on ground" -- with math I guess, but again, what function?  Add?  Subtract?  ch2 is ground but how?  Is there significance to the distance or direction between probe and spring contacts, how could I know?

Mind, I enunciate these comments not to offend, but to emphasize and reiterate the importance of clarity, precision, and thinking critically about what you are doing, what you are saying.  Think about what someone else may read your comments as -- or what they won't know (because it's been omitted), that they should!

Tim
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Offline Mechatrommer

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Re: My PSU design ripple and noise with picture measurements
« Reply #192 on: November 15, 2022, 05:57:55 am »
If the 100hz is due to digital load its subjected to, then you have finite (non zero) impedance output psu... if its under dummy or passive resistor load i'll check for gnd loop/common mode error in probing. Gnd spring must be near power output, and then put probe tip on the same gnd spot where your spring lands, if you can still read the boring 100hz then you have gnd loop/common mode error in probing, else i think you have heavy current flow switching somewhere. In my psu i got 0.5Vpp after bypassing many high impedance nodes, it was 5Vpp spikes before! The loop controller went heywire.. and then i changed to significantly larger inductor for smps than whats i installed earlier ie recommended by 34063 app, then spikes went down to 60mVpp, it was current ripple! thats what my critical thinking tells me. The easiest imho is to sim the inductor switching and look at current ripple, not easy to do on real pcb..
« Last Edit: November 15, 2022, 06:00:03 am by Mechatrommer »
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Re: My PSU design ripple and noise with picture measurements
« Reply #193 on: November 15, 2022, 06:19:11 am »
Quote
Take a picture of how and where you're probing.

I will take those picture tonight. but i was probing the 6-pin connector with a spring grounded probe, not alligator ground. so path is very short.

Quote
Take waveforms at, at most, 5µs/div.  Zoom in during the load pulses.

so, time base in the nano seconds to 10us is the range you want? ok.

Quote
Preferably, replace the Dreamcast with an actual load resistor, so you aren't seeing those damn load cycles as it's running.

I wait until it loads the main screen or main screen of a game, then took those measurements so they are consistent. I have some load resistors (50W) but since the final application is DC I thought using it directly is better.

Quote
Build your own step load generator to do that in a better controlled fashion.

I want to buy some more advanced gear such as electronic load and so on in the future. However, as mentioned, right now the application of running this PSU on DC is what I want.

Quote
"3.3v competitor with spring" -- with spring where? How is it wired, where is it probed? Who is the competitor, how did they lay out their circuit, what other relevant points should I draw from this, etc.?

with spring = spring grounded not alligator clip ground. probed the 3.3v or 5v (depends on label) and gnd pins of the 6-pin connector. 3.3v pin is pin 1 from the left, 5v is pin 2, pin3 to pin5 are ground, pin 6 is 12v.
competitor is this.
12v power brick used with all is this.


Quote
"both channels loose with spring math" -- loose how?  Floating in space?  Are the two probes' springs tied together or loose (open) as well?  What math? I don't see a function anywhere on screen!

loose means they are not connected to anything, just on the bench and not connected to each other. math is channel 1 - channel 2.

Quote
"both channels with springs-ch1 for 3.3v and ch2 on ground" -- with math I guess, but again, what function?  Add?  Subtract?  ch2 is ground but how?  Is there significance to the distance or direction between probe and spring contacts, how could I know?

math here is channel 1 - channel 2.

channel 2 probe to ground and ground to ground via spring ground. so this is a differential measurement. all of this is probing the 6-pin connector. shortest ever distance between all those measurement points.


Quote
Or, if this is actually what you are concerned with -- low frequency or DC response of the supply, not the filtering you've been concerned with for the last, this thread -- then realize that that is where you must focus your attention, (almost) no amount of capacitors will affect this aspect of the response!

I told you my main goal for this device, it is to have the total noise and ripple figure to be < 10 mv p-p.

taking pictures of each frequency is fine by me too since it may help reduce the ripple.

so judging by these figures, how do you analyze what type of filtering required? I mean, it is obvious that adding bulk caps does not work as I tried putting some 220, 1000, etc elec. caps at the final load pins (6-pin connector) for 3.3v but had no effect. I also tried adding another 22uF ceramic but also didn't help.

so this leaves us with what conclusion?

I mean that ripple is about 50-60 hz or so... I have put CMC filter according to our mutual decision back in the mid of this thread. shouldn't bulk elec. cap reduce such low frequency ripple?

I do have another power brick but it is noisier, also a DIY bench switch mode psu that I built myself as other alternatives. the final product must be used with a 12v power brick so I picked the current one I linked above since it is better than the crappy noisy one. anyone who uses such a device will have a similar brick.

the point of CMC and input filters is to eliminate the ripple and noise generated by 12v power bricks as much as possible to have clean input to the switcher. however, as mentioned previously, the 33uH inductor and the following ferrites have increased amount of noise!

I made 2 units assembled of this design, i can for testing purposes, remove the 33uH inductor and the following input beads and just use the input bulk caps as main filtering caps, then see how it affects the overall system. but i am interested to know why this happened... especially that 33uH supposed to filter low frequency ripple.

what do you suggest?

best regards and always thanks for helping.

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Re: My PSU design ripple and noise with picture measurements
« Reply #194 on: November 15, 2022, 07:17:46 am »
If the 100hz is due to digital load its subjected to, then you have finite (non zero) impedance output psu... if its under dummy or passive resistor load i'll check for gnd loop/common mode error in probing. Gnd spring must be near power output, and then put probe tip on the same gnd spot where your spring lands, if you can still read the boring 100hz then you have gnd loop/common mode error in probing, else i think you have heavy current flow switching somewhere. In my psu i got 0.5Vpp after bypassing many high impedance nodes, it was 5Vpp spikes before! The loop controller went heywire.. and then i changed to significantly larger inductor for smps than whats i installed earlier ie recommended by 34063 app, then spikes went down to 60mVpp, it was current ripple! thats what my critical thinking tells me. The easiest imho is to sim the inductor switching and look at current ripple, not easy to do on real pcb..

well, I also suspect it is due to high current ripple switching but I am already using 4.7uH inductor which is on the high side + using 7x 10uF ceramics X7R which are also the maximum.

I started to suspect that choosing Chinese inductor + ceramic caps can be the issue due to, well, being not so good.

datasheet says this:

Quote
For the above design example, the calculated peak current is 3.46 A and the calculated RMS current is 3.01 A
for VO1. The inductor used is a TDK CLF7045-2R2N with a rated current of 5.5A based on the inductance
change and of 4.3A based on the temperature rise.
The capacitor value and ESR determines the amount of output voltage ripple. The TPS54394 is intended for use
with ceramic or other low ESR capacitors. The recommended value range is from 20µF to 68µF. Use Equation 7
to determine the required RMS current rating for the output capacitor(s).
(7)
For this design two TDK C3216X5R0J226M 22µF output capacitors are used. The typical ESR is 2 mΩ each.
The calculated RMS current is 0.19A and each output capacitor is rated for 4A.

my inductor is: https://www.lcsc.com/product-detail/Inductors-SMD_PSA-Prosperity-Dielectrics-MCS0630-4R7MN2_C385253.html

it has dc resistance of 37 to 40 mOhms, rated current is 5.5 amps which is way more than needed, saturation current is about 7 amps. and it is 4.7uH.
their suggested

datasheet inductor is CLF7045-2R2N -> 14 mOhm, 5.5 amps, 2.2uH.
evaluation board inductor is SPM6530T-2R2M -> 19 mOhm resistance, 8.4 amps. but this one is 2.2uH.

one thing to notice is their inductors are of lower dc resistance. my initial thoughts were that this can cause more heat. but can this really affect ripple performance?


my caps are CL31B106KAHNNNE -> 10uF X7R, ESR shown here. lowest is about 4mOhms at <1Mhz, at 700 khz it is about 4 mOhms... graph is just a picture, you can't check the actual data.

datasheet caps are C3216X5R0J226M which datasheet says 2mOhm ESR. at product page and datasheet I couldn't find such info. there is though a graph showing ESR, lowest is about 3.16mOhms at 525khz. for this 700 khz switcher it would be 3.3 mohms,

evaluation board caps are GRM31CR70J226KE19 having about 3mOhms at 700 khz.

hmm not so far away but still 1 mohm difference... is it worth it to get higher quality caps + inductors to enhance ripple noise performance? then other cheaper caps can be used in 2nd stage filtering + input filtering.




Offline Mechatrommer

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Re: My PSU design ripple and noise with picture measurements
« Reply #195 on: November 15, 2022, 09:08:13 am »
Yeah order from digikey dont buy from china, punch in the spec and you will get legit stock. in the end you'll have better performing but more expensive product :palm: why do you care about brand?  Inductor is an inductance you can even make your own.. your 1mVpp speced converter ic will take care of volt drop in control loop due to mOhm resistance, no? btw i got my stock from lcsc and its in china, why do i care? What i know is its inductance because thats what affects di/dt.. and they are cheap.. cost is another factor to fight for.. no? i'll say.. experiment with larger inductance, recoil your own if you have to :P cheers.
« Last Edit: November 15, 2022, 09:16:49 am by Mechatrommer »
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Re: My PSU design ripple and noise with picture measurements
« Reply #196 on: November 15, 2022, 09:32:12 am »
I wait until it loads the main screen or main screen of a game, then took those measurements so they are consistent. I have some load resistors (50W) but since the final application is DC I thought using it directly is better.

How can you say your application is "DC" if your waveform is not DC?  Clearly something is wrong with your assumptions!  Be critical -- always check your assumptions!


Quote
I want to buy some more advanced gear such as electronic load and so on in the future. However, as mentioned, right now the application of running this PSU on DC is what I want.

No need to buy, there's no end of threads here alone from people building electronic loads, or step generators.  The most basic case of the latter is a 555 timer into a MOSFET and load resistor.  It's quite far from rocket science!

It seems, then, your primary failure is not testing at DC.  Your load is not DC and you have been, apparently, unaware of this.  Cure this discrepancy, and I think you will find your noise is in the single mV.  And that it will be predominantly high frequencies (actual ripple that your filters are handling).

The remainder, then, will be due to dynamic loading, and this in turn is limited by loop gain of the regulator, among other things.  Apparently it's not very high, or there's enough DC resistance between the feedback point and load to produce your observations.

What importance is gain?  Well, if the regulator is an error amp, which senses some difference between ideal (setpoint) and actual, which is then multiplied by a gain factor, then wouldn't a higher gain produce a lower error (input difference) -- it's more sensitive to differences in the input?  Exactly!  An excellent point to introduce control theory, at least at its most basic.  Further reading recommended!


Quote
12v power brick used with all is this.

Hmm, hard to say how noisy it is.  Any random thing off Amazon is about meaningless with respect to EMC.  They have the regulatory logos but that doesn't mean they actually tested to them, they could be improperly applied.  They don't appear to have any information to support that (but that's not surprising, who goes on Amazon looking for EMC certificates anyway).

At least the measurements so far don't seem to be grossly out of order, so it's probably not too bad.  But without the paperwork, who knows.


Quote
I mean that ripple is about 50-60 hz or so... I have put CMC filter according to our mutual decision back in the mid of this thread. shouldn't bulk elec. cap reduce such low frequency ripple?

The waveform is clearly not mains ripple (not sinusoidal), and you shouldn't expect such a waveform from an SMPS anyway (if it has 60/120Hz ripple, it is likely a fraction of overall output).  This is easily verified by looking at the input voltage, which likely is not varying much.

It is mere coincidence that your load draws current on a similar schedule.  See the earlier point about poorly defined loads?  If it's confusing you, making you think mains when it's in fact completely unrelated?  That'd be a bit of a problem, right!?  Isolate and identify!

Namely, NTSC, and PAL 60Hz, run at 60Hz, so it makes sense that the graphics operations of a console have a similar heartbeat.  Game loop calculations are typically done on the same schedule, or perhaps every other frame (30 FPS) depending.

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Re: My PSU design ripple and noise with picture measurements
« Reply #197 on: November 15, 2022, 09:40:49 am »
Yeah order from digikey dont buy from china, punch in the spec and you will get legit stock. in the end you'll have better performing but more expensive product :palm: why do you care about brand?  Inductor is an inductance you can even make your own.. your 1mVpp speced converter ic will take care of volt drop in control loop due to mOhm resistance, no? btw i got my stock from lcsc and its in china, why do i care? What i know is its inductance because thats what affects di/dt.. and they are cheap.. cost is another factor to fight for.. no? i'll say.. experiment with larger inductance, recoil your own if you have to :P cheers.

so you aid the idea of getting better ceramic caps?

however, for inductance you think they don't affect ripple performance by being lower resistance, correct?

I noticed something I have done which may have an effect, which is that I didn't put much ceramic caps on the input of the switcher IC.

I only put 1x 10uF cap with another smaller one, plus the 220uF bulk cap... according to some readings including this: https://www.ti.com/lit/an/slta055/slta055.pdf
i should have put multiples of that ceramic cap to tame down the input ripple which will further enhance the system's final ripple value which is my goal.

what do you think?

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Re: My PSU design ripple and noise with picture measurements
« Reply #198 on: November 15, 2022, 10:30:41 am »
Quote
How can you say your application is "DC" if your waveform is not DC?  Clearly something is wrong with your assumptions!  Be critical -- always check your assumptions!


all my waveforms and testing were on the dreamcast, i never said otherwise. however when you said i should get elec. load to step load testing, i then mentioned that i have a 50w load resistor that i can use.

Quote
No need to buy, there's no end of threads here alone from people building electronic loads, or step generators.  The most basic case of the latter is a 555 timer into a MOSFET and load resistor.  It's quite far from rocket science!

actually, i saw these that i think are fine for my needs:

https://www.amazon.com/Electronic-Battery-Capacity-Constant-60mmx88mm/dp/B082F36D3T/
https://www.amazon.com/MakerHawk-Electronic-Adjustable-Intelligent-Resistance/dp/B07F3NHHST

there are other better ones but price jumps from 50$ straight to 300$  :-//


I was just waiting for december to consolidate my amazon purchase, that is all.


Quote
It seems, then, your primary failure is not testing at DC.  Your load is not DC and you have been, apparently, unaware of this.  Cure this discrepancy, and I think you will find your noise is in the single mV.  And that it will be predominantly high frequencies (actual ripple that your filters are handling).

As mentioned, it was all Dreamcast with all those tests and waveforms.

Quote
The waveform is clearly not mains ripple (not sinusoidal), and you shouldn't expect such a waveform from an SMPS anyway (if it has 60/120Hz ripple, it is likely a fraction of overall output).  This is easily verified by looking at the input voltage, which likely is not varying much.

It is mere coincidence that your load draws current on a similar schedule.  See the earlier point about poorly defined loads?  If it's confusing you, making you think mains when it's in fact completely unrelated?  That'd be a bit of a problem, right!?  Isolate and identify!

Namely, NTSC, and PAL 60Hz, run at 60Hz, so it makes sense that the graphics operations of a console have a similar heartbeat.  Game loop calculations are typically done on the same schedule, or perhaps every other frame (30 FPS) depending.

yes games are either ntsc or pal for it, but i never thought this would reflect back to the power supply itself! i mean as long as we provide enough capacitance and filtering, it should not dip much.

hmm... so now i may test the 1 ohm load resistor and see how the waveform looks like then compares it with dreamcast. you note about ntsc and pal made me remember that the other PSU also showed similar pattern of ripple... all at 3.3v while 5v didn't have any pattern of ripple but just continuous spikes as seen in images.

assuming this is a fact that it draws its power mainly in this pattern, is there anyway or method to eliminate such a ripple? or it is simply unavoidable?

I also connected this to the input caps of the regulator ic which I didn't really put anything besides 1 10uF ceramic with 100nf cermic close to the input pins + 220u bulk nearby. meaning, the lack of enough ceramic caps could in fact make input ripple higher and the bulk cap being slow with much esr will not be able to filter out the huge current ripple... therefore putting more ceramics right at the input pins seem good solution?

if so, then i can start putting ceramics even before... like with the 2x 1000uF bulk caps right after the main CMC. this could reduce the total input ripple significantly, don't you think?>

Offline Mechatrommer

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Re: My PSU design ripple and noise with picture measurements
« Reply #199 on: November 15, 2022, 12:25:15 pm »
Quote
How can you say your application is "DC" if your waveform is not DC?  Clearly something is wrong with your assumptions!  Be critical -- always check your assumptions!
all my waveforms and testing were on the dreamcast, i never said otherwise.
imo your load is DC (Digital Current), something is demanding current (or pumping it) at 50-100Hz (that mVpp square wave). have you point out what causing it?

https://www.amazon.com/Electronic-Battery-Capacity-Constant-60mmx88mm/dp/B082F36D3T/
https://www.amazon.com/MakerHawk-Electronic-Adjustable-Intelligent-Resistance/dp/B07F3NHHST

there are other better ones but price jumps from 50$ straight to 300$  :-//
thats what we call, R&D one-time investment. it will worthy to buy if you think you are going to design many other PSUs in the future, but for your case, you can easily simulate the "Digital Current" by building a very quick low side n-mosfet, power resistor on high side and your PSU supplying the power, $1-5 worth of parts, you can control the gate switching by square wave generator or by hand. you choose power resistance value based on what you want to test. real life current demand from your Dreamcast? or how strong is strong your PSU is by choosing lower and lower resistance. btw i recently purchased few bunch of power resistor at $25 cost for real DC load.. https://www.eevblog.com/forum/beginners/4r-and-8r-100w-resistors-from-ali/msg4484695/#msg4484695 i also have home made e-load but maybe i'll use later for transient testing. my newly built passive 500W resistors load  doesnt need power or anything to setup, i just move the wiper/clip by hand along the winding and i can change load level at an instant.
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