Fair enough — and honestly, I've been tearing my hair out over this same problem for a long time too. The conclusion I eventually came to is: don't use SJ MOSFETs in hard-switched applications. The Crss of a superjunction device varies extremely — violently — with VDS. SJ MOSFETs are fine wherever you have genuinely achieved ZVS or ZCS.
In CCM inverters or bridgeless PFC, be careful with SJ MOSFETs, because they may well not be the "easy to drive" kind.
I've tested SanriseTech's SRC60R017FB — a 600 V, 14.3 mΩ superjunction MOSFET. The website says "optimized for soft switching". Nowhere on the front page of the datasheet does it make any promise about being "easy to drive", or about being suitable for CCM, or about tolerating hard-switched operation. All of that should be read as a red flag the next time you select a MOSFET.
If you take WebPlotDigitizer, integrate Crss over VDS, and multiply by the dv/dt of VDS, you get an instantaneous Miller-current-vs-VDS curve. Take a perfectly ordinary, constant slew rate of 4 kV/µs — for a 400 V rail that means a VDS transition time of 100 ns or less — and you'll find that as VDS falls and sweeps through 30...20...10 V, the Miller current explodes, in some cases to 10–40 A. No gate driver IC on earth can source or sink that. That, I suspect, is why you almost never see an SJ MOSFET in a demanding hard-switched bridge. Ringing is bad enough on its own; add bridge shoot-through on top of it and things get genuinely dangerous.
My own measurements: with a UCC21520 (4 A source / 6 A sink) and a decent gate layout, on a 48 VDC bus (yes, that's a very low voltage, but it's enough to see the trend — for quite a lot of SJ MOSFETs, Crss has already stopped falling once VDS gets down to a few tens of volts, so going to a higher VDS doesn't change much), double-pulse test into an inductive load: with Rg anywhere from 0 up to 220 Ω I simply could not damp the VGS–VDS coupled ringing, on either turn-on or turn-off. Only when I raised Rg to about 300 Ω did the ringing vanish completely — but by then the switching time had ballooned to a horrifying 5 µs. Completely unacceptable.
On the same demo/eval board — it's actually a full bridge — so apart from the SRC half-bridge there's a second half-bridge built with FGH75T65UPD. Same double-pulse inductive test on that one: from Rg = 0 Ω all the way to 20 Ω the waveforms were excellent. There is a Miller plateau, but it's dead flat, with no ringing whatsoever, and the whole switching event is clean and crisp — both the VGS rise time and the VDS fall time are inside 100 ns.
The same story repeats itself on a great many SJ MOSFETs. I won't list them all here.
Evaluating Crss properly, and then picking a suitable driver, is a really important point. I noticed someone mentioning that an IGBT's antiparallel diode recovers fast, and that in a bridge it doesn't slam the opposing device with a nasty Irrm the instant that device turns on — which would wreck EMC and make the ringing worse. That's correct. But there's a more important issue than that one: IGBTs — the semiconductor generation before last — mostly have extremely, extremely low Crss, on the order of 1% to 10% of an SJ MOSFET's. In the same circuit, swapping in a device from the previous generation can actually give you better efficiency and more stable operation. Don't underestimate the development history IGBTs have been through.
If you absolutely must use an SJ MOSFET with hard switching and hard commutation, then first and foremost, check Crss. Second, check the MOSFET's transconductance, because it may not be "optimized for hard switching". Do you know what "optimized for hard switching" actually implies? It implies slow switching and low transconductance — but rugged. They deliberately lower the device transconductance: that's what first allows you to switch reliably at all, and only on top of that foundation does it let you throw a higher-current gate driver IC at it to minimize switching time and minimize switching losses. So "optimized for soft switching" is a very bad sign as far as transconductance is concerned — as someone pointed out earlier, such MOSFETs may well have lost the "easy to drive" property entirely, or in other words cannot be driven reliably under certain operating conditions.
Next: the MOSFET's body diode. Note this carefully — low Crss and a fast body diode are mutually conflicting requirements. Which means you cannot reliably use an SJ MOSFET in hard switching with hard commutation, because the two requirements fight each other. If you really must, there are a few — I once searched hard for them, but they're very rare.
You can see it in Infineon's CFD2 or CFD7 series: the body diode is fast — for a 40 mΩ / 60 A class part such as the very common 65F6041, Qrr is roughly 1.2 µC (?) — but its Crss curve is not encouraging at all, and you need a gate driver with at least 4 A of drive capability. Whereas in a part like CoolMOS G7, which is optimized for the fastest possible switching in order to minimize switching losses, the body diode performance is only so-so: 3 µC or more at the same rating. But look at its Crss — it's tiny. At the same dangerous VDS (say VDS has already fallen to 10 V during the transition), the Miller current of many MOSFETs exceeds 2 A, while the G7 stays at a few tens of mA. Its Crss only rises at the very tail of the switching event, when VDS has dropped to 5 V... 2 V... — but by then VDS is already so low that it can't disturb the gate.
That's all.
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