EDIT: One more thought before starting down this path... With good data in the FRAM, you could do one power cycle, remove the FRAM, and read it to see if corruption occurred.
EDIT: One more thought before starting down this path... With good data in the FRAM, you could do one power cycle, remove the FRAM, and read it to see if corruption occurred.
If it is of any help, yesterday I went manually through the Exer 02 procedure with the FRAM in place, and all cal data values where still spot on to what I programmed into it, nothing changed. As of today scope still booting up fine.
Is it possible there might be some kind of a Firmware difference in the 2445B that might be causing his corruption problem? I wonder if there are any documented 2445B scopes running FRAMs. As far as I can remember, all the writeups out there seem to refer to '65B scopes.
Did your FRAM from Digikey arrive in a controlled humidity package like mine did? Maybe yours got a bit wet along the way!
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What I mean is, if I program properly the FRAM using the Xeltek programmer (that fully supports it), the first power up is ok, it runs well or at least I didn't see any issues in the short time that I ran it. But once I power cycle, two locations in the calibration constants area, the same locations that can't be programmed with TL866II Plus, are modified. Probably once it does the 0x55 then 0xAA, it cannot put back the original content. But why does it work for some people, that beats me.So, you're saying the corruption shows up on the second boot. It's possible the FRAM is getting corrupted during the scope's power-down sequence. That would also explain why it passes the 0x55/0xAA test; the corruption has already happened.
You could use the PWR DN signal as a trigger and start looking at the behavior of the control signals into the FRAM, including the +5V power, during power down. Maybe there's something marginal that the DS1225 tolerates.
If you have an MSO or a logic analyzer with enough inputs, you might also try setting up a trigger to capture when the corrupted address in the FRAM is accessed or written. But keep in mind this could be an analog signal issue and a logic analyzer might not catch it.
EDIT: One more thought before starting down this path... With good data in the FRAM, you could do one power cycle, remove the FRAM, and read it to see if corruption occurred.
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The question is how does it test the integrity of the calibration constants? If it does a CRC, that mean the constants are correct at the first power up. What I will do first is an Exerciser 02 right after the first power up so if the self test corrupts the data, I will catch it.
I don't have a logic analyzer but I do have a Rigol DSO with 4 channels.
I'm trying to raise the unregulated +15V by few hundred mV. For that I want to replace the four diodes in the bridge CR1103 - CR1106 with Schottky diodes. The original diodes are 400V 1A but I don't see the need for 400V. I bought two type of diodes from Digikey and I would like to ask your opinion.
1. STPS1L60RL 60V 1A
2. SB1H100-E3/73 100V 1A
The first one has the lowest forward voltage drop of about 500mV at about 800mA.
I think 60V VRRM should be good enough, what do you think?
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The only location that gets corrupted is 0x1F00, location 80 in EXER 02, validated through EXER 02 and with the programmer.
I ran TEST 04 multiple times after the first power up and passed with flying colours. Once it even passed the second power up but usually, after the second power up, location 80 changes from 0x11 to 0x20.
My primary suspicion is still that it's happening during power down. I think something is happening with the FRAM control inputs while the +5 is fading. They're not being controlled carefully enough for the FRAM while it's transitioning to power off, and it's trashing that location most of the time.
Something similar could be happening on power up, but you said it always works perfectly on the first power up after externally reprogramming the FRAM.
My primary suspicion is still that it's happening during power down. I think something is happening with the FRAM control inputs while the +5 is fading. They're not being controlled carefully enough for the FRAM while it's transitioning to power off, and it's trashing that location most of the time.
Something similar could be happening on power up, but you said it always works perfectly on the first power up after externally reprogramming the FRAM.
That was my suspicion as well but take a look at the power down sequence. The power down sequence happens between PWR_UP going down and RESET going down. +5V Digital is still stable at least 7ms after that. With the scope probes attached, it passed 3 power ups. What a .....
Here you go. There are some glitches on nCE but nothing on nWE.
Edit: I guess the question is why does it works for everybody but me?
Interesting. Did this cause a corruption event? And tried it several times since it doesn't happen consistently?
Does your scope have a PEAK acquisition mode (just to make sure there's not a short pulse lurking in nWE)?
I'm not happy with the glitch on nCE, especially right when chip is transitioning to power down, but as long as nWE remains high I think it should be ok according to the datasheet.
Maybe it's also worth looking at the power-up cycle to make sure there's nothing odd with nWE or nCE there.
I don't why it would be inconsistent. Maybe everyone else is getting away with it. Or there's something wierd about the FRAM.
Have you tried your new FRAM from Digikey yet? Your likely to get one from the same batch - check the date code.
You said your TL866II had an issue with a location. Was it also 0x1F00? Maybe don't let the new FRAM near the TL866II; just use the Xeltek.
Internally, a F-RAM operates with a read and restore mechanism. Therefore, each read and write cycle involves a change of state. The memory architecture is based on an array of rows and columns. Each read or write access causes an endurance cycle for an entire row. In the FM16W08, a row is 64 bits wide. Every 8-byte boundary marks the beginning of a new row. Endurance can be optimized by ensuring frequently accessed data is located in different rows. Regardless, F-RAM offers substantially higher write endurance than other nonvolatile memories. The rated endurance limit of 10^14 cycles will allow 150,000 accesses per second to the same row for over 20 years.
Maybe, or not a reliable drop-in in a 2445B, right?
Are the 2445B/2465B similar in the relevant hardware and code (paths) that this goes for both?
Perhaps one or more 2465B owners should take some measurements to determine the behavior upon power down and compare. I have a working 2465B with FRAM but no time for it at the moment. I haven't seen this problem mentioned before so it's worth investigating.
Some time ago I built this Avalanche Picosecond Pulse Generator:
https://entangledwaves.wordpress.com/2013/07/15/avalanche-pulse-generator/
BTW the specified now obsolete 2N2369 transistor is still available at Mouser in TO-18 metal case for about $2, although a usable alternative seems to be a common 2N3904, but the former has a more desirable breakdown characteristic. I did not need to build the DC-DC converter part for the 90V avalanche bias supply, but instead used my Heathkit IG-4505 Scope Calibrator as a power source with the DC output set to the 100V position.
There is also another very well known website on the same subject:
http://www.kerrywong.com/2013/05/18/avalanche-pulse-generator-build-using-2n3904/
Wanted to share pictures of the pulse as shown on both my 2465B and the 2247A, and possibly hear opinions. Cursor time measurement are located between the 10% and 90% points of the rising edge. Thanks.
Hello
What is the model for your earom burner?
As an EBay search came up blank.
73's
Mike G4WYZ