OurPCB=WellPCB.
Good quality, see my post in the other thread: https://www.eevblog.com/forum/manufacture/how-to-order-10-50-my-own-pcb/25/
WellPCB quotes $99 for 5 100x100mm 6-layer ENIG boards. This is substantially less than $237.
BTW: All Chinese PCB manufacturers use the same quoting software which always ask if vias are tinted or not. What does it mean? The gerber file specifies whether vias are covered by soldermask or not. Worse yet, I can have some vias covered (as under BGA) and some not (as TPs for testing). Are they going to alter my design to fit my answers? If not, what is the reason to ask?
My order was for 10 boards, you also need to specify impedance control and "Track Width/Space: 3-4mils" (which you can't specify together in their quote system for some reason). This brings the quote more-or-less to what I paid for the order once you add shipping charges.
This option is applicable if you send a project file instead of gerber files. In allpcb's quote form, there is a note to that effect: "*For Gerber files, This choose is useless. it will be made according files as default."
But it's best to send Gerbers as it's the only way which gives you full control over resulting boards.
I missed this option. When I click "Track Width/Space: 3-4mils 10% Extra" the price doubles to over $200. This is an interesting treatment for "10% Extra". But the price is great nonetheless and the quality is excellent based on your pictures. I can live with 5mil trace anyway, so it's even better.
How did you request the custom stackup? Do you know what is their default stackup?
My factory said they can not provide you the stack up file now. Because you need impedance control. When you have a gerber file and told me which trace need impedance contral, the factory can adjust the stack up file to meet you request of the impedance control.
When I've asked them about stackup, here's a response I received verbatim:QuoteMy factory said they can not provide you the stack up file now. Because you need impedance control. When you have a gerber file and told me which trace need impedance contral, the factory can adjust the stack up file to meet you request of the impedance control.
Looks like what they're trying to say that if you don't request "Impedance Control", you can get any stackup they want. If so, to get anything in particular you need to request "Impedance Control". Anyway, the price they have for their boards, given that you get the stackup you want is great.
Mine doesn't look that nice is because it uses 4 mil process and a lot of non-IPC standard, extremely small pads (for instance, my 0402 footprint is 0.6mm*1.0mm). My design is approaching their limit.
Also, via-in-pad without plugged vias look inherently nasty, but it works.
Mine doesn't look that nice is because it uses 4 mil process and a lot of non-IPC standard, extremely small pads (for instance, my 0402 footprint is 0.6mm*1.0mm). My design is approaching their limit.
Also, via-in-pad without plugged vias look inherently nasty, but it works.
Can you post a copy of your report? I would like to see if the company name matches.
I can live with 5mil trace anyway, so it's even better.
I can live with 5mil trace anyway, so it's even better.BTW, I missed 5 mil part. Keep in mind that with 5 mil traces you can not do this:
You need 4 mil/0.1 mm traces for that, and I think this alone is a reason enough to go for 0.1 mm traces.
That is true. But often you can work out something. For example, look at the dogbone just south of the area you marked in red. If you turn it right 45 degrees (so that it becomes horizonral), it'll give the room for the trace to escape. You could use this space to split the two side-by-side traces giving each of them its own spot. You could do similar thing to the dogbone on the top, or you could put a trace into the slot left of the dogbone.
This will likely screw up escapes for internal layers, as they go between dogbone vias right under BGA balls. Having ability to route two traces between balls/vias gives a lot of flexibility and help to reduce amount of layers needed for full breakout.
I still have my reservations as to the reliability of the process - last thing you want to deal with is some sort of internal short or a broken trace. 5 mil (or 6 mil which works just as well) looks much more reliable to me, but I may be wrong here. I started design with 6 mil rules, originally with a 256-part part, but since then I moved to 484-pin part. It's not too late to move to 4mil ...
They do 100% flying probe testing, so you can be sure that at least electrically they will be good. I can see the evidence of such test under microscope - there are dots on the pads where probe touched them.
On your pictures it looks very good, at least for outer layers.
It gets worse with 484-pin parts. Balls are getting bigger and require 20-mil wide pads (as opposed to 16-mil for yours). So, it is only 4 mil between pads and traces. Xilinx even suggests 3 mil, but this is a miscalculation.
But bank 15 is 10-row deep. Sticking 2 traces between balls would save a lot of work ...
Here's my PCB report:
Company: Uniwell
Sections: final inspection report, e-test report and microscopy report.