Could you give a few more capacitors a try to see if it actually can measure ESR. What is the test voltage for capacitors?
If I short two inputs together, I get 0.2 ohms and there is nothing to cancel this out. The best accuracy you could expect is 0.1 ohms even though the software calculates ESR to 2 places.
If you short all 3 it will go into the self-calibration mode and then it will read 0 ohms when you short 2 leads together. Just make sure you have a 100nF capacitor handy and follow the prompts or it will eventually read 33pF when you short 1 and 3. Don't Ask Me How I Know This(tm).
I went through that damn routine more than once before I figured it out.
Ok, the first link may not be the same thing, but the second one sure sounds like it. I think. It's in German, but here's google's translation effort:
http://translate.google.ca/translate?sl=auto&tl=en&js=n&prev=_t&hl=en&ie=UTF-8&eotf=1&u=http%3A%2F%2Fwww.mikrocontroller.net%2Farticles%2FAVR-Transistortester
Here is the most recent PDF for the tester, including information about the chinese clones. I have to say it is a really great manual.
"The printed circuit board track from the ATmega168 to the test port is very thin, so that a resistance of 100m
could be measured for one path. This will be the reason for measuring a resistance of 0:3 for two direct connected pins. The ESR measuring can usually consider this by zero compensation. The current version of software does not respect this offset for measuring of resistors with low resistance."
"with the AUTOSCALE ADC option. The zero oset for the ESR measurement will be preset with the option ESR ZERO in the Makele. This zero oset, which is set too high in normal case, will be preset in EEprom by the software. With every selftest the ESR zero oset will be reset to this initial value. After every ESR measurement the result will be checked for negative value (output of "ESR=0?"). In this case the zero oset will be reduced to get a zero result for next ESR measurement. With this methode the zero oset can be adjusted with a electrolytical capacitor with high capacity value and low ESR value. This learned ESR zero oset remains active after power o, but the adjust procedure to get the zero oset of ESR measurement must be done after every selftest and in this case you should always repeat the measurement some times."
If I am not mistaken, the current version of the code (v1.06k) does not take into consideration the hardware ADC offset by initially measuring it and subtracting it from every ADC result; this would certainly improve the overall tester accuracy.
If I manage to find some time to spare I will rewrite this project in assembly, in order to speed things up a little bit by avoiding the C compiler bloating. If I am not mistaken, the current version of the code (v1.06k) does not take into consideration the hardware ADC offset by initially measuring it and subtracting it from every ADC result; this would certainly improve the overall tester accuracy.
Damn, both of you Richard and George have made me to put this thread in one of my top watch list.
+1 I am with BravoV, nice job with documenting guys And thanks for the measurements Torch.
I ordered one a week ago, might build a case for it too.
Yeah, it is starting to look like this thread is taking on a life of it's own, doesn't it?