sorry if I sometimes seem to repeat myself, there is a bit of this that I am trying to get my head around, and lack good examples elsewhere of it, I was way off on that corner frequency and should have stuck with my old math, the hope with the delta sigma stuff was mainly for a second way to approach the problem, there is not many resources out there for 3 or more slope converters, but the internet is overflowing with really detailed breakdowns for delta-sigma, including the concept of modulation noise being moved out of the frequency range your measuring, which may be a way to reduce the effects of crosstalk and the switching, but your right, the math behind it, while extracting information, does not actually give a quick and computationally cheap way to reduce errors in the slope measurement. FPGA yes, Micro no.

Based on a limited gain of 1,000,000, I think we can represent it as a virtual resistor R2 on our integrator, with a value of 25Gohm, so in this circuit there should be a 0 gain cut off somewhere around 18KHz, "IF" this is the case, the math for the rest of the noise works out nicely (not yet counting power supply noise),

during run down I would expect about 200uV RMS @ 500KHz bandwidth noise for the comparator,

during residue measurement I would expect about 750uV RMS @ 45KHz bandwidth for the ADC, or almost 1 full LSB of the ADC when treated as Pk-Pk, but in reality the breif moment the ADC sampling cap is open cuts off most of the low frequency contributions making it far lower than this in practive.

The reference noise seems to be mostly from the input resistors, ending up about 2800nV @ 18KHz bandwidth per reference if my math is close to the mark,

And for Charge going in, assuming 1 reference, and the input, there is about 4000nV @ 18KHz bandwidth of noise, this is not yet counting the buffer, so a noise current of about 160pA, or a charge noise of about 3.2 pico-coulombs RMS, out of about 800 nano-coulombs for say a 1V signal, or about 1 part in 250,000, I wonder if this is why some designs went for a current source method for there references.

Edit: eventually I'm going to have to write up a nicer way of representing the sum of all these noise sources, as the bandwidth limited parts being summed with higher bandwidth parts is getting a little complex, and I now fully understand what you meant about R12 being most of the noise in the ADC,