FNIRSI-1013D "100MHz" tablet oscilloscope

[Atlan]

Download the fpga file again from github, and upload it to fpga

[engineer.r152]

Apparently, I turned the device into a brick, I'll have to flash the FPGA EEPROM with the CH341 programmer, but I won't be able to do this until Monday.

[engineer.r152]

Atlan, when I turn on the relay, the screen does not click and the screen is black, there are no signs of life at all, is this a problem with the FPGA firmware or a problem with the bootloader? Which flash drive should I restore?

[Atlan]

Very likely. I hope you had the 0.8 bootloader firmware there, because it bypasses the FPGA version check. The best thing to do is upload the original fnirsi fpga firmware.

[engineer.r152]

yes, all the latest versions and the 0.8 bootloader are installed. Does the FPGA firmware start first at startup?

[Atlan]

after switching on, the FPGA (loads the program from the SPI flash - without it the display will not light up - that is also a Chinese illogical solution) and the uP (loads the bootloader from the SD card) start at the same time

[engineer.r152]

good day! Atlan, I've restored the oscilloscope to working order, which version of the FPGA firmware can I flash?

[Atlan]

Only the ones I post here on the website.

I need a skilled professional to download the content from EF2L45. The programmer schematic and pictures can be found here:
https://github.com/Atlan4/Fnirsi1013D/tree/main/Verzia%201.xxx/FPGA%20for%201.xxx/FPGA%20EF2/PROGRAMER%20anlogic-usbjtag-master
a simply schematic programmer is enough.

[rozwell]

I can do that and I have two EF2 units to play with.
I'll just have to order STM32F103C8T6 and ST-Link V2 - do I need anything else?
Already have all the basic components like resistors, capacitors LEDs, etc.

[Atlan]

Nothing special, I soldered a 6pin male to the dps next to the EF2, and made a cable with connectors. The scheme is so special, single signals consist of multiple pins. VCC 3.3V is obtained from the oscilloscope, do not connect it from the programmer - the stabilizer in the programmer probably wouldn't handle it. Pin 4 is free, see pictures in folder.

Picture connector and cable
https://github.com/Atlan4/Fnirsi1013D/blob/main/Verzia%201.xxx/FPGA%20for%201.xxx/FPGA%20EF2/PROGRAMER%20anlogic-usbjtag-master/picture/IMG_20260112_132004~2.jpg

[rozwell]

Ok, order placed, should arrive in ~2 days

[ObsoleteDIY]

Only the ones I post here on the website.

I need a skilled professional to download the content from EF2L45. The programmer schematic and pictures can be found here:
https://github.com/Atlan4/Fnirsi1013D/tree/main/Verzia%201.xxx/FPGA%20for%201.xxx/FPGA%20EF2/PROGRAMER%20anlogic-usbjtag-master
a simply schematic programmer is enough

I only downloaded the raw FLASH from the FPGA and it cannot be uploaded back. So I can't restore the original FPGA firmware.

Hi, I'm not a FPGA professional, but I have an Anlogic AL-LINK (USB-JTAG) from Aliexpress, I don't know if it works.... I'll also try a universal programmer with EF2L support. I'll do FPGA Flash write/read tests this week and let you know the results.

[Atlan]

I don't know what you want to write.....

 It will only be possible to upload alternative FPGA content and use only alternative firmware. Edit: the original fpga fnirsi firmware is available. So restoring the oscilloscope to its original FNIRSI state is possible.

[ObsoleteDIY]

I don't know what you want to write, but I would like to point out that I don't have the EF2 fpga firmware. So if you delete it, the fnirsi oscilloscope firmware will no longer run on it.

 It will only be possible to upload alternative FPGA content and use only alternative firmware.

I understand... I will not perform a write/read test on the FPGA in the FNIRSI 1013D device.... Question: Can you verify that the content readed from EF2L FLASH into the ef2fnirsi2.hex file was readed correctly?

[Atlan]

It should be correct, 200kB was read by direct reading which is more than the actual content. That's why there are a lot of FF at the end.
I reprogrammed the FPGA, so I no longer have the opportunity to verify it.

[pcprogrammer]

Most likely the read back binary can be converted to a bit file, which then can be used to verify the content of another one and also be re uploaded to the FPGA with the use of the Anlogic software.

I have to look into my offline memory* to get to the how to. 

*It has been a while and my own memory is not as good anymore as it used to be, so the aid of a computer is needed to keep track of these kind of things. Also bought a new computer recently and have not made it up to date with all the ancient projects yet, so may need to reconnect an older one.

Edit: Take a look at the code here: https://github.com/pecostm32/Anlogic_AL3-10_Analyzing/tree/main/Anlogic_flash_to_bit_converter. I used it to convert the AL3-10 binary files back into bit files, and my guess is that it will also work for the ELF2 file. It might need some adaptation to fit the ELF2 header. See line 76 in the C file. The name of the input binary is set at line 153 and the name of the output bit file on line 386.

[Atlan]

I'll take a look at that. Since I already have the new content uploaded to the fpga, I can download it, convert it, and compare it with what TD generated.

[St_dsk]

fix brightness for EP4CE6 fpga

I tested the new firmware version. The display still dims at 50%. The display brightness at 100% is even lower than it was in the first firmware version.

My mistake, those are the remnants of the frequency change for dimming so that it doesn't beep. try

In the latest firmware for ALTERA, "fnirsi_1013D_EP4CE6.bin.txt" , brightness control works correctly.

[Atlan]

And the other things? Trigger, generator?

[Atlan]

Most likely the read back binary can be converted to a bit file, which then can be used to verify the content of another one and also be re uploaded to the FPGA with the use of the Anlogic software.

I have to look into my offline memory* to get to the how to. 

*It has been a while and my own memory is not as good anymore as it used to be, so the aid of a computer is needed to keep track of these kind of things. Also bought a new computer recently and have not made it up to date with all the ancient projects yet, so may need to reconnect an older one.

Edit: Take a look at the code here: https://github.com/pecostm32/Anlogic_AL3-10_Analyzing/tree/main/Anlogic_flash_to_bit_converter. I used it to convert the AL3-10 binary files back into bit files, and my guess is that it will also work for the ELF2 file. It might need some adaptation to fit the ELF2 header. See line 76 in the C file. The name of the input binary is set at line 153 and the name of the output bit file on line 386.

it doesn't work, even the crc doesn't follow the individual data

FPGA is created file in TD, 2.hex is download from fpga. scope5bit is convert file. and scope5.bit != FPGA.bit

[St_dsk]

And the other things? Trigger, generator?

The trigger and generator are working. Every time I turn on my oscilloscope, it goes into this state, as seen in the screenshot 3.jpg  below. Is this how it should be?

[Atlan]

No. It looks like the default settings are being loaded. Either it doesn't save when you turn it off, or the crc is bad. Try a different SD card.

[ObsoleteDIY]

Most likely the read back binary can be converted to a bit file, which then can be used to verify the content of another one and also be re uploaded to the FPGA with the use of the Anlogic software.

I have to look into my offline memory* to get to the how to. 

*It has been a while and my own memory is not as good anymore as it used to be, so the aid of a computer is needed to keep track of these kind of things. Also bought a new computer recently and have not made it up to date with all the ancient projects yet, so may need to reconnect an older one.

Edit: Take a look at the code here: https://github.com/pecostm32/Anlogic_AL3-10_Analyzing/tree/main/Anlogic_flash_to_bit_converter. I used it to convert the AL3-10 binary files back into bit files, and my guess is that it will also work for the ELF2 file. It might need some adaptation to fit the ELF2 header. See line 76 in the C file. The name of the input binary is set at line 153 and the name of the output bit file on line 386.

it doesn't work, even the crc doesn't follow the individual data

FPGA is created file in TD, 2.hex is download from fpga. scope5bit is convert file. and scope5.bit != FPGA.bit

The 2.hex file you downloaded from Flash FPGA contains a 16-byte header, but the ef2fnirsi2.hex file you sent earlier does not have a header. Am I understanding this correctly?

[pcprogrammer]

it doesn't work, even the crc doesn't follow the individual data

FPGA is created file in TD, 2.hex is download from fpga. scope5bit is convert file. and scope5.bit != FPGA.bit

I looked at the files and there seems to be a difference in the CRC length. This can be the result of a different version of the IDE. What you can try is changing the CRC in the code I wrote to be for 32 bit, but you still need to know the polynomial for it to work.

In your FPGA.bit file the header shows "Version: 4.6.116866" while I see "Version: 5.0.28716" in what I have been using.

The newer versions of the IDE are not available for download, and the license has run out again. I do have the zip for the 5.0 version, but it is to big to upload here. The newer versions are buggy based on the information given here: https://www.eevblog.com/forum/fpga/latest-version-of-anlogic-ide/msg4564654/#msg4564654

I made version 5.0 available from my google drive here: https://drive.google.com/file/d/12t6vhkghCVNoR0sE3o9tCnyUZA6NMUU8/view?usp=drive_link

[pcprogrammer]

The 2.hex file you downloaded from Flash FPGA contains a 16-byte header, but the ef2fnirsi2.hex file you sent earlier does not have a header. Am I understanding this correctly?

No your understanding is not correct.

Within the FPGA process from verilog to bitstream and binary for in a FLASH chip there are different file formats to consider. The IDE generates a .bit file that has a special header and a CRC calculated over the data. To make a file that can be written to a FLASH chip, the .bit file needs to be converted to a .bin file. This process strips the special header.

To go back from a .bin file to a .bit file the reverse action has to be done, and I wrote code for this while doing the reversal of the original 1013D FPGA binary.

It now turns out that there might be a difference in the .bit format of the older IDE versus the .bit format of the IDE that I used.