FNIRSI-1013D "100MHz" tablet oscilloscope

[ObsoleteDIY]

Can someone try the standard FNIRSI FPGA firmware 0x1432, oscilloscope firmware 1.00o, to see if the basic calibration works. If it doesn't work, press the orange button in the diagnostic menu to load basic values, press exit, turn the oscilloscope off and on, and try the basic calibration again. Write if it works then.

A few days ago I tested scope v1.00o + Fnirsi FPGA EF2L FW so the basic calibration didn't work. Now I'm testing scope v1.00n9 + Alternative FPGA EF2L FW. I should return the contents of the Fnirsi FPGA EF2L FW and do the test you request.

[Atlan]

Try this scope v1.00o3.bin with standard FNIRSI fpga firmware, run base calibration

[ObsoleteDIY]

Try this scope v1.00o3.bin with standard FNIRSI fpga firmware, run base calibration

Test today = basic calibration works. I am testing versions Bootloader v0.8, Updater v0.02v, Scope v1.00o, Back up Fnirsi FPGA EF2L FW.

[ObsoleteDIY]

Try this scope v1.00o3.bin with standard FNIRSI fpga firmware, run base calibration

Test today = basic calibration works. I am testing versions Bootloader v0.8, Updater v0.02v, Scope v1.00o, Back up Fnirsi FPGA EF2L FW.

I did the test several times and now Base calibration is not working, the device freeze but after a few minutes, the base calibration will be completed ...it takes a very long time

 "press the orange button in the diagnostic menu to load basic values, press exit, turn the oscilloscope off and on, and try the basic calibration again. Write if it works then"  = yes basic calibration works fast

[ObsoleteDIY]

I compared the display of the measured signal for different FW versions... same input signal, Fnirsi FPGA EF2L FW....captured images in the attachment...Are these hardware issues with the EF2L FPGA or is no one testing the new firmware anymore?

[ObsoleteDIY]

Note: When I tested the alternative FW 0x1632 for the EF2L FPGA, I stopped the measurement and displayed the signal waveform. At the end of the displayed signal, there was an unknown signal waveform. When I tested the original FW 0x1432 for the EF2L FPGA, the unknown signal is not displayed. Please watch the video.

https://drive.google.com/file/d/1qLd9QuyTGEtXCI5NZ9oyYZyxOgmX0nxd/view?usp=sharing

[Atlan]

Al3a10 and EP4ce6: have a maximum of 16k samples (limited to 15k by the program), EF2 has a maximum of 12k samples (so do not select 15k in the menu)
I fixed the display of samples on CH1 but keep in mind that the linear display setting skips samples, {it hides possible missing signals that are there but you may not see them}

[engineer.r152]

Good afternoon! Atlan, you can remove the zones in the main field of the voltage waveform of channel 1 and channel 2, for me this is a terrible solution, I constantly accidentally press these zones. Our oscilloscope has a beautiful and simple interface and it is not difficult to switch the menu and press the appropriate buttons that are located in their place, but these hidden areas are more likely to be errors and are perceived by people who are not aware of the entire history of the modification. I'm sorry if it's rude, they're just a lot more trouble than they're worth.

[ObsoleteDIY]

Thank you very much for the quick response and the new firmware. Linear tracking is now fine. I like the dot mode, but the dots are very small and poorly visible on the screen for my eyes. I know that EF2L has a limit of 12k samples, I do not use a higher setting. The problem with the unknown waveform occurs at settings: 9000 and 12000 samples. At settings of 3000 and 6000 samples, the unknown waveform is not displayed. See the attached pictures.

[ObsoleteDIY]

Thank you very much for the quick response and the new firmware. Linear tracking is now fine. I like the dot mode, but the dots are very small and poorly visible on the screen for my eyes. I know that EF2L has a limit of 12k samples, I do not use a higher setting. The problem with the unknown waveform occurs at settings: 9000 and 12000 samples. At settings of 3000 and 6000 samples, the unknown waveform is not displayed. See the attached pictures.

Update: Unknown waveform is displayed randomly on the screen during RUN measurement when memory depth is set to more than 3000 samples. See attached video (FW scope1.00o4+FPGA EF2L FW 0x1632). Maybe there is some interference, I don't know. I tried with and without probes.

https://drive.google.com/file/d/1el4RUZl8mW_ifHilKnlMsj6Q9xPwNol7/view?usp=sharing

[ObsoleteDIY]

I'm still testing FW oscilloscope 1.00o4 + FPGA EF2L FW 0x1632, I found new problems when switching memory depth. Watch the attached video. Sorry if I bother you. Do you have the same problems? It will probably be better if I stop testing FPGA EF2L FW 0x1632...

https://drive.google.com/file/d/1GI9SkcIIFRzMcYl0o90DYwH5Lssbfqd0/view?usp=sharing

[firefly-10]

Hello everyone,

First of all, I would like to say that what you are doing here is really great. Please keep up the good work. 

Unfortunately, I have a small problem. I have installed firmware 0.26V7. I can't seem to get 0.27 to work; it always starts the original firmware. Does it need to be renamed?   

But that's not the real problem.

When I try to start a baseline calibration with firmware v0.26, it ends with an error message, see image. With the original firmware, it runs without any error messages.

The DC shift calibration also does not work. I am using a 4V, with 2V DC offset and 1KHz square wave signal, as shown in the video.

But I cannot get the signal to zero and the value stays at 200 and does not go any higher. 

I also read here that there could be problems with the TL431/432 IC. I wrote down the voltages and resistance values as they are in my device.

Does anyone have any idea where the problem might lie?

Thanks in advance for your help. 

Best regards,
Dirk

[Felipe Lacerda]

updated ok   
Al3 / Atlan fpga firmware.

[Atlan]

431 is used to measure battery voltage. 432 in the input circuit is a reference that forms a virtual ground, 1.25V. Measure the voltage of the negative pole on the metal casing of the SD card holder, and the positive pole on the "gnd" BNC. And check the resistors from the bottom of the PCB in the area of ​​the BNC connectors, the diagrams are freely accessible.

[Magua]

Hi! Is there any instruction or guide on how to refine the FPGA AL3 with the latest working files and how to do it?? It's not clear when it's written on 15 pages and everything is confusing with questions and answers,,,

[ObsoleteDIY]

Hi Atlan,

I tried to generate an FPGA.bit file for programming the EF2L FPGA in SW-TD ANlogic 4.6.8 SP1 from the files in the ''FPGA EF2L45 ubuntu'' folder. My generated FPGA.bit file is the same as the original FPGA.bit file in the ''FPGA EF2L45 ubuntu'' folder, except for the date. However, I noticed a warning in the timing report, see the attached screenshot with both SW versions TD4.6.8 and TD5.0.3. TD Anlogic 5.0.3 reports different timing parameters and generates different content of the FPGA.bit file, but the warning still appears. Could this be the cause of the problems encountered when testing the alternative firmware for the EF2L FPGA? Is the warning irrelevant?

[firefly-10]

431 is used to measure battery voltage. 432 in the input circuit is a reference that forms a virtual ground, 1.25V. Measure the voltage of the negative pole on the metal casing of the SD card holder, and the positive pole on the "gnd" BNC. And check the resistors from the bottom of the PCB in the area of ​​the BNC connectors, the diagrams are freely accessible.

Metal housing SD card  ->  Positive inside pin BNC    = -1.78V
Metal housing SD card  ->  Negative outside BNC  = 1.94V

Voltage 432 Pin 1&2 = 1.93V
Voltage drop D11 = 0.22V
Voltage drop D12 = 0.05V 

The voltage drop across diode D12 is close to 0 volts.

Measured without voltage using a diode tester.

Could this be the reason (it probably is) that the virtual ground does not fit and the calibration does not work?

Unfortunately, I cannot test the resistances in the input directly, as my resistance meter can only measure up to 1M ohms. However, the values displayed are identical for both inputs.

[Atlan]

Replace 432 it is a 1.25V reference.

[ObsoleteDIY]

Thank you very much for the quick response and the new firmware. Linear tracking is now fine. I like the dot mode, but the dots are very small and poorly visible on the screen for my eyes. I know that EF2L has a limit of 12k samples, I do not use a higher setting. The problem with the unknown waveform occurs at settings: 9000 and 12000 samples. At settings of 3000 and 6000 samples, the unknown waveform is not displayed. See the attached pictures.

Update: Unknown waveform is displayed randomly on the screen during RUN measurement when memory depth is set to more than 3000 samples. See attached video (FW scope1.00o4+FPGA EF2L FW 0x1632). Maybe there is some interference, I don't know. I tried with and without probes.

https://drive.google.com/file/d/1el4RUZl8mW_ifHilKnlMsj6Q9xPwNol7/view?usp=sharing

I'm still testing FW oscilloscope 1.00o4 + FPGA EF2L FW 0x1632, I found new problems when switching memory depth. Watch the attached video. Sorry if I bother you. Do you have the same problems? It will probably be better if I stop testing FPGA EF2L FW 0x1632...

https://drive.google.com/file/d/1GI9SkcIIFRzMcYl0o90DYwH5Lssbfqd0/view?usp=sharing

Hi

I generated a new FW content  "debug name 0x1832" for the EF2L FPGA. My changes fixed the timing issue for 200 MHz and I fixed the sample memory overflow. The new FW 0x1832 for the EF2L FPGA works. There are no random waveforms during measurements and the memory depth switching is fine. I will test the FW 0x1832 for the EF2L FPGA.

[Atlan]

The DSO fw also needs to be fixed, because it is calculated with a circular memory size of 2*8k. Throw the file here, let me take a look. Did you add a register to the fpga that resets after about 6000 samples?

[ObsoleteDIY]

Hi,

Yes, I fixed the memory end address 6143 for the registers that work with memory (see MEM_END_ADDR, addr_delta). I changed "assign sample_clock_enable = sample_rate_divider < (sample_rate_counter +1)" so that the timing reports are OK (reaches the required 200MHz). See the attached file. Are my changes OK? I'm using TD Anlogic 5.0.3. If you fix the FW DSO, should the FPGA EF2L work correctly? Thanks.

[Atlan]

I got into fpga a year ago, and he started working with me recently, so maybe you know more about it than I do. PS 3:2 win

[ObsoleteDIY]

Hi,

I’m not an FPGA professional, and I’m not sure if the modified files I sent are correct.  I just want the alternative Atlan firmware to work reliably on my EF2L45 FPGA. My posts are not criticism of Atlan FW, just feedback that might help identify or fix issues. If you make a fix in the new DSO firmware, I would be happy to test it with FPGA FW 0x1832. Thanks

PS 3:2 win

Parada

[Atlan]

ALL10 includes bin for FPGA EF2L45 for TD application and jtag programmer, and firmware DSO 1.00o5 with EF2 6144 sample memory support.

DIY check the FPGA files in ubuntu, is everything you edited changed.

[ObsoleteDIY]

Hi,

The *zaklad.v* file in the FPGA_EF2L45_ubuntu folder does not contain all my changes and is different from my *zaklad.v* file. Did you remove changes that were not needed, or was there an error copying the changes to the *zaklad.v* file? If all my changes are needed, you need to overwrite the *.zaklad.v* file in the FPGA_EF2L45_ubuntu folder with the file I sent.

NOTE: The memory size in FPGA EF2L is 6143 x 32bit, which means the limit for FW DSO is 2x6143(6000) samples or 2x12286(12000) samples? I am testing new FW DSO 1.00o5 + FPGA FW with version 0x1832 and it is not working properly (see attachment). Do I need to upload content to FPGA EF2L FW with version 0x1632 or is there a problem in fw DSO 1.00o5?