Programming (non-JTAG) MAX7000 devices

[jgustavoam]

EPM7128SLC84 - Arduino Programmer - Assembling the prototype:

Begin assembling the Arduino Parallel Programmer prototype for the EPM7128SLC84.

More pictures:
https://github.com/Gustavomurta/EPM7128S_CPLD/tree/main/HW_Programmer

Making use of the socket from an old board.




Assembling the board with the removable socket. I added external pins for connections.



A new idea. Since we don't yet know the functions of all the CPLD pins, I intend to use this type of connection with jumpers.

[ale500]

It looks good. I want to do a PCB with jumpers and let jlcpcb fabricate it for me. For 3.4€ per board design (I would order some other pcbs)  I wouldn't have to dive into the mess of wires that my current board is. But how do I send you it ? But I see you have a solution already.

[jgustavoam]

Ale500,

Before designing a PCB, it's necessary to ensure it will function. Let's wait and see how the project progresses. Thank you.

[ale500]

I was a bit light on details: A PCB with a socket and 84 jumpers with 2 positions for pulling up or down. and two JTAG sockets. The PCB could then be used for different models like the XC9572. And a row a pins to connect as in your boatd. Maybe I can get to it today.

[jgustavoam]

EPM7064LC84 - Tests and verifications:

I have already set up a test board for chips that use the PLCC84 socket.
Since I don't yet have the EPM7128SLC84, I am performing measurements with two PLCC84 chips (without S) that I own - an EPM7064LC84 and an EPM7096LC84.

I measure the voltages on all pins in two basic modes. One mode - normal use with the VPP/OE1 pin (pin 84) = 5V and the other mode - programming with the VPP/OE1 pin (pin 84) = 12V.
My probe uses two 220-ohm resistors, as I previously mentioned.

https://www.eevblog.com/forum/fpga/programming-(non-jtag)-max7000-devices/msg5723473/#msg5723473




I made a very important discovery!

In programming mode, the NTPW pin (pin 1) must always be enabled beforehand (5V-high).


If the NTPW pin is not enabled, when I connect the 12V, the CPLD increases its current consumption and gets very hot. I think it might even burn the chip!

This should apply to all Altera CPLDs.

NTPW -  N = non or no, T = ??,  PW = power?

Reviewing:

NTPW - function Program/Write Enable : Must be HIGH to program or write CPLD.

[ukamak]

Hi, yes in our logs on power up first goes NTPW after Vcc 5v and after Vpp 12v , NTPW only goes down on erasing or programming. Powerdown sequence is Vpp , Vcc , NTPW 

[jgustavoam]

EPM7064LC84 - Tests and verifications (SCOA, SCOB, SCOC and SCOD verified!)

By measuring the voltages in programming mode, I was able to confirm the functions of the SCOA, SCOB, SCOC, and SCOD pins.
See the measurement table. (Based on the PLCC84 adapter from the Labtool 48 programmer.)

NC = no connection
CONN = connection

Some of the pins were in an unknown state. The voltage fluctuated, and if I brought my finger close, the voltage varied. (pins 10, 29, 56 an 75).

Reviewing the functions of the pins - I think that's it:

PIN 10 = SDOA
PIN 29 = SDOB ??
PIN56 = SDOC ??
PIN75 =  SDOD ??

Lots of tables and lots of pinouts. And I got confused. I corrected the NC and CONN identifications in the table.

[jgustavoam]

EPM7128SLC84 Programmer - VCC control Switch:

I discovered a new way to control the power supply to the CPLD. Control of VCC (5V) and VPP (12V).

LH1500 datasheet (Solid State Relay):
https://www.vishay.com/docs/83804/lh1500aa.pdf



Or if you prefer, use MOSFET:

[jgustavoam]

EPM7128SL84 Programmer - I need a CPLD:

CPLD chips are complex and have several pins with different names. And I'm already confusing the EPM7064 with the EPM7128.
I can do tests with the EPM7064 that I have. But the EPM7128 has more LABs (8 LABs) than the EPM7064 (4 LABs).

Does the EPM7128SLC84 have these pins?
- SCOA, SCOB, SCOC, SCOD, SCOE, SCOF, SCOG and SCOI ?
Or are the GAD0 and GAD1 pins used to multiplex the LABs?

I will need an EPM7128SLC84 to proceed. Here in Brazil the price is absurd.
While I can't find an EPM7128SLC84 at a reasonable price, I'll keep researching with the my EPM7164 (without S).

[ale500]

I have no idea if the EPM7128S has these pins, or where are they positioned. Thats exactly the problem.
I installed quartus and max ii plus and had a look at most of the files there, I was hoping to find any hint. But I see nothing that helps me identify where these pins are located (or any pins for that matter). There was a comment that in some help file of this max ii software the pin outs where described, haven't seen such help files.

 I could try your approach to see which pins are inputs and which are outputs. I'd assume that when one sets VPP to 12 volt, the NTPW should change function if it is configured as an output. Or does it has priority and then VPP becomes an input ? I'd think VPP is always an input.

Sending these chips to Brazil would cost like 16 € and I'd need the CPF-Nummer, and an address. Or I can use the money and get some test PCBs and work in parallel.

[ukamak]

Maxx II plus help files where we can see some info , about pins to cell realtion.
Also one Spreadsheet with info for max family pinout and others
 maxII_help_and_max7000_Spreadsheet.7z (3571.99 kB - downloaded 48 times.)

Working with Gustavo on EPM7128s  we have that provisional pinout, some pins does double function
 maxII_help_and_max7000_Spreadsheet.7z (3571.99 kB - downloaded 48 times.)

Hope this week we can try to erase it on arduino board

[ale500]

Thanks for the files, now I do not have any more excuses to not try it again .

Thanks for the info.

[jgustavoam]

Ale500,
Thank you for the offer to send me the chips. But I'll continue looking for CPLDs here in Brazil. Thank you.

[AndyP`]

I have just built an adapter to allow programming EPM7128SLC84's using a Dataman UXP48 programmer.

With it I have managed to erase 3 devices that would not talk JTAG using an Altera ByteBlaster but now do.
Once I get a bit of time I will try to use a Dr Gussman designed 48 Channel logic analyser to view the 46 connected pins during the erase cycle.
This might help everyone in determining what is needed to produce a cheap programmer for these devices.

[jgustavoam]

Hi AndyP,

Any help will be appreciated in figuring out how the ERASE procedure works on the EPM7128SLC84.
I've read about this logic analyzer by Dr. Gusman. It's a very interesting project, but it has a limitation that makes it difficult to capture – the storage memory is very small.

https://github.com/gusmanb/logicanalyzer

Thank you very much for your interest in helping.

[AndyP`]

That's the only Logic Analyser I have so I'll see what happens.

I did notice that the Dataman has totally different wired adapters for the 7064, 7128 and 7160 PLCC84 chips. Other than a cash cow one wonders why?

[ukamak]

Welcome AndyP,

Nice to see other people with 48-uxp, that's our home SDP-7128-84 adapter, it's in 2 parts like elnec sockets, bud cheaper. Like that You need to change only bottom board for others IC's.
You need different adapters because on labtool48 you have a dip48 pins socket and devices are 84 pins, You wire from 84 to 48 pins and not all devices use same pins to program it.
For 44plcc devices you need only one socket.
Hope to have time to continue our investigation.

[AndyP`]

Thanks ukamak,

I did my adapter in one piece based on a design from https://blog.system11.org for the EPM7064.

A quick check with a scope during read and erase has revealed some issues that I'll have trying to use the Dr Gusman logic analyser.
A lot of the pins have 5V pulses, either positive from 0V or negative from 5V which might just be a high dropping low for a while, not too much of an issue.
other pins start with 5V pulses and then drop to either 3V or 2V pulses, again either positive from 0V or negative from 2V/3V. Again might be a 2V/3V high dropping low for a while. Will be an issue. Need to look at clamping at the analyser inputs.
Pin 84 starts at 5V pulses then goes to 10V. Same issue, would need to clamp.
But also need to track when the pulses change from 5V to 2V/3V/10V.

Need to have a think about how I could do this. Anyone with a 48 channel analyser going spare??

[ukamak]

For LT48-UXP You need to disable "Insertion test" , at beginning they try all pins for over/under current.
Also some times is good to disable Device ID check, depends on what you're looking.
Here some alpha test We did on EPM7128 , need to work more , only read SCOA and SCOB
Still working on EPM7032s now and new extension board for arduino to support better 7032,7064,7128....

[AndyP`]

Have captured an Erase only from my Dataman for an EPM7128SLC84. Not sure at the moment on how to decode the captured signals but some look very similar to those from the EPM7032S. How does it look to you?

I used a zener to cap the measured voltage from OE1n so I don't kill my analysers input.

What did you use in PulseView to decode SCOA and SCOB?

[ukamak]

Copy that folders to Your "\sigrok\PulseView\share\libsigrokdecode\decoders"
That's only for 2 channels, bud you can place 1 or 2 or... , editing them with A,B/ C,D/ etc Or make a new one with more channels.
When I have time I will Check your logs
You need to use 7032s , 7032 is older and diferent.

[ukamak]

AndyP That's Your decoded SCOx , seems is ok.
Your "DIP16-PLCC41-LABD64" is SCOD in my notes is on plcc33 , needed to double check, if Your connection is really PLCC41 that will be the good one.

[AndyP`]

Hi ukamak,

Thanks for looking through this,

You are correct, should be DIP16-PLCC33-LABD64. It goes to channel 41 on my logic analyser. Obviously an error on my part.

[AndyP`]

As I now have a known working adapter, analyser and programmer along with a few EPM7128SLC84's what can I do to help with this project?

[jgustavoam]

Very good! The goal of some members in this thread is to unlock the use of CPLD EPM7128SLC84.
Therefore, the clear and write procedures are the most important. The read procedure can also help.
If you have any questions, let me know.
Thank you very much.