HP 34401A hacks and upgrades

[Kleinstein]

Some 3.9 V should be perfectly fine for a logical high. No need for more. It is a bit surprosing that the small change had so much effect one the reading - I had expected much less, like only a change in the noise, especially fewer outlyers. An extra schottky diode for the negative side could still help.

[iMo]

I edited above:

OK with 2x BAT42 I get 5.30 to -0.38V and it shows 9.999.. I let the 6.2V zener soldered there, it cannot harm, as a backup ..
BATs soldered from the bottom side, fortunately there is a lot of vias, all are tinned through here (the shot at xdevs.com is from an older revision with many vias under solder mask)..

[iMo]

I abandoned the RC filter at the input of the U400A (47k/3u3) due to effects introduced by the RC. I removed the other 3u3 at the U401B input as well.

After power on (when the C was disconnected for a day) it ramped up by aprox 13ppm (against 10V ref) in the same manner as shown in my replay #130 and then a continual discharge like process started taking 12+ hours, I never let it come to full steady state (the life is short). It means the voltage at the opamp input was slowly rising.
Most probably that wima 3.3u/50V is not the right C for that purpose, or, does the AD706's input current steal the C's i(R) charging current (plus minus C's leakage current and its TC) somehow??, or.., or mine wima is somehow faulty.

With the RC removed I land within 1ppm in aprox 2hours after the power on.

I also took a bunch of 4u7/50V 1206 ceramics I had in my junkbox and soldered from the bottom side at the +/-15V and 5V lines (against the respective ground segments). In total a dozen of pieces.

I currently let the stuff settle for some time and I will observe TC and the pops/jumps/walks (so far none, keep my finger crossed) with following changes applied:

1. 2x BAT42 for fixing the LSENSE signal amplitude issue
2. decoupling of various +/15V and 5V inguard power lines, 4u7/50V ceramic 1206
3. additional 5n6 ceramics to the C449
4. ADR1399 and its snubber.

PS: ..deleted because of a wrong assumption..

[iMo]

While playing with the C449 capacitor (decoupling of the +5REF powering the auxiliary MCU_ADC module incl. its reference) I saw with larger capacitors, like 100n ceramic, 4u7 ceramic, 10u tant, that the 10PLC std was always larger, like 3.5-5uV (even after adjusting). With the stock 10n one it is around 1.7uV (walking 1.4-2uV).
I've tried to simulate the situation - see below. Any capacitor larger than 10n makes the voltage not "constant" (but still noisy a bit) during the SAR conversion period.

With the stock 10nF the dip is large, but inside the dip the conversion part (the second half of the conversion clock burst) is "kept at a constant level". Mind the resolution of the MCU_ADC is aprox 5mV (but perhaps 8.5bits ENOB only, imho).

So it seems one would need a fast buffer with low output impedance to get couple of stable LSBs out of it (but important one!!, not counting runup noise contribution). Another experiment could be to replace the stock 10nF X7R with a CG0 one..

The sim is a rough aproximation only as there are most probably other parasitic factors too (resonances, TC..).

PS: the MCU_ADC conv dip is aprox the same level as the spikes in my above scope shot - coming every 20ms with 10PLC..

PPS: the auxiliary MCU_ADC works together with ASIC's comparator, where the runup is organised by the asic such the residual voltage is always around the 2.5V. So the start2end of runup voltages should be centered around the mid of 5Vcc (not the half of the +5REF). So the comparator inside the ASIC might be the another source of noise.

[iMo]

I went back with the RC filter wired after the 1399, installed the 8k2/3u3 this time (still the same wima MKS2B043301H00).

The voltage topped +30uV against "none RC" after 2h this time, and now slowly dropping.

So the similar scenario as with the R=47k above (where it topped aprx +150uV) which led to say 2.3nA..

With the R=8k2 the current through the R is 30uV*0.7/8k2 = 2.5nA.

So it seems those Wima red bricks (MKS2 3.3uF/50Vdc) are rather leakish, tbh.

I made a naive I_leakage measurement (7V and 10Meg) and with other  3 identical Wimas I saw 160-280pA at 24C (after short soaking). Now, how the leakage increases at ~40+C inside the dmm and where it finishes..

The Wima DS for this type only states >=5Gohm resistance at 10V for this type, which leads to <2nA.

I've found two bulkier capacitors which may physically fit there (0.8u and 1u) where both showed something like 10-20pA under the same measurement..

BTW, a sim is showing identical results with those leakages (with 38pA AD706 inp current)..

PS: a quick hairdryier at say ~50C shows 4-5nA current with one of my wima 3u3/50V..

[Kleinstein]

I am a bit surprised with that much leakage from the capacitor. with my ADC circuits I have a filter with 4.99 K and 4.7 or 6.8 µF MSK2 with some additional capacitance muliplication (capacitor from some -13.4 V). I have no checked for an effect on the gain, but have not seen slow settling. I actually see surprisingly fast start up (like within < 1 ppm after 1 minute), which in part could be from low power and thus not so much temperatuer rise on power up. There is a small initial delay expected from the dielectric absorbtion that gives a slowly decaying tail to the charge current. This should be on the order of 1000*RC for 1 PLC for 1 ppm and 10000*RC for 0.1 ppm - not exponential settling, but more like 1/ time. That should be in the 10s to a few minutes range and would normally be acceptable.

[iMo]

.. added above a quick hairdryier test.. 4-5nA with one of my sample at 45-55C roughly.
Perhaps yours are for 100V or 160V, mine are the smallest for 50V..
And mind the temperature inside the 34401A - the AL shield 20mm above the pcb close to the HP resistor array is at ambient+19C, the temp on the pcb 35mm off the 1399 could be several degree higher..
I even added copper fins to the 337 and 317 main voltage regulators, as the pcb temperature on the bottom side beneath them was way above 50-60C (you cannot keep the finger at the pcb there for more than 1-2secs.. and that with the box opened, of course )..

PS: aprox 3.5hours of cooling (after the 3-4 minutes of the hairdryier torture) the leakage of the sample dropped down to 60pA (at 24C).

[iMo]

A new capacitor - 1u yellow noname with 8k2 in RC low pass.
Below the warmup phase, 10PLC, meter was adjusted (no RC) to 10.00V 2 days back.. No overshoot like with the 3u3 Wima..
Mind the STD.. Attacking 1.1uV..
How it would be with 47k/quality_3u3 ??

[Kleinstein]

There is already quite a bit gained from only a little fitlering (e.g. ref. noise in the 100 kHz range that is also active with shorted input).
The next frequency range that contributed is than already much lower (like < 30 Hz for 1 PLC and < 3 Hz for 10 PLC) and more difficult to filter. It would also only effect in proportion to the input signal. So 47 K and 3.3 µF is not that much more effective filtering - especially not for the shorted input and with a later change to an ADR1399 reference.

[iMo]

It is not only about the filtering effect but leakage stability as well.
I have here an MKT 1822-15 0.8uF light green brick, still small and easier for mounting than the yellow one (the yellow is nogo from mechanical point of view there). It has got 10-20pA at 24C and aprox 160pA at ~50C. With the 8k2 it makes aprox 0.23ppm diff.
The actual diff is not critical even with 47k (1.4ppm diff), what is unknown is how is the TC of the leakage, its hysteresis, and how leakage is stable long term.
With leakages like 1-2nA at 40C it plays a significant role even with this cheapo gear..

[GigaJoe]

tantalum smoke yesterday in my 92y 34401 ,  replaced to all polymer 680x25 ; and the 5v small tantalum as well,  as well i noticed an old dmms , with red connectors tend to flipping LSD constantly ,comparing to newer models ,  it maybe internal chips design better , or in fw. better averaging. 
Thinking .. changing caps to large one can be another 2 cents, and u may to look around for 0.1 ceramic that close to opamps, and add some 20-30uf tantalum in parallel,  usually it another 2 cents.

[iMo]

I added about 20 capacitors from bottom side, mainly 4u7/50V ceramics, in 4-6 positions in combination with tantalum drops. There are stock 100nF everywhere already. Of course, the 2 layer pcb did not allow for an optimal routing and decoupling/grounding..

I do not see the flipping of the LSD (red connectors here from '99 US) when talking here displayed value..With serial data I saw ie. 6 values in row with identical values at 10NPLC..

[GigaJoe]

my REV: 03-01-01

[iMo]

Mine is 10.05.02..

Below a longer measurement with RC 8k2 and 1u yellow.

[iMo]

Perhaps the final version - this time 47k and 0.8uF MKT light green brick.
The capacitor glued from the bottom pcb side, first attempt went wrong (there is the bottom aluminum shield, of couse ), but hot glued so IPA worked quick.
2.5 hours after the power up it is aprox -0.3ppm below 10V, so lower than with 8k2/1u above (both at 24C amb), that means the voltage at the green capacitor is higher than it was with yellow (less leakage).
Noise wise - hard to say yet, but at the first glance it is attacking 1.2uV STD levels less times, so like the avarage is a little bit higher than with the 8k2/1u_yellow, we will see..

[Dr. Frank]

Mine is 10.05.02..

Below a longer measurement with RC 8k2 and 1u yellow.

Thank you for all your effort.
Anyhow, as I still think that the replacement of the LM399 would give better noise performance, would you mind providing a NPLC100 ADEV diagram, so to have a direct comparison to the 34470A/34465A and the 3458A for me?

Maybe you already did that, then I have overlooked this.

Another hint: it would be great, if you could provide the rms noise = StD numbers inside each of your noise diagrams, like I always do it, like here:
https://www.eevblog.com/forum/repair/fluke-343a-cleaning-repair-and-improvements/msg6212225/#msg6212225

Regards Frank

[iMo]

Frank, I did ADEV above with 10PLC for the RC = 8k2/1u_yellow (1 day long).
I will do the ADEV with 10PLC for the new RC = 47k/0.8u_green.
I will do for ADEV with 100NPLC with the new RC as well (as I use 100PLC usually) later on.
STD - I do a sliding 100 samples window (40secs with 10NPLC) - for observing short time excesses it is ok, afaik. Also its mean is somehow an indication of the noise level.
Note: my all measurements are against my ADR1001#1 reference (~10V).

PS: out of curiousity I've made a sim of the ref noise for various combos below.

[Kleinstein]

The Allan deviation for 100 PLC would be not much different from the 10 PLC case (mainly missing the shorter time end). 100 PLC are done as averaging 10 PLC conversions and the Allan deviation uses averaging for the time scale. So there is no real need to do 100 PLC Allan deviation separately.

For full noise testing the point is more having the Allan deviation for both with a 10 V external reference and shorted inputs.

p.s.:
While there is some of the higher frequency reference noise (e.g. 170 kHz range) that can contribute, it would only be a few frequenices with an overall small bandwidth (like the ADC input BW). So it is not the integrated 0.1 - 100 kHz noise that matters.

Reference matters for the very low frequency band like 0.001 Hz - 1 Hz as classic reference noise.
Than some noise at around 1/ (2 * time for sample)  ~ e.g. 1.2 Hz. This from doing a zero reading half the times and getting thus some kind of aliasing of the reference noise, doubling the noise BW. Due to the higher frequency this noise is not a big issue though.

[iMo]

First data on 47k/0.8uF RC, 10PLC, first start - warmup.

PS: BTW., the "0.8uF" is a weird value, indeed, but it is written on top of the brick and it showed 0.810uF ..

[iMo]

Tried the 8k2/1u_yellow 1 day measurement with GigaJoe's statistical package.
10PLC, fortunately I've been logging millis too ..
I have no clue what all that figures mean (especially the Report)  , but my nice to have for potential updates:
1. place the printed out picture in the dir from where you run the script
2. an option like -M for reading the time in milliseconds (when using the -S format)..

[GigaJoe]

kinda a lot gibberish, and same stuff ..  but you can look at:
 BASIC STATISTICS
mean and median in ideal the same:
Std dev sigma -  basically you RMS noise
Peak-to-Peak - it clear
same - min max
Skewness - it gaussian distribution

then you can look at
DRIFT & SYSTEMATIC ERRORS
you voltage  +- error , let say
noise floor  - MADEV
drift for 24H
24h periodic effect -  if you have a long run like 48h or more , it trying to calculate day\night deviation and , add compensation ....

as i said , it basically i did try statistical mambo jumbo to calculate precise value  eliminating, noise drift,   etc ...  i think it need a signific polishing before mass production

[iMo]

A day with RC 47k and 0.8u green.
The temperatures spread was higher this time, so the ADEV is a little bit worse with longer taus.
The yellow capacitor was mounted above the pcb, the green on the bottom side of the pcb.

The mean of STDs (each sliding over 100samples) over entire measurement:
8k2/1u      1.48uV
47k/0.8u   1.45uV

PS: that tooth didn’t disappear — it went on vacation to Tooth Fairy Island..

[iMo]

Here is the comparison of three ADEVs (see the description in the graphs).
The 100NPLC with the ADR1399 measurement has just started and I will update the graph here with time..

[GigaJoe]

so your minimal noise 30sec samples  as a single window, it takes all samples and apply this windows , getting "effective N" as average per window 321 in you case , than we calculate resultant and uncertainties in your case 0.1 microvolt
as best estimate ,and mean identical , it suppose almost ideal gaussan,  non ideal are drift ..
spikes  sanitized - 12841 samples as out of ordinary , and replaced by average.
in the text output you may find out calculated drift per 24h ,

that missed bin in gaussan - no numbers ? hm ..

[Kleinstein]

The missing bin in the histogram is odd. From the graph it looks like all levels are there. So the missing bin could be a rounding (e.g. convert to float and round back to the same resolution) issue with the SW generating the histogram.