Logic-ICs - die pictures

[Noopy]

The National Semiconductor DM74LS14 contains six inverting Schmitt triggers.






The assembly technology is surprising. No bondwires were used. The die was contacted directly via a small punched grid. This small grid is connected halfway with a larger punched grid, which ultimately forms the pins. The surface structures of the epoxy material suggest that the package was built in two steps. The two-part punched grid would fit in with this.




The edge length of the die is 1,3mm x 1,1mm. The character sequence 54LSR14 is shown in the bottom right-hand corner. How the R is to be assigned remains open. The revisions of five masks are shown in the top right-hand corner. The six Schmitt triggers are not immediately recognizable, but can still be easily distinguished.




That´s a ... ... ... silicon art, a face!?




The circuit is still quite simple.


https://www.richis-lab.de/logic45.htm

 

[Noopy]

Another MIL-STD-883 SN54JAS04 logic. Here we have the "Advanced Schottky" with two AND gates with four inputs each.






The dimensions of the die are 1,3mm x 1,4mm. As usual for Texas Instruments, the Ti logo is shown in the bottom left-hand corner. A test structure is integrated in the bottom right-hand corner. This is not an active element. Apparently, the three contacts can only be used to measure a homogeneous surface.




There are quite efficient test structures on the bottom and right edges of the die, which allow the alignment of the masks to be determined relatively easily and accurately. As with a sliding gauge, the distances between the small strips in the different layers are different, so that the degree of displacement is very clear. Bottom an left is for X and Y shift.




The character sequence 54AS00 is shown in the substrate in the top left-hand corner of the die. Below this, the metal layer shows the character sequence 54AS21. This suggests that the design can represent several variants of the 54/74 logic. The structure of the circuit matches this. It is clearly visible that the die contains the same circuit four times. Apart from the input transistors, only the right-hand circuit is used in each case.

It is very likely that the design can display at least the SN54AS00 (4*2-input NAND), the SN54AS08 (4*2-input AND) and the SN54AS20 (2*4-input NAND) in addition to the SN54AS21 (2*4-input AND). While the left-hand side only has two input circuits, three input circuits are integrated on the right-hand side. It is therefore conceivable that the logic variants with three inputs can also be displayed on this design (SN54AS10 and SN54AS11). A third gate must then be constructed from the parts on the left side.


https://www.richis-lab.de/logic46.htm

 

[D Straney]

Still working on getting that PT2399 cleanly decapped, but meanwhile, here's a logic chip to look at...

I scored an interesting module on Xianyu recently, which looks like it was part of a Chinese radio (aviation? military?).  The components and construction are a strange mix of Soviet-era Russia, USA/western-Europe, and uniquely Chinese.  Fascinating comparing the sourcing of different pieces.  Anyways, it has a row of these ICs, and as there's no way I'm going to find any data on them, I need to open them up to figure out what they do, so that I can reverse-engineer the circuitry in the module.

Luckily, most of them are the same model: this "T076BA DG II", except for one that I'll be looking at in the future.

Here's the die:

• It looks like TTL: there's clearly sets of nested wells which scream "bipolar transistor" to me, and not much in the way of resistors
• Ground was easy to find because it connects to the substrate in a couple places, and that pin connects externally to the enclosure/shield
• There's a protection diode on each input pin, which made it easier to figure out which silicon doping was which: I used my multimeter's diode check to check the polarity of these diodes relative to ground, which told me that the substrate was P-type and the 1st (outer) wells were N-type.  From here, it was easy to look at the alternating nested wells, and figure out that the transistors were all NPNs, and where the base connections were.
  
• The "T076" marking is reversed: that's not an artifact of my microscope setup. Someone didn't account for the various flips when making the mask?

Here's the contents, labeled:


When traced, it results in this transistor-level schematic:

At first, I was very confused about which side was the collector and which was the emitter, on each transistor, because of the connections of Q1-Q15, Q2-Q14, etc.
I'm not too familiar with IC design or TTL circuit details, so the workings may be obvious to others here, but I spent a lot of time trying to figure out what I'd done wrong despite the very simple connections & process.  I couldn't figure out where the base current to Q12-15 was coming from.  It turns out that the designers get their full usage out of every PN junction, though, by selectively forward-biasing the base-collector junctions of the multi-emitter transistors.  Q1-4 are used more like diode arrays than a traditional current-amplifier role.

Let's look at Q1 and Q15, for example: when all the Q1 emitters are high, the transistor is off.  Base current flows through R1, then the base-collector diode, and into Q15's base.  The common connection with Q10 sets the Q1 collector voltage to 2*Vbe above ground, so that this next part can work correctly.  When any of the Q1 emitters is brought low (below the Q1 collector voltage), it now forward-biases the base-emitter junction, turns on Q1, and "steals" the Q1 base current.  Now, the base-collector junction is no longer forward-biased, so Q15 turns off.

The same is done with Q9/Q6 & Q5/Q11: Q5 & Q9 get their base current through Q6 & Q11's forward-biased base-collector junctions, when the Q6 & Q11 emitters are high.

The right-most sections are obviously power stages to drive the output pins.  Q18 & Q19 are Darlington arrangements, with both transistors living in the same collector well.  These provide the high-side drive, while Q16 & Q17 provide the low-side drive.  R7 & R8 provide base current to the high-side Darlingtons, until Q8 or Q7 turns on and shunts this current to the bases of the low-side drivers instead.

Q20 & Q21 have a strange arrangement which I don't completely understand, and might use the lateral resistance of the base somehow?  They seem to be meant to limit the base current to the low-side drivers, maybe to keep them out of saturation (or limit the saturation).

Anyways, tracing out the equivalent logic implemented by these transistors, we end up with this:

You can see 3 separate R-S latches made out of NAND gates.  The two left-hand ones are cross-coupled to each other, as well.

The connections are easy, but figuring out the intent behind the 3-way-coupled latches seemed much more difficult, so I looked at common logic-gate implementations of standard flip-flop types: it looked like it would be a J-K or D flip-flop.  Turns out, the D-flip-flop diagram shown on Wikipedia matches perfectly: https://en.wikipedia.org/wiki/File:Edge_triggered_D_flip_flop_with_set_and_reset.svg

Matching it up with the gate-level schematic above:
Pin 10 is ~Reset
Pin 13 is Clock
Pin 4 is ~Set
Pins 1, 2, and 3 are Data: all effectively AND'ed together?
Pins 5 & 9 don't have a direct equivalent: it looks like pins 4 & 10 are a synchronous Set/Reset while pins 5 & 9 are asynchronous Set/Reset?

Now knowing that all these chips are D-flip-flops, and having their pinout of these chips, it shouldn't be hard to figure out what this module is doing (probably a frequency divider)...once I decap and trace the other unique IC onboard.  Hope this was interesting.

[Noopy]

The components and construction are a strange mix of Soviet-era Russia, USA/western-Europe, and uniquely Chinese. 

The who and why behind such constructions would be interesting.
Today we have everything we need it´s just a matter of how much money you want to spent. Back in the days in the eastern bloc the engineers had to do the job with the things they had around. 

[D Straney]

Very true!

Here's the other unique IC in that same module: marked T068.


This one's much simpler:


Mapping out the circuitry, we can see that it has 2x 4-input NAND gates.


The behavior of the multi-emitter input transistors, and the output stages, is identical to the circuitry in the T076 I described in the previous post.

[tggzzz]

Hijacking the thread to include thick film hybrids, Burr-Brown once produced a calendar with the images shown at https://entertaininghacks.wordpress.com/2015/07/07/images-of-late-70s-burr-brown-thick-film-hybrid-ics/

Since it was a "coo-ee look at the pretty pictures" exercise, they didn't bother to give any information about the devices

[Noopy]

Here's the other unique IC in that same module: marked T068.

In the lower area the surface looks really ugly! 

[D Straney]

Yes! Meant to point that out, it looks like something went wrong with the process there?

Hijacking the thread to include thick film hybrids, Burr-Brown once produced a calendar with the images shown at https://entertaininghacks.wordpress.com/2015/07/07/images-of-late-70s-burr-brown-thick-film-hybrid-ics/

Yeah those are great,  stumbled on that a few years back and that's part of what started me eventually on opening up hybrids to look at the insides.  Wish there were part numbers.

[Noopy]

Yes! Meant to point that out, it looks like something went wrong with the process there?

Perhaps there went something wrong. But it´s also possible that the process just was this bad. 

[Noopy]

The SN74121S contains a monoflop. It is one more flat package suspended in a Mech-Pak carrier. 




In addition to the SN74121, there is also a SN74L121, in which the integrated charging resistor has twice the resistance. This resistor can be used to set the duration of the output pulses.




The edge length of the die is 1,3 mm x 1,5 mm. Extensive auxiliary structures are integrated in the corners, which make it possible to monitor the alignment of the masks and the quality of the process steps.




At the upper edge you can find the charging resistor, which has twice the resistance value in the SN74L121. The loop is obviously extended for this purpose. The gray n-doped area offers corresponding free space. The variation in resistor length is unusual. Usually a large resistor with a center tap is created and two different masks are used for the metal layer.


https://www.richis-lab.de/logic47.htm

 

[Noopy]

Hm, I'm not sure about how they changed the resistor value. Some of the other specifications are different for the L variant too. Someone had the theory that they changed the doping levels. 
I will have to clarify this... Unfortunately these old logic parts are hard to get...

[AnalogTodd]

Hm, I'm not sure about how they changed the resistor value. Some of the other specifications are different for the L variant too. Someone had the theory that they changed the doping levels. 
I will have to clarify this... Unfortunately these old logic parts are hard to get...

I wouldn't think doping levels would be changed considering this looks to be the old seven-layer bipolar process. Changing the doping would make huge differences in transistor performance, breakdown voltages, etc. and isn't something that would be easy to do.

I see a number of places where resistor sizes can be adjusted. Considering that this would be swapping one mask for a different one, it would be the same as having a different metal mask. Just a different point in the process where you change masks.

[Noopy]

I´m skepticle too. It would be very odd to change the doping of a process to get twice the resistance of the base layer. Nevertheless the other values are different too. That´s also strange. I will get a 54L121 soon. I hope it´s the same revision.

[Noopy]

The RCA CD4035 contains a four-stage shift register. This is the CD4035BK variant. Shift registers with the index B offer a voltage resistance of 20V, while the index A only allows 15V. The index K stands for the so-called flat package.

The component was put in a very special transport package. A note is printed on the package indicating that this is a MOS component that can be damaged very quickly by electrical discharges. Two cutouts allow a view of the top and bottom of the CD4035.






The transport package is made of cardboard. A plastic clip ensures that the IC does not get lost. The inside of the transport package is lined with aluminum foil. All pins are short-circuited, which prevents the build up of problematic voltages.




The datasheet contains a block diagram of the CD4035. The four shift registers can be written to and read from serially and in parallel.




The dimensions of the die are 2,3 mm x 2,2 mm. The numbers 10165 on the upper edge could be an internal project designation. There are also various auxiliary and test structures on the edges.

This image is also available in a higher resolution: https://www.richis-lab.de/images/logic/62x06XL.jpg (7MB)




The datasheet contains an image of the metal layer. This image corresponds to the structures on the die.


https://www.richis-lab.de/logic48.htm

 

[PCB.Wiz]

These are cool.
Have you ever done any of the 4046 series ?
eg  HEF4046 / CD4046 / 74HC4046 / 74LV4046 and side variants now less common/eol like 74HC7046, 74HC9046

[Noopy]

Thanks!
Sorry, up to now I don´t have a 4046 in the queue. But I can keep my eyes open... 

[UnijunctionTransistor]

Is it only me, or are the SSI and MSI devices far more beautiful to look at than LSI or VLSI ones?

At least for me, the feature size in SSI and to some extent MSI, are large enough to be easily distinguishable in an image that displays the complete die.

For VLSI, an image that displays the complete die, one can only distinguish different-colored areas and patterns. Not the intricate and beautiful artwork of the components and interconnections themselves.

[Noopy]

I totally agree with you.

There is also a "photographic problem" with these huge, highly integrated circuits. I know people taking technically perfect pictures with the maximum possible details. Unfortunately these pictures are huge. It's no fun to trace lines (if it is even possible) and it's often hard to even open and modify the pictures.

[Noopy]

We have talked about the SN74121S. Now let´s take a look into a SN54L121. We have focused on the bigger charching resistor of the L variant but we have to clarify: The L indicates that this is the “low power” version. It is slightly slower, but also offers significantly lower power consumption. Texas Instruments specifies a reduction by a factor of 10 for a single gate.




The die largely corresponds to the die in the SN74121S. It appears to be merely a different revision. The number sequence 121 is shown in the metal layer. The numbers 21 are integrated in the base mask. Only the geometry of one transistor has been minimally changed. All other functional structures are identical to those of the SN74121S. The load resistor in the L variant is also geometrically the same size. This means that at least the doping of the base layer differs significantly between the two variants. Apparently, Texas Instruments only had to adjust the process parameters during manufacturing to produce the low-power variants.




The metal layer is damaged at one point. Since the electrical connection is still intact, the component was most likely still functional. However, such a defect can lead to failure in extreme conditions or over longer periods of operation.


https://www.richis-lab.de/logic49.htm

 

[Noopy]

The U106, produced in the "Funkwerk Erfurt", contains four NOR gates, each with two inputs. The circuit is based on p-channel MOSFETs. It is similar to the MEM1013 from General Instruments. This U106 was produced in the second quarter of 1979. The Romanian semiconductor manufacturer Microelectronica produced these NOR gates under the designation MMP106.




According to General Instruments, the so-called MTOS process was used for the MEM1013 family. In the March 1967 issue of Electronic Design magazine, General Instruments describes this MTOS process in more detail. Usually, a silicon oxide that is as thin as possible is applied under the gate electrode of a MOSFET. This ensures that the gate potential has the greatest possible influence on the conductive channel below it. However, as shown on the left, even small disturbances can lead to short circuits. General Instruments advertises that, as part of the MTOS process, it uses a gate oxide that is just as thick as the so-called field oxide found on the remaining surfaces of the semiconductor. This enables them to achieve a higher yield and offer lower unit prices. It seems that it has been accepted that this measure impairs the electrical properties of the transistors.




In 1971, the Funkwerk Erfurt presented the first MOS circuits based on the MEM1000 series at the Leipzig Spring Fair. These included the U101 with two full adders, the U102 with two NOR gates, the U103 with two RS flip-flops, the U104 with antivalence equivalence gates, and the U105 with six simple switches. Other variants such as the U106 followed later.




When you open the package, you can see that the die has been additionally protected with a soft potting.




The dimensions of the die are 1,3mm x 1,4mm. No passivation layer was applied. Therefore, scratches occur in the metal layer when the potting material is removed.




On closer inspection, it can be seen that the more common MOS transistors with a thin gate oxide have been integrated. Corresponding frames are visible in the surface structure of the electrodes. Consequently, only the circuitry of the MEM1013 has been replicated, but not the MTOS technology.

Two test structures have been set up on one edge. The one on the left is a MOSFET. The one on the right is missing the frame in the area of the gate electrode. This made it possible to check the influence of the metal layer in places where no transistor is to be formed and where a conductor bridges two p-doped areas solely for the purpose of potential conduction.

Above the test structure, the revisions of four masks are shown, which have apparently been revised several times. Below, the squares allow the alignment of the masks with each other to be evaluated.




Like the MEM1013, the U106 operates with two supply voltages. A voltage of -27V must be applied between U1 and ground. The chip expects a voltage of -13V between U2 and ground. The second ground potential in the upper right corner does not match the distribution of potentials on the pins of the package. There, the second ground potential is located between e41 and e32. It could be that the bondpad in the upper right corner is connected to the metal grid under the die and that the pin between e41 and e32 also contacts this metal grid.




Protective structures are located between the supply potentials and the ground potential, which appear to represent only a certain capacity (red). Capacities have also been integrated at the inputs (yellow). The p-doped lines, together with the substrate, also act as a protective diode against excessive voltages.








At first glance, the structures appear confusing, but the circuit is actually relatively simple. The two inputs each lead to two MOSFETs (M5/M6 and M1/M2), which can switch the ground potential. One of the MOSFETs (M5 and M1) leads directly to the output, so that a low level at one of the inputs directly generates a high level at the output.

Transistor M4 generates a low level at the output as long as none of the input transistors M6/M2 is active and raises its gate to ground potential. This part of the circuit therefore ensures that the output is low as long as both inputs are high. M3 acts as a pull-down resistor. It requires the lower supply potential U1 to be able to switch M4 on cleanly.


https://www.richis-lab.de/logic50.htm

 

[Noopy]

The U102 shown here bears the abbreviation ND, meaning it was manufactured in the fourth quarter of 1981. The U102 contains two NOR gates, each with three inputs. As described in the context of the U106, these p-MOS logic devices are based on the MEM1000 series from General Instruments. The U102 corresponds to the MEM1002.






The edge length of the die is 1,1 mm. It appears that the process and design specifications have been revised. While the U106 did not yet have a passivation layer, the passivation layer can be seen here through the cutouts at the bondpads. Another indication is the robustness of the metal layer. In the U106, these are heavily scratched. There is no damage visible on the U102. The mask revisions have been moved to the scribe line, so no additional silicon area is required for this. The masks have been revised up to four times.




A test structure is integrated on both the right and left edges. As with the U106, one of these is a MOSFET. This MOSFET can be seen here. The left structure also consists of two p-doped areas, between which a gate electrode is applied. However, the gate electrode is not located on a thin gate oxide, but on a thick field oxide. In this design, the influence of the potential on the structures in the silicon should be as low as possible.








The structures of the U102 are somewhat denser and therefore also somewhat less transparent than the structures of the U106. The protective structures at the inputs and between the supply potentials are the same. The circuitry of the U102 is very similar to that of the U106. However, an additional supply potential has been omitted here. Apparently, transistor M3 can sufficiently control transistor M4 even without this potential. The dynamic characteristics of the two components differ only minimally.


https://www.richis-lab.de/logic51.htm

 

[iMo]

A "condensed catalogue" of the MTOS devices (1967, 9.8MB pdf):

http://www.bitsavers.org/components/gi/_dataBooks/GI_MTOS_Circuit_Digest_1967.pdf

Any idea where these chips were used??
OK AI told me (not much findings, indeed):

#1: NASA/space-instrument electronics (1969)
A NASA instrument “commutator driver” used two General Instrument MEM-3012-SP shift-register ICs cascaded to generate timing for a 20-switch commutator (explicitly named in the hardware description).
NASA Technical Reports Server

#2: Another NASA circuit report (1969)
A separate NASA technical report specifies the shift register as a General Instrument MEM-3012-SP MOS I.C., used in timing/logic for sampling (“microsecond sample window pulses”).
NASA Technical Reports Server

#3: Photographic flash system with automatic light cutoff (U.S. patent)
The patent text names GI MEM-3012-SP as the register and GI MEM-2009 as the multiplexer in the reference implementation of the flash control logic.
Google Patents

[D Straney]

Any idea where these chips were used??

If you're looking for the whole General Instrument series, I recently found some MEM2009 analog muxes inside a telemetry encoder.

[Noopy]

I have to correct myself:
With this MTOS technology General Instruments kept the gate oxide as thin as you have it with “normal” MOS transistors. They only made the oxide over undercuts thicker!

I wonder if that really made a noticeable difference...

[Noopy]

Here you can see the circuit board of the Robotron A5105 educational computer developed in the GDR. On the left is the processor, in this case a Z80. In the GDR, they had developed their own variant of the Z80, the U880. The two UV-EPROM which are usually below the Z80 are missing. In the lower part of the PCB two square packages catch the eye. These are two ASICs based on the U1520 standard cell design system. The U1525FC007 (https://www.richis-lab.de/logic27.htm) has already been documented in detail. The second component is designated U1525FC008. This is the VIS, the video interface circuit. The free socket on the right normally houses the graphics processor. In the GDR, the U82720 (https://www.richis-lab.de/GraKa04.htm), a replica of the µPD7720 (https://www.richis-lab.de/GraKa02.htm), was used for this purpose. The U1525FC008 works closely with this graphics processor. While the graphics processor performs more complex calculations, for example to generate circles, the VIS takes care of more basic image output functions.




Let's take a closer look at the U1525FC008, the video interface circuit. X9 indicates that it was manufactured in September 1989.




The repair manual for the Robotron A5105 contains a block diagram that provides insight into the functions of the U1525FC008.




The U1525FC008 is based on the standard cell design system U1520. More detailed information about this system and details of the circuit components can be found in the analysis of the U1525FC007 (https://www.richis-lab.de/logic27.htm).

This image is also available in a higher resolution: https://www.richis-lab.de/images/logic/66x04XL.jpg (95MB)




There are three interesting artifacts on the die, two of which can be seen in this section. The most obvious is a relatively long line that at first glance resembles a hair or fiber. There is also a spot just before the interface at the upper edge.




The spot is located in the polysilicon layer. It is a large round area of polysilicon. The clean edges suggest that the mask was defective at this point. Since there are no other structures in this area of the polysilicon layer, the artifact has no effect on functionality.






The “line” is apparently located below the functional structures in the substrate.




Here, it is helpful to look at a single image without the usual focus stacking. It can be seen that the left-hand area is noticeably deeper than the right-hand area. While the metal layer is sharply focused on the left, the polysilicon layer beneath the metal layer is in focus on the right. For the UMPlanFl 50x 0.80 BD objective used for this picture the depth of field is specified as 1,3 µm. The edge must therefore be higher than 1 µm.

The U1525FC008 attracted attention because, among other things, the cursor was only displayed sporadically. This could be related to this artifact. The so-called cursor input A17 leads directly to the narrow inverter, whose input is located above the edge. According to the depth of field, the edge is highest in this area. The metal layer covers the polysilicon strip. It seems likely that the electrical connection is borderline.




A little bit lower on the die is a third artifact.




This disturbance looks different from the previous one. However, it is also an edge. The difference in height is less pronounced, though.


https://www.richis-lab.de/logic52.htm