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Repair / Re: Tektronix SC502 Alt and Chop mode fault
« Last post by BlownUpCapacitor on Today at 04:43:43 am »Update: It's fixed! Q350 was the issue the whole time! Replaced it with 2N3904 and it works perfectly now!
I don't know what the market looks like in Australia, but I have been watching various sites here in the US in hopes of finding a deal on a used Siglent SDS1104XE or Rigol1054DZ. So far, the only things I'm finding are people offering them, used, for prices HIGHER than what I can get them brand new from Amazon.
Got ours today.If the price is right then a used SDS1104XE in good condition would still be worth serious consideration particularly for somebody on a budget. If the OP is not in a desperate rush for a scope then this would be my recommendation, cheaper than new and far superior to what they are currently considering.
I just saw someone buy a second hand SDS1104XE for 540 bucks+postage on aus ebay, so prices are not going down that much. New one is still close to 700 on AppVision. I think the scope market is just too slow in Australia and some people don't know about 800X series. We are still yet to see 800Xs here. Everybody else has them for sale but not Australia (and our friends across the ditch). Perhaps wait until the end of financial year to get better deals.
If the price is right then a used SDS1104XE in good condition would still be worth serious consideration particularly for somebody on a budget. If the OP is not in a desperate rush for a scope then this would be my recommendation, cheaper than new and far superior to what they are currently considering.
Looking at the zynq 7015 pinouts along with the board layout gives some clues to the DDR SDRAM usage.
The DDR3L chip on the DHO800 is connected up to bank 13 (yellow), this will be a DDR memory controller implemented in the FPGA fabric. The gigadevice GDP2BFLM-CA is a 16-bit wide, 2133MT/s device, if clocked at it's rated frequency, that gives 34Gb/s theoretical memory bandwidth.
It looks like bank 35 (magenta) is being used for the ADC interface, 1.25Gsps @ 12-bit is 15Gb/s. Considering the memory is 16-bit wide, and there are also 16 logic analyser inputs, they could just be storing 12-bit samples as 16-bit instead of repacking, bringing the ADC sample bandwidth up to 20Gb/s.
I'm assuming that bank 34 is mostly being used for the differential LA inputs, as well as any other GPIOs/controls (based on some visible single ended signals on the top layer here too).
Bank 112 (blue) are the GTP tranceivers implementing the PCIe device on the RK3399.
The DHO800 unpopulated memory devices (orange) are specifically for the PS / ARM SoC part of the zynq chip. In most zynq applications, this memory would be the system memory for embedded linux running on the PS. In these situations, any high bandwidth data needs to pass from the FPGA fabric (PL) to the PS via some dedicated AXI buses inside the zynq, and then handled by the PS memory controller, on a separate clock domain. While they technically have the bandwidth (4x buses of 8-16GB/s, depending on clocks), it's likely that just having a synchronous memory device directly on the FPGA fabric is much more suitable for continuously streaming data from an ADC.
It's not clear to me what the PS is being used for in this zynq. Clearly it's not running embedded linux, since the RK3399 is running the host OS, and there's no system memory on the DHO800 series. It could be running some RTOS doing measurements, stats or monitoring (with the limited 256KB of on-chip memory available to it), but I really have no idea.