After also pondering about this subject on (already built) RF linear amp using T0267, last night I added the drain lead and pcb track to the 2D heatsink model.
Quickfield 2D model was adjusted as follows:
The 100mm long original heatsink model was shortened to a slice exactly 3mm long (into page) to match the drain leg width .
The addedd pcb substrate is 1.6mm thick. Track is 1 Ounce ( 0.35mm thick)
The DC conduction model was coupled to provide track heating. Due to dimensions of the pcb track and the MosFet drain leadout, this should be accurate enough up to about 3 MHz.
It became apparent the the DC current flowing in the 3mm wide pcb track would need to be increased above the actual drain current, in order to visualize track heating contribution. So DC current along track into drain is 11 Amp. Also the track was lengthened to enable visualization of the temperature along the track, away from the TO267.
All surfaces in the model are cooled by Convection: 20 W/m^2.K, Radiation E=0.5, to 30C
Not knowing the thermal resistance from Silicon to the drain lead, I solidly joined them.
The silicon heat generated in the TO267 is sufficient to cause the heatsink temperature to be 47C. That is heatsink operating temp in the cabinet which has ambient of about 30C. The case temperature is then 60C which is near to thermocouple measurement.
Here is a section of the transient thermal results at T=2400 second:
https://app.box.com/s/wvhkshkswyijiiy7v3h8c4ra6fn59m70Here is a close-up of the power loss in the track and the soldered drain leadout due to the 10Amp DC only
https://app.box.com/s/6f6bb2d5fdzjs8bwipz8gxpxotgqvr3cConclusion for this model: The junction heat generated in the TO267 is swamping the heating of 10 Amp flowing in the 3 by 0.035 mm pcb track.
Note the direction of the heat flux arrows.
If there is any data for the typical thermal resistance between drain pin and junction, I could re-run model using that.
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