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Test Equipment / Re: Choosing between entry-level 12-bit DSOs
« Last post by gf on Today at 08:54:25 am »
The frequency range of interest for the interpolation test is about 40%...49% of the sample rate (and the way it looks, 30%...49% for the Rigol).

There is no need to sweep. Covering this range with 5 or 10 steps is certainly sufficient. Better try to get a stable view at each frequency. If you get AM, but can't get a stable trigger on the AM envelope, then better capture a single shot at each frequency step.

The timebase should not be faster than about 10/sample_rate (e.g. 5ns/div for 2GSa/s) in order that at least 1 or 2 periods of the AM envelope fit into the screen widht when the signal frequency is 49% of the sample rate. At lower signal frequencies, the envelope period will be shorter.
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Not much I think, that is still simple enough to have sort-of-uncommitted error amps, perhaps the UC(C) relatives -- but they're not exactly much newer, and are legacy priced.  (At least cost doesn't matter for a "one off".)  UC3525 does go much faster (500kHz osc).

Can always make one yourself, it's nothing more than a couple op-amps, comparators, current mirrors, and logic.  An embedded version might even be feasible, if you feel confident enough to chance the survival of a 20kW inverter upon the reliability of software... :)

(I've written an embedded 1kW resonant control, myself; I'm fairly meh on its overall quality: it seems to work, it's not the smoothest (i.e. low noise, at least in part due to quantization but also probably sampling dither), but I don't exactly have any way to prove its correctness, or [begin to] fuzz its immunity to other software glitches or input errors.)

Tim
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Example on my old website, https://www.seventransistorlabs.com/tmoranwms/Elec_Magnetics.html which, the magnetic theory part I think is still fine, if a bit out of style for me these days, and I do have better and more diverse inductor and transformer design methods today (but, also which aren't worth going into detail on such a page).


Thanks, saved the page as a reference, always nice to have something to assist with memory.
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This thread is useless without measurements :)

You don't need to use an SMPS (and definitely shouldn't) to do that testing.  A signal generator, capacitor, resistor and oscilloscope do a fine job.  A pulse tester can also be built, usually using a signal generator (or in a pinch, a 555 timer), MOSFET, diode, capacitors, shunt resistor, and power supply.  Example on my old website, https://www.seventransistorlabs.com/tmoranwms/Elec_Magnetics.html which, the magnetic theory part I think is still fine, if a bit out of style for me these days, and I do have better and more diverse inductor and transformer design methods today (but, also which aren't worth going into detail on such a page).

After fractures (which can be glued back together with superglue or epoxy, with care), probably burrs and varnish are the next most common fault.  Use a knife to scrape off the excess, and use a very flat sharpening stone or lap to grind the core faces flat.  If you find only the outer limbs are grinding, congratulations -- you have an air-gapped core, and the inductivity (A_L) will be low; this is suitable for flyback converters and inductors, and unsuitable for forward converters and CMCs.

Occasionally you'll see an E-core (or other shapes) that is definitely not air-gapped, and yet doesn't have a high A_L; I haven't seen these very often (and, I seem to have lost the one example that I had found..!), but, these shapes are occasionally made in powdered-iron and related materials, with lower permeability, so can be used ungapped just as any powder toroid.

As for leakage, or coupling coefficient, note this also depends upon the relative positioning of windings.  The core is not an ideal magnetic path (and even if it were, it wouldn't actually matter--), and there are plenty of flux paths outside of it, literally leaking around; wires hanging around anywhere in the space around the core, can pick up varying amounts of those paths.  You maximize coupling when the windings are, as much as possible, in the same place: adjacent layers, twisted pair or bifilar, alternating layers or strands in parallel, etc.

Tim
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Well, I look forward to any follow up info you might provide. :)
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PCB/EDA/CAD / Re: High current traces meeting small component legs
« Last post by T3sl4co1l on Today at 08:27:37 am »
Nope!  Get out the thermal simulator, or the IRL equivalent (build and test it).

On the upside, the lateral heat spreading ability of, say, 2oz x 2 layer FR-4 is about an inch or two, so, anything within that area (if it's not stupendously intense) will tend to spread heat out into that area (i.e. a circle a couple inches across), and the power dissipated in those local areas merely contributes to overall temp rise, with a modest local rise depending on how well heat is sunk away from the heat-generating area in the first place.

You can do basic approximations of, what if we have this much current in this rectangular segment of copper, which makes this power, which flows through that segment, and etc. etc.  Neither heat nor current flow in uniform directions, so the value of such approximations is quite limited, but you can still hand-wave a basic guess like to say the local area isn't going to be more than x°C above the nearby area, and that the nearby area is ballpark y°C higher due to that current flow, etc..

Tim
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Thank you @moffy. I'm just a random person that has many science related hobbies. Sometimes I earn my money from performing electronic repairs, but I've still got no oscilloscope, func. gen., or LCR meter. Not because I don't want them, but because I wouldn't really use them for now.
Maybe it's time to get that dang LCR meter. Whenever I get it, I will absolutely remember to make a follow up.

For now I think the point is clear:
transformers are difficult to dissasemble

Also, I assume the cores lost permeability, because I test them with an SMPS that uses some tipycal IC: if I short ANY winding of a good transformer (considering that the primary on all of these tested transformers had an unused center tap, and the secondary was in between these primary halves; considering each primary half as a unique winding), I could at least measure some voltage pulses from other windings, from the IC's attempts to start. But with the after-heated cores, it's like the core isn't even there.  :scared:

Sorry for my rudimentary methods.  :blah:
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I wonder when we might see these in the west.....in 12bit too ?

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