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Repair / Re: SMD diode mark
« Last post by fzabkar on Today at 06:36:02 pm »
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Metrology / Re: Why don't we see more TDC based high-resolution ADCs?
« Last post by Kleinstein on Today at 06:35:05 pm »
The classical MS ADC uses a comparator, but the comparator does not have to be super fast and the time measurement not very high resolution. An important point is to compensate much of the charge already during the integration. For the final charge reading is from a reduced reference level (e.g. 1/128 the main ref. in the Keithley 2000 and similar) and this way only a moderate timing resolution needed. The noise is usually more limited by the amplifier noise, resistor noise or jitter, not the timing resolution. A reduced speed of the comparator allows for less noise BW and this way more resolution.
More timing resolution is of limited use. One may get away with a litter higher small ref. level and get a slightly faster conversion. However the difference is more marginal, not a big step up that is worth the extra effort.

In some variations (e.g. HP Multislope 3 and 4, NI flex ADC or my ADC variant) the final charge reading is not with a comparator but and auxiliary (SAR type) ADC. I can get away with rather limited time resolution (e.g. 250 ns) and still have little quantization noise (e.g. 28 bits after 20 ms). More time resolution would not really help. It is more about getting low jitter (e.g. want better 5 ps)  for the reference swiching - so accurate timing on the output side, not for the inputs.

Some of the higher resolution TDCs go the other way around. The convert the residual time steps to an analog voltage and than use an ADC to improve on the timing resolution. Directly using an auxiliary ADC for a residual charge makes more sense. Than going to an intermediate time signal and back.
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 May the saints preserve us from armchair Virologists!  ::)
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Beginners / Re: Flyback diode on a transformer primary?
« Last post by Benta on Today at 06:28:59 pm »
A snubber is a more suitable remedy
Doesn't really solve the problem, does it?

From your PDF:
· Reduce or eliminate voltage or current spikes
· Limit dI/dt or dV/dt
· Shape the load line to keep it within the safe operating area (SOA)
· Transfer power dissipation from the switch to a resistor or a useful load
· Reduce total losses due to switching
· Reduce EMI by damping voltage and current ringing

I see nothing about dissipating the energy stored in the inductor. Try again.

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Replace Q1 with a JFET or MOSFET to remove the base current error.

There is no base current error in this circuit. It is a classic configuration of a current source, used at least in two units on my bench - Keithley 263 and HP3245A.

Ah, you are right of course.  This is the circuit which I commonly see in books describing voltage and current references.
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About the sick coughing guy at work....
Yea he probably did have something and transmitted it to everyone. I believe you.  Very Likely.
He should have stayed HOME.   
We don't know if it was COVID or something else like Flu.   Irrelevant.

However, even though we do  all these things to avoid transmission of a virus, while they might make sense and might work for a while   
do not ultimately prevent the spread of the virus.  I guess the virus is more dedicated or smarter than us.
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Beginners / Re: 5V buck converter debugging
« Last post by __steven on Today at 06:21:52 pm »
I was going to suggest bringing it up. Seems like the issue persists.

What gets hot by the way?

Would you be comfortable sending a picture of the board?

If you are absolutely sure you do not have any dead or higher impedance shorts on the board, the only item I can think of is the inductor saturating during startup. The one that is outlined in the schematic should be fine, 5.5A saturation current, where the high side switch current limit is 10.3A typical.

I am afraid this may be all I can offer.
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Banned here but still active on Ebay  IE:  sqwarrel




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Hello folks.
Looking for some bright ideas for the following problem. 

Large DC motor rated up to 20 Amp 100V can have two potential dangerous situations:
1. Motor can be suddenly detached from the load (torn belt)
2. Driving board - it's FET transistor with PWM control may have potential failure.  FET has become shorted and all the power can go to FET.     

Looking at some solution  - fast one, that will shut the motor down pretty much instant.  Current control is not really works as current is dropping if load is gone. Speed control with microcontroller comes to mind first , but it may take computational time and so on...

Any suggesitons?  Thanks. 
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Metrology / Re: Why don't we see more TDC based high-resolution ADCs?
« Last post by David Hess on Today at 06:18:16 pm »
Stupid question but since it's easy to get an extremely stable clock source -- 0.05 ppm is like $50 retail -- and measuring long time intervals precisely is relatively easy (seconds to sub-nanosecond precision) why use a complicated multi slope ADC when bolting the voltage to time converter to a TDC gets you most of the way there? What am I missing here? Comparator noise?

National application note AN-260 describes a high resolution high accuracy single-slope converter.

Single-slope converters can have excellent accuracy and resolution but their variable input ramp time has no 50/60 Hz rejection, leading to errors.  Dual-slope and similar converters use a constant integration time which is a multiple of the full power line cycle, creating a null at the power line frequency and its harmonics.
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