BTW: The newest RigolTool version I have is 1.0.2 if you need it.yes i need it, can you provide the link..? thankshttps://www.eevblog.com/forum/testgear/hacking-the-rigol-dho800900-scope/msg5077957/#msg5077957
this is assuming it is correct infos there (about the gpl license, and it being intree). that this is not been honestly mistaken. and it assumes rigol respects the terms of the linux kernel, and the terms of the gpl license?
Correct. And I would say they will send you the code.
They sent all the GPL code for the MSO5000 to @Olliver. And he has it on his Github page...
How do you think, do users of these DHO really need to look at two zeroes after decimal point for vertical scale ranges in V/ (in channel tabs)? Maybe, respected AndyBig will remove them in his modded Sparrow.apk (as he did it for added by him divider ratios) if he'd like?Are you talking about these values that are yellow and white? I think numbers after the decimal point are still needed
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@antiquant I’m very glad that you liked my solution for upgrading the cooling system, it really works even better than I expected. As for testing LA, I did not check its operation due to the lack of an LA sampler (I just can’t decide on which project I will do it). Regarding bringing the HW version into line with the 900 model (HW V , some time ago I did some work to select the location of the configuration resistors on the back side of the board, but unfortunately I could not find the combination I needed, I attach a photo of the options I tested. in the left column is a combination, in the right column is the HW version shown in the scope shell. I have to wait until someone shows me a photo of the back of the 900 series board.....
BTW: The newest RigolTool version I have is 1.0.2 if you need it.this is the one i'm running and quit disgracefully. i will try to pm him thanks. i just forgot who made it.
Im curious if its possible to switch into 9 - for DHO1000, maybe 2G samples per second will be possible?
Maybe Im little dumb, but I cant find it on Github, Gitlab and nowhere else. Anybody has a link or know where I should look?
Im curious if its possible to switch into 9 - for DHO1000, maybe 2G samples per second will be possible?No, It is Immpossible. In 1000 there is really different hardware - another FPGA with different firmware and with other, more powerful capabilities.
I know its completely different FPGA, but of course I will not change binaries, just change it to app and Rigol kernel modules can see different "hardware number". Maybe it will change sample frequency in FPGA or maybe not. Is there any reason that I shouldnt try?
I know its completely different FPGA, but of course I will not change binaries, just change it to app and Rigol kernel modules can see different "hardware number". Maybe it will change sample frequency in FPGA or maybe not. Is there any reason that I shouldnt try?It's the same as putting an ECU from a Ferrari racing engine into an ordinary Ford engine and hoping that the Ford will make the same power as the Ferrari. But as a result, most likely Ford will not be able to drive at all
If you want, try it, of course. But personally, I will consider it a miracle if something working comes out of this
Whoever will be taking apart their scope next, including the removal of the heat sink, please measure the size and thickness of the thermal pads. I have a crazy idea of trying those "phase change thermal pads", but need to know what size to order, and I don't want to take the scope apart again, given that someone here will surely do it sooner or later .
The sample rate on the DHO900 is halved when using the digital channels. That suggests the limit is in the FPGA throughput, one way or the other, or the bus is somewhat limited by hardware. It doesn't hurt to try though
What does the app do with those bits? In what form are they related to model and/or options?so easy, it is the hardware version:
model hardware version
DHO804 and DHO814 12
DHO802 DHO812 4
DHO914S DHO924S DHO914 DHO924 8
DHO1072 9
DHO4000 0Can't you change the table in software? Is the version configured in the OTP SOC area or in a Rigol ASIC?The RK3399 chip corresponds to the GPIO in the hardware version number:
bit0= GPIO0_A4 PIN 4
bit1= GPIO0_B0 PIN 8
bit2= GPIO0_B3 PIN 11
bit3= GPIO0_B4 PIN 12
I don't have a cross-compilation environment for RK3399 here, if anyone can compile a hdcode_gpio.ko by themselves to replace the original factory, you can achieve hardware version number customization.
I hope this works.
Whoever will be taking apart their scope next, including the removal of the heat sink, please measure the size and thickness of the thermal pads. I have a crazy idea of trying those "phase change thermal pads", but need to know what size to order, and I don't want to take the scope apart again, given that someone here will surely do it sooner or later .
@shapirus, Maybe you already got what you needed, but here are the measurements in case anyone else needs, notated on the picture. Oh, I forgot to label; 1mm thickness.
(Attachment Link)
digging this thread... in an attempt to search HW difference between 8 and 12... attached are the back side of RK3399 and Zynq FPGA of my DHO804, just in case some DHO900 owners is kind enough to spot the differences. maybe the config resistor is there? its difficult to tell if there is no DHO900 pictures for comparison. cheers.
Regarding bringing the HW version into line with the 900 model (HW V , some time ago I did some work to select the location of the configuration resistors on the back side of the board, but unfortunately I could not find the combination I needed, I attach a photo of the options I tested. in the left column is a combination, in the right column is the HW version shown in the scope shell. I have to wait until someone shows me a photo of the back of the 900 series board.....
You probably never heard about impossible things done by people in Poland.
Swaping racing engines into very cheap, very small and very old cars are done here pretty often...
Seems that you and S2084 are working similar paths. From earlier today. Check out the full size pic.
BTW: here are internal pix from early days 924S teardown by hubertyoung
Check out the full size pic.
Regarding bringing the HW version into line with the 900 model (HW V , some time ago I did some work to select the location of the configuration resistors on the back side of the board, but unfortunately I could not find the combination I needed, I attach a photo of the options I tested. in the left column is a combination, in the right column is the HW version shown in the scope shell. I have to wait until someone shows me a photo of the back of the 900 series board.....
[pid 1885] futex(0x71563a45d8, FUTEX_WAKE_PRIVATE, 1 <unfinished ...>
[pid 1894] write(62, "\1\0\0\0\0\0\0\0", 8 <unfinished ...>
[pid 1900] <... nanosleep resumed> NULL) = 0
[pid 1894] <... write resumed> ) = 8
[pid 1900] futex(0x7137472df8, FUTEX_WAIT_BITSET_PRIVATE, 2, NULL, ffffffff <unfinished ...>
[pid 1885] <... futex resumed> ) = 1
[pid 1894] ppoll([{fd=56, events=POLLIN}, {fd=62, events=POLLIN}, {fd=63, events=POLLIN}, {fd=64, events=POLLIN}], 4, NULL, NULL, 0 <unfinished ...>
[pid 1852] nanosleep({0, 35000000}, <unfinished ...>
[pid 1894] <... ppoll resumed> ) = 1 ([{fd=62, revents=POLLIN}])
[pid 1851] openat(AT_FDCWD, "/dev/hdcode_gpio", O_RDWR|O_NONBLOCK <unfinished ...>
[pid 1894] read(62, <unfinished ...>
[pid 1850] <... pselect6 resumed> ) = 0 (Timeout)
[pid 1894] <... read resumed> "\f\0\0\0\0\0\0\0", 8) = 8
[pid 1849] <... nanosleep resumed> NULL) = 0
[pid 1848] <... nanosleep resumed> NULL) = 0
[pid 1894] futex(0x70ac1c7830, FUTEX_WAKE_PRIVATE, 2147483647 <unfinished ...>
Ehhh people - always doing simple things with time consuming methods. I never removed heatsink and never soldered anything inside, but I managed to change "Hardware number" with very simple methods. Learn more and be lazy - thats the key.
(Attachment Link)
(Attachment Link)
(Attachment Link)Code: [Select][pid 1885] futex(0x71563a45d8, FUTEX_WAKE_PRIVATE, 1 <unfinished ...>
[pid 1894] write(62, "\1\0\0\0\0\0\0\0", 8 <unfinished ...>
[pid 1900] <... nanosleep resumed> NULL) = 0
[pid 1894] <... write resumed> ) = 8
[pid 1900] futex(0x7137472df8, FUTEX_WAIT_BITSET_PRIVATE, 2, NULL, ffffffff <unfinished ...>
[pid 1885] <... futex resumed> ) = 1
[pid 1894] ppoll([{fd=56, events=POLLIN}, {fd=62, events=POLLIN}, {fd=63, events=POLLIN}, {fd=64, events=POLLIN}], 4, NULL, NULL, 0 <unfinished ...>
[pid 1852] nanosleep({0, 35000000}, <unfinished ...>
[pid 1894] <... ppoll resumed> ) = 1 ([{fd=62, revents=POLLIN}])
[pid 1851] openat(AT_FDCWD, "/dev/hdcode_gpio", O_RDWR|O_NONBLOCK <unfinished ...>
[pid 1894] read(62, <unfinished ...>
[pid 1850] <... pselect6 resumed> ) = 0 (Timeout)
[pid 1894] <... read resumed> "\f\0\0\0\0\0\0\0", 8) = 8
[pid 1849] <... nanosleep resumed> NULL) = 0
[pid 1848] <... nanosleep resumed> NULL) = 0
[pid 1894] futex(0x70ac1c7830, FUTEX_WAKE_PRIVATE, 2147483647 <unfinished ...>
if you are a little bit more clearer with those cryptic lines... then we might be capable of replicating... not everybody can speak your language cheers.
[pid 1851] openat(AT_FDCWD, "/dev/hdcode_gpio", O_RDWR|O_NONBLOCK <unfinished ...>
rk3399_rigol:/ $ ls -l /dev/hdcode_gpio
crwxrwxrwx 1 root root 10, 45 2013-01-18 16:50 /dev/hdcode_gpio
rk3399_rigol:/ $ cat /dev/hdcode_gpio
echo -n "9" > /dev/hdcode_gpio
rk3399_rigol:/ # echo -en "\t" > /dev/hdcode_gpio
rk3399_rigol:/ # cat /dev/hdcode_gpio
rk3399_rigol:/ #
i dont quite understand on which part it is located... is it in the red circle below? (there is no HW ver 8 in his photo)