FPGA

(Newbie) Xilinx JTAG - Ebay Clone

Used Bittware board

FPGA + FT232H

Looking for docs for Pico E-102 board.

Free softcores usage: XILINX x ALTERA

Altera A-C2FB kit ( board documentation )

Can you use a uC's DACs for (low-power) FPGA power-supply sequencing?

Altera configuration Flash - crazy prices - alternatives?

FS: FPGA dev kit: Altera Nios II Embedded Evaluation Kit, Cyclone III Edition

generating arbitrary waveforms with zynq 7000 series

A3PN060 & Libero IDE

How to design UART peripherals IP?

A FPGA Audio System in raspberrypi size and open source later.

SoC as alternative to STM32H7

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For Sale (UK): Xilinx Platform Cable USB II

Resources for learning the FPGA implementation process in detail

Altera's shenanigans with a state machine, or me failing at verilog?

Xilinx finally updated ISE for windows 10

Xilinx ISE 14.7 to support windows 10 by the end of the year (time machine...)

AMD/Xilinx announced Spartan UltraScale+ family

AMD/Xilinx announced their own RISC-V soft-core

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Xilinx Video Series

Intel/Altera - DDR3 megafunction fails in Quartus 20.1.1

Custom Spartan-7 FPGA board for beginners

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SD card/SDIO 3.0 level translation solution

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Cheaper Zynq Ultrascale+ and new Artix Ultrascale+ devices announced!

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Microblaze 64 bit

Xilinx is now available at Mouser!

Vivado/Vitis 2020.2 is out

Custom JTAG debugger for Xilinx FPGAs based on FT22x chips

New FPGAs from Renesas

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MachXO2 FIFO_DC - are clocks really independent?

GOWIN FPGA. Packages removed from documentation. Why?

Most efficient way of going through a std_logic_vector

Need some video Lecture to understand OOPS with System verilog

FS: Nios II Embedded Evaluation Kit, Cyclone III Edition - Altera

vhdl - how to use memory bits for data storage?

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Looking for resources, FIR filter design / coding

VERILOG: Equality test with don't cares

QUARTUS-II/Verilog: Unexpected warnings implementing simple subclock