This is a lot of work, and I had a lot of distraction today (my boss/colleagues/clients kept bothering me)
Attached the XLS with -10~+10 hard range and both High-Z and 50 Ohm.
A few notes:
- At 50 Ohm above 10V, the OpAmp is just not cutting it. Rather then trying to correct this (it will not be able to anyway) this needs to be corrected by a better OpAmp and maybe 15V rails in stead of a 12V rails that is to weak as well. Or at the very least a 12V rail with more power.
- Around 10V - 60Hz there is a weird additional negative offset. It also attenuates more, but I think both are caused by the OpAmp cutting of the high crest of the sine more then the low crest of the sine.
- Likely bad sine to the right and bottom is caused by the OpAmp attenuating, toward the left by a weak DAC signal, amplified noise and DAC resolution.
To be honest, Fremen67, I will provide you with the info requested to my best ability, but I wonder if level correction should not be a lower priority. Sweep/Mod/Counter/LCD may be more rewarding features. Will work on 0.275 range next.
And for some reason it won't generate wave forms this evening Flashed the 0.3 and 0.4 and it will connect fine. But no output.
Was going to fill out Cybermaus his excel to see some diffs maybe. But it is not happening yet
Small intermediate result:
The 5.5Vpp in a hard 2.75V range gives such a perfect 6Vpp that I am wondering if you have a coding error in the software.
Also: apparently the 2.75 range is able to go up to 3V
Re: FY6600 Jitter
Insatman... Excellent results!!! Would you do a simple FM modulation test?
Set CH1 to sine wave with freq as before, 10.1398 MHz.
Set CH2 to Square wave with freq 0.25 Hz. (Don't worry about Ampl and Offset as they are not used for internal FM).
Set modulation source to FM from CH2. Use BIAS 00'000'.001'500'000KHz. This will be set modulation depth to 1.5 Hz.
Your SA FFT waterfall should show the 1.5 Hz square wave modulation of the sine wave.
I'm considering your FY6600 modifications. My smd skills are poor. Probably can make the Power Supply mods. But removing the smd oscillator seems beyond me at the moment. If I can get it removed was thinking of tack soldering wires to the new osc module and tacking these wires to PCB. Any comments?
And for some reason it won't generate wave forms this evening Flashed the 0.3 and 0.4 and it will connect fine. But no output.
Was going to fill out Cybermaus his excel to see some diffs maybe. But it is not happening yetLot of chances that it is a wiring problem. I also wasted 1 hour last week because I swapped 2 wires when switching configuration...
Which output are you referring to? Front panel output could benefit from different op-amps if really needed.
Back output won't be able to keep up with that high frequency due to a 74HC245 buffer which runs at typical 55 MHz max. so 60 is maxing it out pretty much.
Which output are you referring to? Front panel output could benefit from different op-amps if really needed.
Back output won't be able to keep up with that high frequency due to a 74HC245 buffer which runs at typical 55 MHz max. so 60 is maxing it out pretty much.I haven't read/followed the whole thread but was aware of the FY6600's existence, seems like you guys are kicking it into shape - good work
Depending on the voltage levels it needs to run at, there are several CMOS family alternatives to the 74HC245 buffer that would have much lower gate propagation times.
1. Is there a schematic available?
2. Who is the preferred vendor to buy an FY6600 from?
Not sure if it will help you but:
Hanging with the logo displayed means the STM32 CPU is not getting (correct) responses from the FPGA.
For example if you disable FPGA because you are programming Winbond, this is shown. Also some people have reported stuck logo because the cable came loose during transport.
I'm leaning in the direction of making the modifications you describe. Now feel more confident in replacing the original 50 MHz oscillator. Checked and found the TCXO Model D75J in stock at DigiKey. Thanks for all the tips.
PS: apologies if this sounds a little pedantic, not really intended, but unsure how else to bring the info.
Well, since the non-loaded output is perfect, I did not see how it could be the input of the OpAmp, but I checked anyway.
As expected, the input of the THS3002 is still a good looking sine with curves in all the right places.
Also, I ran the wave all the way down to 0.01Hz, and the shape of the flattened top stayed the same. Meaning it is not a response time thing. Not even a current thing, because if the local capacitor would drain out, surely it would fall off more toward the trailing edge.
I wonder if it is something to do with the fact this OpAmp is described in the datasheet as a "CURRENT-FEEDBACK AMPLIFIER". I do not know what that means, normally when I mess with OpAmp I consider voltages. Need to read up on that.
Also, I wonder if it can be resolve by, instead of replacing, *adding* an OpAmp.
Just leave the THS3002 in place, and add a pair of THS3001. They have the same behavior, the PCB traces are in place, de-soldering is harder then soldering.
All we need to do is add to the unpopulated footprint.
A different topic: I found a bodge and a PCB variance
If you look at the images, my V1.5 board has some missing traces which they fixed with a solder blob.
But also, even if the traces were there, it would be slightly different to DerKammi's V1.501 board.
There is also a lot of unpopulated stuff around that chip. Seems to be a place for another tuning pot.
That area is not yet traced into the schematic is it?
While I was studying your schematic, also I think I spotted an error (sorry again).
The DAC's for offset output. VoutA and VoutB seems swapped between the A channel and the B channel. Is that correct?