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1
How about an actual schematic instead of vague blurb?

This thread has been hijacked.  The original thread had no relation to this new topic and was a few years ago.
2
Beginners / Re: LC filtering for combined Vref/VDD of ADC
« Last post by MrAl on Today at 03:55:05 pm »
I am looking to use a Microchip MCP3202 ADC, but it does not have a separate Vref, only a combined Vref/VDD pin. I'll be powering it with 3.3V, but the power rail will be unavoidably noisy (around 100mV pk-pk noise), so I think it's a good idea to filter the power supply.

Because I don't want to greatly lower the impedance of the power supply then an RC filter is not suitable, right? So I'm thinking what I need is an LC filter. But still I'm a bit of a noob at all this kind of analog stuff and I don't really know what I'm doing, especially the maths.

I've been tinkering around simulating a low-pass filter that has a cut-off frequency of about 50 kHz with 10 uH inductor and 1uF cap, but it also seems to self-oscillate around that frequency, amplifying the noise greater than the input. If I add 10 ohms series resistance (i.e. turning it into RLC), it's fine. Should I be adding the DCR of the inductor as 'R' to the simulation? Most 10 uH inductors in 0805 package (what I plan to use) seem to have a DCR spec of 1.15 ohms. Or should I not be too concerned about needing to add 10 ohms, as the ADC only consumes about 550 uA worst case (according to datasheet)?

Hi,

It is difficult to predict what will happen with an LC filter like that.  Luckily with that 10 Ohm series resistor it is overdamped.  The lowest you can go on that is around 7 Ohms maybe a little less.  But if you have to use a 10 Ohm resistor, why not go with just a large capacitor in parallel with a small ceramic like 0.1uf ?  That's the more typical solution.  Even more typical is just the large cap in parallel with a ceramic 0.1uf cap and no resistor.

It is interesting though that even a 2uH inductor and cap filter filters out a lot of ripple when used as a post filter on a buck circuit.
3
RF, Microwave, Ham Radio / Re: Transistor tester
« Last post by Calambres on Today at 03:54:39 pm »
Wow!... lots of reading  ???
4
What could be a proved single opamp for a wien oscillator?

Anything with sufficient frequency response, and output voltage swing, and drive capability.

Since you still haven't bothered to tell us those parameters, how do you expect us to help you?

In addition, ponder the second paragraph here.
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FPGA / Re: ATF1502 programming & 'wrong' id (fake?)
« Last post by Zoli on Today at 03:51:11 pm »
Parallel port options from cheapest to most expensive:
1. Old computer(curbside find is an option).
2. Add-on card(PCI-E available from Star-tech and others).
3. New motherboard with on-board header(such as MSI B450-A PRO MAX).
4. Legacy motherboard/computer(new) from NIXSYS(and maybe others?).
6
Links to the tools please.  :)

The board holder does look very nice, and do I see you invested in a chip tester? The one Adrian Black (digital basement) used to test al kinds of chips with?
7
A friend bought a new usb pendrive with a capacity of 256GB.
It worked fine with his windows 10 pc but his DVB-T decoder with usb slot (used to record tv-programs)
did not recognize the pendrive.
Apparently the decoder accepts only pendrives formatted with FAT32 but our pendrive was formatted with exFAT,
so we used windows 10 to format the pendrive with FAT32.

Then we discovered that windows refuses to format a pendrive with FAT32 when the volume is more than 32GB  :--

I took his pendrive home and used my Linux machine to format the pendrive with FAT32. Problem solved.

Morale:

Linux is a system of possibilities.
Windows is a system of limitations.

here's why it ended up with 32GB, from the horses mouth; https://youtu.be/bikbJPI-7Kg?si=hWx5hdDppKhhQecj&t=365
8
Test Equipment / Troubles with HP-8903B
« Last post by Wil_Bloodworth on Today at 03:41:40 pm »
This week, I purchased an HP-8903B from a local gentleman.  I went to his home to view it and he mentioned that he serviced the unit by replacing the few capacitors in it and it was working "as it should" and within specifications.

So far, I have two problems with the HP-8903B.

PROBLEM 1 - Frequency Inaccuracy

Is it normal for the unit to not "hold" on a frequency and to have, what I consider, an abnormally high THD when simply using a loopback cable?

For example, if I turn off all filters and then just turn on a 1 kHz sine wave, the display will show a frequency from ~998 to ~1001.5.  No matter what frequency I put in to try to compensate for the +/- 3-ish Hz, I can rarely get it to stick exactly on 1 kHz.  Also, the longer I leave the HP powered on, the higher the frequency drifts.

PROBLEM 2 - THD %

When I use a loopback cable (regardless of the cable I try), I'm getting a "high" THD... AND the THD seems to also be dramatically affected by the amplitude.

Example #1:  All filters off. Frequency set to 1 kHz.  Amplitude set to 150 mA.  Distortion reads ~ 0.1240.  If I change the amplitude to 250 mA, the distortion drops to 0.77.  If I change the amplitude to 1V, the distortion drops all the way down to 0.022.

Example #2:  If I turn on the 30 kHz filter (1000 kHz tone @ 150 mA), the distortion goes from ~0.1240 down about half to 0.065. Choosing the 80 kHz filter results in a 0.09 distortion reading.

Am I expecting too much out of this machine or is something wrong with it?  The main reason I purchased this unit was to measure distortion so if that is going to be unreliable, it is not going to be the machine for me.

Thoughts?  Ideas?

Thank you,

- Wil
9
Metrology / Re: ADR1399 reference
« Last post by Andreas on Today at 03:39:40 pm »
Hello,

update on my ADR1399 ageing reference board after having added 100uF to the output of the LDO voltage regulator on day 246.
(HEF4052 multiplexer has been used since day 190 / previously it was a MAX4052A)

Now I have a much lower standard devation especially on the metal can packages (from 0.25-0.3 ppm to 0.1 - 0.15 ppm)
But also the LS8-packages went down from 0.15-0.3 ppm to 0.1 - 0.17 ppm

And again the output voltage shifted. So I fear that I will have to repeat the ageing drift measurements with a new set of references.

With best regards

Andreas
10
I finally took the time to read through all of the messages posted and process them properly.

I think I finally see some merit in removing as much charge from the integrator as the clock resolution will allow. As per the Landsberg rundown scheme, if I use the same clock to carry out rundown as I use for runup, the rundown counts can basically just be added to the runup counts. This eliminates the need for more constants that would need to be calibrated somehow. The effects of comparator hysteresis can be removed to a large extent by using some kind of zero-crossing slope amplifier, similar to the one described by Jim Williams in National Semiconductor App Note 260. This way, we don't need to add a certain amount of clock cycles' worth of charge into the integrator to compensate for comparator hysteresis. The board I designed has a footprint for such a slope amplifier, but I removed it since it had some issues. I will have to experiment with it some more. The residue ADC will have to digitize a much smaller integration range, I guess calculating that range mathematically and figuring out gain such that the small amount of charge left in the integrator spans the residue ADC's range will be most beneficial.

Of course, the latter part depends on the integrator starting and ending within that specific limited range. Dithering might necessitate a larger voltage range on the residue ADC. I will have to play around with my board to see what kind of numbers I get.

Regarding jitter, the numbers from a crude test performed by a friend indicate around 50ps RMS jitter, measured between successive rising edges of a GPIO toggling at 20MHz (done using PIO) with a 400MHz overclock. I am not sure how much of this comes from the crystal and how much from the PLL, and if a better crystal will make a difference. More (proper!) measurements will have to be made.
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