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Computers / Re: Format a 256GB pendrive with FAT32 using a windows 10 pc

« Last post by Mechatrommer on Today at 02:58:49 pm »

Quote from: golden_labels on Today at 01:36:00 pm

“Thankful” is certainly not the right word here. If anything, that would be following normal design principles.

i mean all generations of FATs are designed by M$, i wonder why Linux not making its own FAT? like Android (unreadable disk format by Windows) anyway what i meant is exFAT is also designed by M$, if they dont open source it until today, i guess Linux is still in dark FAT32 age, thats where the "Thankful" comes from. but i dont follow history very well about this, i could be wrong. btw what i hate about NTFS is just because it has "System Volume Information" directory that i cant get rid of... other than that, i dont care FAT32 exFAT or NTFS.

and also what i meant is, if anybody cant format Flash drive into FAT32 in Windows, there are free external tools that can do that and even more, he doesnt learn deep enough or he only like to develop false sentiment. but if he expects empty Windows can do that well... i dont find empty Windows (without softwares) is usefull anyway, we dont install Windows because of Windows, we install it so that we can run softwares in it. so get used to that notion. if not because of Wine, imho Linux is nothing (for me) other than web server or web browser and some FOSS softwares, not even complete devices drivers. ymmv and cheers.

Metrology / Re: Why don't we see more TDC based high-resolution ADCs?

« Last post by coppice on Today at 02:58:32 pm »

Quote from: nimish on Today at 01:55:18 pm

To spitball a TDC based DMM front end:

Exactly the same as a regular integrator but uses high speed comparators to trigger at, say, 0V and Vref/2 and then measure the time to integrate. You could easily linearize this and calibration could be done automatically I'd assume. PVT probably kills you but for a fixed temp, voltage and process -- n=1 -- I suppose you could do quite well.

You will have a design limited by the noise performance of the high bandwidth comparator, and you will be disappointed. If you look at the ultrasonic flow applications for which the GP22 was designed, you will find they are characterised by needing to measure, to a few 10's of picoseconds, the time between 2 very distinct events. Its only that the 2 events are very distinct that the design works well. A somewhat fuzzy comparison, limited by noise, at very high speed, isn't going to do well.

Computers / Re: Format a 256GB pendrive with FAT32 using a windows 10 pc

« Last post by Mechatrommer on Today at 02:56:32 pm »

Quote from: golden_labels on Today at 01:36:00 pm

“Thankful” is certainly not the right word here. If anything, that would be following normal design principles.

Test Equipment / Re: Siglent Bench DMMs SDM3065X, SDM3055 and SDM3045X

« Last post by mawyatt on Today at 02:55:59 pm »

Quote from: rolfdegen on Today at 02:23:42 pm

Could it be the VREF10 modul ? In the range of 70-75°F the voltage difference is approximately 15uV.

VREF10-001 Typical Temperature Graph

No it's not the VREF10 Reference, if it was this would show up on both the SDM and KS34465A. Here's a plot with just the SDM showing another "jump", so also not the parallel connection of both meters. WE've also seen this with other References we have, 2 based upon LM399 and LTZ1000, all with over 2 years continuous aging.

Best,

FPGA / Re: Help on translate schematics to Verilog.

« Last post by xvr on Today at 02:48:24 pm »

Your 'buffered' clock seems worse than original. And 74LS series is a VERY SLOW. It should not be used as clock buffer (and used at all on 8MHz, IMHO).

> When I use the original 8MHz clock I get sprites issue.If I use the buffered one the sprites are good.

Very likely that there is some problem with RTL.