Hantek sent me a list of timebase setting versus digitiser speed, and it's a bit strange, but obviously trying to get around some sort of hardware limitations.
Thanks again for the improved language file, that really does help to make using the machine nicer. It's a shame that Hantek/Tekway couldn't do that in the first place... It doesn't look like they will ever admit they need some help.
I am trying to see what a modern DSO input stage looks like: the most modern schematic I have found so far is from the Tek 2232 (June 1992 !).
You are welcome!
But the credit goes to Tinhead, since his work has been an inspiration for many of us.
-George
When I see so many talented people struggling to make such proprietary DSOs work as expected, despite language, culture and manufacturer's short term-only vision, and put so many efforts in it, I am now sure it is worth trying to develop a decent open source/hardware DSO!
Tinhead, if in the window “Display” press F4 (Format XY) oscilloscope hangs and stops responding to all buttons. You can only revive the Power button (re-enable).
Do You encountered this error?
Mmmmh - first bug found where the scope always crashes??
· Press button "Display"
· Choosing XY instead of YT immediately chrashes my scope.
Can somebody verify that this crash happens everywhere?
yes, i noticed it too. It does have something to do with an overflow during channel activation.
However it works perfect if you enable (just turn on, it does not matter if then on AC/DC/GND) both channels
or actually disable (turn off) both channels before you enable XY mode.
A small bug only, normally you will anyway enable both channels, setup coupling etc. before you go to XY.
I noticed in this picture these 3 strange new unpopulated footprints between the AD8370/LMH6552 and the AD8510... Really looks like a crystal with foot capacitors layout, but I am sure this can't be the case.
Still, I don't understand the lack of current limiting resistor for the OptoMos: this device is a Cosmo KAQY214S solid-state relay with MOSFet output, with a max forward voltage of 1.5 V, and max forward current of 5 mA.
Also, although I may understand the reason why the input capacitor before the JFET and the dual BAV99 diodes is angled at 45 degrees to shorten the trace in this particularly sensitive area, however I don't understand why Tekway also angled all the AD8370/LMH6552 stuff this way? Is this to stress their pick-and-place machine?
Do not keep any signal connected to scope when you on or off oscilloscope power.
...
Ok, go to do some (imagined) industrial service work with this. So, that you example try find some problems in situation where all systems are running with full speed... then you keep your scope connected and watching... and there come lunch time... you shut off your scope... (or come back and shut on) one PID loop swings from one end to one end... after ten seconds whole system is short time heavy disturbed, alarm rings and paper breaks... oh...thank you Hantek... it was only some tens of kilo euro. (imagined worst case scenario )
(this is one reason why Agilent (oh maybe I'm wrong and need say, old Hewlett-Packard) or Tektronix professional series instrumets (not hobby series) are very cheap in use.)[/size]In a good design, I would recommend:
- to put a 2kV spark gap at the input, with very good path to ground for ESD protection, see Dave's videos if you are not sure what I am talking about
- to provide a normally-open GND coupling relay at the input, which would physically disconnect the device under test when the scope is turned off and during start-up transients, to avoid any harm to it, or don't go out for lunch during tests
right, the input is never ever really off.
replace all these cheap relays/optoMOS by more adequate models
replace BAV99 diodes
replace the 2 BC846 transistor for current mirror by at least a matched pair (BC846B)
replace the AD8310/LMH6552/VariCap by the LMH6518 above
straighten the signal trace as much as possible
keep the signal trace as short as possible and away from other traces
I am trying to see what a modern DSO input stage looks like: the most modern schematic I have found so far is from the Tek 2232 (June 1992 !).
Really? Do you have more details on this? Maybe pictures, schematic of it? I am really interested!
This can't be, you have to do anti-aliasing filtering before sampling, not after. Maybe you mean that filtering is controlled by firmware?
Unfortunately, Tek schematics are only block level after the Tek 2232, so is the TDS520
that would be complettly new PCB, much bigger anyway. Hantek/Tekway did it anyway better
(they have at least better shielding) than Rigol/ATTEN where the PSU is so close to ADCs/Trigger
stage/1MSs-500MSs relays that you have already influence.