Author Topic: Multislope Design  (Read 83071 times)

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Offline Rerouter

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Re: Multislope Design
« Reply #250 on: July 25, 2019, 08:01:19 am »
That would most likely mean a DAC controlled by the micro. As the power dissipation is a bidirectional non linear amount. If you have an analog circuit for it. I'm willing to add it.

Edit. It would be an analog cos trigonometry function. So there may well be a circuit out there from the analog computing days
« Last Edit: July 25, 2019, 08:48:39 am by Rerouter »
 

Online jaromir

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Re: Multislope Design
« Reply #251 on: July 25, 2019, 08:39:50 am »
10 V at 100 K gives some 1 mW and thus about a 0.2 to 1 K temperature rise. So the expected contribution to the INL error would be something like  0.2.. 0.5 K times the TC mismatch. So something like 0.05 ... 0.1 ppm with the LT5400...

How did you find thermal resistance of LT5400? I can't find any specification, just this sentence in DS

Quote from: LT5400 datasheet
For  example,  if  each  resistor  dissipates  250mW,  for  a total of 1W, the total temperature rise inside the package equals 40°C.
40K for 1W is 40mK for 1mW, that implies a few ones to few tens ppb of INL influence.

Not sure about the exact numbers.
 

Online Kleinstein

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Re: Multislope Design
« Reply #252 on: July 25, 2019, 08:57:33 am »
The thermal resistance of SMD parts very much depends on the layout. For the estimate I used the curve on the power limit depending on temperature for the MORN part. This gives nearly 400 K/W = 0.4 K/mW.

The LT5400 data-sheet has a number hidden below the pin diagram next to the maximum ratings. There it is 40 K/W - looks rather low to me and may include using the thermal pad. With this low number the temperature rise would be even lower.
With less thermal resistance and better TC matching the compensation is not really needed any more.

There is no need for an analog calculation of the voltage for power compensation. The µC can do that in SW based on the last result.
A 8 bit DAC (e.g. MCP4901) should be sufficient to get some 98-99% compensation. It would need some gain as the resistors would need some 0-8  V (0-12 V for non AZ mode).
 

Offline Rerouter

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Re: Multislope Design
« Reply #253 on: July 25, 2019, 10:37:46 am »
for 0-10V across the resistor, its a very simple circuit, for more, it just needs another external resistor.

edit: ideally it would also have a feedback capacitor to slow it right down,

edit: attached a 12.5V version
« Last Edit: July 25, 2019, 10:55:46 am by Rerouter »
 

Offline iMo

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Re: Multislope Design
« Reply #254 on: July 25, 2019, 12:25:36 pm »
 :palm:
« Last Edit: July 25, 2019, 12:47:45 pm by imo »
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Offline Rerouter

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Re: Multislope Design
« Reply #255 on: July 25, 2019, 12:47:08 pm »
I do not follow IMO, the circuit shown was for DAC control, to actually simulate a Cosine function is a bit beyond my ability. this would just take the current reading, feed it in to a cosine function and output the 8 bit value to a SPI dac running off 5V, so 0-5V in = 0-12.5V out.

If you have thoughts on a cosine op amp circuit, It can be used. It is just hard to find anything not based on analog multipliers or very specialized chips,
 

Offline iMo

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Re: Multislope Design
« Reply #256 on: July 25, 2019, 12:57:49 pm »
When you look at above tables, and my calculations are somehow correct and relevant, in order to keep the LT5400 4x100k resistors at constant T aprox 0.3C above their max temperature spread, you have to alter the voltage at the heating resistor from aprox 26V to 29V for ADC input voltage -12V..+12V (LT5400 Heater Budget B).
« Last Edit: July 25, 2019, 01:07:49 pm by imo »
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Online Kleinstein

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Re: Multislope Design
« Reply #257 on: July 25, 2019, 01:23:25 pm »
The reference resistors get a constant power. So they don't have to compensated. In the simple 1:1 case the compensation heater would have to get as much power as the input channel in the normal working range. So some +-12 V would be enough.
The voltage would be something like U_heater = sqrt( U_max² - U_in²).
In an AZ mode with only 50% using the input voltage, the heater power could halve the value, thus 70% the voltage.

A 26-29 V range may actually work, but would result in a higher overall power. I would not go that far, but a smaller offset could i deed be an option: So maybe 10-15 V instead of 0-11 V. This may even work without amplification after the DAC  (the 100 K resistor toward the +15 V (maybe +14) and 0-5 V from a DAC that can sink the current.
 

Offline iMo

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Re: Multislope Design
« Reply #258 on: July 25, 2019, 01:31:50 pm »
With compensating only the P_IN.
« Last Edit: July 25, 2019, 02:03:38 pm by imo »
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Offline Rerouter

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Re: Multislope Design
« Reply #259 on: July 25, 2019, 01:45:27 pm »
The different between 15V and 12V is not enough, so you would need a small amount of gain to compensate the entire input range. Seeing as we are doing that, may as well leave the option and just give full supply range,

IMO, the relationship is Cosine, so for 10V, "12 * Cos((10/12)* 90)" gives 3.106V needed to balance the power.

« Last Edit: July 25, 2019, 01:48:50 pm by Rerouter »
 

Offline iMo

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Re: Multislope Design
« Reply #260 on: July 25, 2019, 02:23:37 pm »
IMO, the relationship is Cosine, so for 10V, "12 * Cos((10/12)* 90)" gives 3.106V needed to balance the power.
Here is an added column with Kleinstein's Heater Voltage Equation (see above).
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Offline iMo

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Re: Multislope Design
« Reply #261 on: July 25, 2019, 07:09:16 pm »
The feasible setup with 100k heater wired against +15V and to an unipolar DAC is with 2.2mW max at the heater, where the DAC's output has to be from 0.167V to 6.282V.


« Last Edit: July 25, 2019, 07:14:42 pm by imo »
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Offline jbb

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Re: Multislope Design
« Reply #262 on: July 26, 2019, 05:12:01 am »
It's a bit hideous, but some piecewise linear opamp circuits might work for constant power compensation.  (Obviously the first step would be a full wave rectifier.)

It's also plausible to use a servo loop with squaring detectors:

error = ref - (k*ui^2 + k*ur^2)
servo error to 0 by adjusting ur
constrain ur to always be a little above 0

ui is input voltage
uh is heater reference
ref is target voltage - a smidgin over k*ui^2
k is multiplier scaling factor
 

Offline Rerouter

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Re: Multislope Design
« Reply #263 on: July 26, 2019, 11:52:18 am »
JBB, I don't suppose you could draw that as a schematic, I am not familar with how you would approach that in the analog domain, the DAC approach is still the current method, but I'm curious how it might be done, I was exploring things like a log amp and subtracting the output, but so far no where near

Have done a spacing pass around the ADC area, And I'm about ready to lock that in, leaving the reference and input buffer to get settled. Just have to figure out where to shove the heater amplifier, all components where possible have a 1mm gap between any legs to make it easy to tweezer in and out parts. the silkscreen is stripped off any places that would cross the guard trace, I will include a SMD footprint option for C22 (likely 2 parallel footprints), I'm assuming this being power rail we can use an electrolytic, If not, I will correct it. Also added more thermal mass to the resistor network and planned out some space for 4 discrete footprints on the rear side of the PCB.

I caught an issue with my reference not using seperate sense and force connections, So next tackling the re-spin reference area. after that it will be getting rather close to littering test points and ordering boards territory. So I may aswell ask, what signal points Should I expose as test points

Edit: attached the bare layout, barely anything is routed on the back side.
« Last Edit: July 26, 2019, 12:43:57 pm by Rerouter »
 

Online Kleinstein

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Re: Multislope Design
« Reply #264 on: July 26, 2019, 12:56:36 pm »
The ground side layout of C6 / C14 still looks odd. this is supposed to have a relatively good connection to FB35 (was R35), as they carry the AC current from the modulation. They should also be closer to U2 C22 can and should be electrolytic.

I think there is a wrong connection from U4-pin6 to U13.

I had a dual OP for U13 with the 2 nd OP used for a test signal (average integrator output) to the µC internal ADC. The 2 nd OP is not really needed. A possible use is a fast temperature reading from a diode.

For the heater the easiest solution from the HW side would likely be one side of the resistor tied to -15 V and the other side directly to an DAC that can deliver up to 5 V, 200 µA (e.g. MCP4901). I would put the DAC relatively close to the µC, so that the SPI lines are not so long. The SPI signal would eventually (e.g. external - reusing the ISP connector) also be used with something like HC595 for other controls (e.g. gain, other MUX controls, relays), but with a different select line.

I have also thought about analog power compensation. Nonlinear analog parts are always tricky however. In principle would be a little similar to RMS calculation - maybe such a chip could be used.  Alternatively even a small µC may be an option. Still I doubt it's worth the effort - though interesting, especially for something like a high voltage input divider. Here some DMMs use an extra heater - though I don't know if as power compensation or temperature regulation.

The test points I have mainly used so far are TP1 already there, the integrator output, the NE5534 output, U13 output, the +14,-13.x V reference, possibly both sides of C22, the 4053 control signal for the input signal (convenient trigger source), the buffer amplifier output, maybe the supplies to the OPA145 (bootstrapped OP) in the buffer amplifier.
 

Offline iMo

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Re: Multislope Design
« Reply #265 on: July 26, 2019, 02:18:21 pm »
This is with 5V DAC and -15V (100k heater) and Rtheta=210C/W (typical MSOP8 without thermal pad).
Also mind the placement of the resistors inside the LT5400 could be important.
« Last Edit: July 26, 2019, 02:19:55 pm by imo »
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Offline iMo

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Re: Multislope Design
« Reply #266 on: July 26, 2019, 08:22:13 pm »
If there would be say 4-5 free pins at the Atmega328 you may create a simple resistive DAC (the resistor's values such it fits the highly nonlinear range best) and use a free opamp as a buffer driving the heater. The DAC's output values based on a lookup table would be enough, imho.
An low-pass put somewhere to filter out the MCU's noise (ie. an ~1nF to gnd at the opamp's input).

Not sure the temp compensation loop via the MCU would be fast enough, however..
The thermal mass is pretty small with those 4 resistors. My bet we talk 10um*10um*0.03um volume..

PS: A 5bit bin DAC with heater (HC245=Atmega328, heater's mW range as in the above table):
« Last Edit: July 27, 2019, 06:21:05 am by imo »
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Offline Rerouter

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Re: Multislope Design
« Reply #267 on: July 26, 2019, 10:23:24 pm »
Yep, schematic capture error strikes again around U13, now fixed up,
Moved C6 / C14 right between U2/U4, there is a direct connection from C22 to both caps, then from there to the op amps, also moved the modulation current ground around for you, currently R23 is also using it, not sure if that is a issue,

C22 is a bit further away still, however the traces between the capacitors are only 35mm long, which seems local enough.

TP2 was placed exactly 5mm further from C11's hole in case anyone is so inclined to use a 10mm lead spaced fancy capacitor

I will write the test point descriptions on the rear of the PCB silkscreen,
 

Offline jbb

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Re: Multislope Design
« Reply #268 on: July 26, 2019, 11:46:13 pm »
JBB, I don't suppose you could draw that as a schematic, I am not familar with how you would approach that in the analog domain, the DAC approach is still the current method, but I'm curious how it might be done, I was exploring things like a log amp and subtracting the output, but so far no where near

OK, I don't have a drawing program on this machine, so let's see how we do with some ASCII art.

The basic principle is to control the sum of the input voltage ui squared and the compensation voltage ucomp squared.  Squaring can be achieved in the analog domain with multipliers.  There is no need

                Sum / Difference
                     +---+
Uref --------------->| + |
                     |   |
                     |   |
      +--------+     |   |     +------------+     +--------+
Ui -->| square |---->| - |---->| controller |---->| buffer |--+--> Ucomp
      +--------+     |   |     +------------+     +--------+  |
                     |   |       Maybe PI?                    |
      +--------+     |   |       Limit to +ve output          |
  +-->| square |---->| - |       Note loop gain will          |
  |   +--------+     +---+        change with Ucomp           |
  |                                                           |
  +-----------------------------------------------------------+


Notes:
  • If Ucomp falls to zero, there is no feedback signal and behaviour will become erratic
  • If Ucomp falls below zero, the loop gain will invert and the loop will become unstable
  • The buffer output load isn't constant, which means the buffer will generate varying heat loads (much like the input buffer amplifier, actually).  A simple NPN BJT might do the trick
  • Analog multipliers might be prohibitively expensive


I suggest setting Uref a little higher than the maximum input voltage squared, so that Ucomp naturally settles above zero.  Adding a limiter to the controller such that the output is always positive is likely a good idea too.

Doing an approximation in the micro controller might be a better plan.
 

Offline Rerouter

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Re: Multislope Design
« Reply #269 on: July 27, 2019, 04:17:10 am »
Ok. take 2 at the reference mount, No slots, lots of thermal mass and as low a gradient as I can give for the area within reason

Edit: It was interesting figuring out how to make an equally spaced spiral. turns out 90 degree arc segments, and a small square pattern to offset the center point in a pattern, I've added more via's to the outer ring since, The noise Calcs, and exactly how sensitive given nodes is a bit out of my normal knowledge base, But I can at least try and lay this thing out to a point where the components are the only limiting factor.
« Last Edit: July 27, 2019, 06:46:58 am by Rerouter »
 
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Online Kleinstein

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Re: Multislope Design
« Reply #270 on: July 27, 2019, 06:49:56 am »
There usually is no need for crop circles around an LM399. The LM399 runs relatively hot, but with relatively long leads the heat flow in the leads is quite symmetric. Especially a gradient would be mainly constant, so even if there is some additional thermal EMF this part is essentially constant. Enough space to have a cap to protect the LM399 from air flows should be good enough - even that is more than used in commercial DMMs. The other point may be to keep really sensitive parts out out the static thermal gradient around the LM399. This would be mainly the DG408 mux and front end amplifier. The ADC parts are less effected because there is still an offset correcting AZ cycle anyway.

I would also not put to much effort to thermal compensation: the LT5400 should get away without it (down to 0.1 ppm INL level). The MORN type resistors (especially at 50 K or even 25 K) may like it - still it's only some $4-5 more for the LT5400, that also has better noise specs.

The actual resistor element is very small, but the thermal contact on the chip is very fast. So the thermal mass would at least include the substrate. Most of the time the input voltage is also relatively constant, so it would only be the signal, zero cycle to cause thermal modulation and if needed one could follow this.

A few of the µC pins may still be needed: one may want a pin for a separate chip select to control external parts.
It could help to have one pins to do a small shift at the comparator to shorten the rundown a little, by reducing overshoot for the slow slope (PD5 with my board).
To detect overflow of the input amplifier, one may want a comparator signal to indicate overflow.  I have not included this with the simplified plan (but already on my board, though not yet tested and used in software).
If an external slow chopper is used, this one may like a ADC synchronous clock (e.g. OC1A).
 

Offline Rerouter

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Re: Multislope Design
« Reply #271 on: July 27, 2019, 08:05:57 am »
Kleinstein, An extra footprint for the DAC costs nothing, but if its not there, it makes things harder, so better to have and not use than to not have and want. Its like adding that ICSP header, In my early years I killed so many chips flipping DIP packages back and forth from a dev board vs just having the programmer connected via a header and left connected for 90% of the troubleshooting phase.

Half of the reference side it me playing, Its a nice mental challenge having to take so many different contributing factors to mind at the same time, think of it like 3 dimensional Suduko,

if someone wants to suggest more than a 2x7 row of 0.1" pins for interfacing with an LTZ1000, I'm all ears, Breaking the reference area down has revealed a much nicer way of routing it now that a few things have been changes since I first put it together. letting me space things out more nicely, Included IMO's SOT23 package, and shorten some nets that where annoying me.

The overflow comparaitor, that would just be a basic window comparator on the buffer output when it gets within say 0.1V of its output limit? or did you have something better implemented

And based on what you said, will ensure any unused AVR pins get routed to a header for easy access along with some landing pads for bodge wires.
 

Offline branadic

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Re: Multislope Design
« Reply #272 on: July 27, 2019, 08:57:22 am »
I suggest to avoid crop circles, but use a circle of copper around the reference. Your spiral will do more harm than doing anything good, as it forms an antenna, leading to unwanted coupling.
Don't forget to put a 100nF cap (0603 or 0805) at the zener of LM399 between the legs, as done e.g. in Prema 5017. This is how I would do it, but without the slots.



Maybe the best way would be to put the reference, no matter which one you use, on an extra piggyback board. This way you can select for the best reference performer to put in and can compare on the same ADC board which works best.

-branadic-
« Last Edit: July 27, 2019, 08:59:21 am by branadic »
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Online Kleinstein

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Re: Multislope Design
« Reply #273 on: July 27, 2019, 09:28:56 am »
For the thermal compensation just the DAC on the SPI bus is a good idea and this is about it. With connecting the other side of the resistor to some -15 V  one does not even need amplification. The MCP4901 is fine driving 200 µA and gives sufficient range (e.g. 0-4.8 V).

The overflow comparator is just a simple window comparator: LM393 comparing against fractions of +-15 V supply with both outputs wired together with a simple level shifter.
I would more like test the output of the input amplifier (e.g. LTC2057 or discrete chopper). Still a bridge / resistor would be good to allow a later change of mind.  The other signals to the MUX would be more fixed test signals (7 V, 'temperature', filtered amplifier output, ground (for reference), optional 2 nd  GND from terminal/amplifier, ... ) that should not result in an overflow.
Signal filtering could be relatively bulky (e.g. 1-3 µF range PP cap(s)).

As the board is more like testing the ADC part, I would consider the LTC2057 and just 2 gain settings good enough for a first test. A discrete chopper might still need quite some tweaks and not sure it's really better than the AZ OP.  I would be more tempted to include the inverter/floating negative terminal to test the extension of the range to some +-20 V. This needs direct connection to the amplifier (gain setting), so it's a little tricky to do external.
 

Online jaromir

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Re: Multislope Design
« Reply #274 on: July 27, 2019, 10:15:58 am »

OK, I don't have a drawing program on this machine, so let's see how we do with some ASCII art.

The basic principle is to control the sum of the input voltage ui squared and the compensation voltage ucomp squared.  Squaring can be achieved in the analog domain with multipliers.  There is no need

                Sum / Difference
                     +---+
Uref --------------->| + |
                     |   |
                     |   |
      +--------+     |   |     +------------+     +--------+
Ui -->| square |---->| - |---->| controller |---->| buffer |--+--> Ucomp
      +--------+     |   |     +------------+     +--------+  |
                     |   |       Maybe PI?                    |
      +--------+     |   |       Limit to +ve output          |
  +-->| square |---->| - |       Note loop gain will          |
  |   +--------+     +---+        change with Ucomp           |
  |                                                           |
  +-----------------------------------------------------------+



This looks a bit like mark-space ADC modulator, see Solarton patent US3942172 from 1974
They used this scheme in most of their voltmeters.
« Last Edit: July 27, 2019, 10:18:23 am by jaromir »
 


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