Multislope Design

[iMo]

So they want a thermal mass around the pins to reduce any differential EMF issues, easily done. again point me at where they discuss it and I can address it,

https://www.eevblog.com/forum/metrology/lm399-based-10-v-reference/

https://www.eevblog.com/forum/metrology/lm399-based-10-v-reference/msg617201/?topicseen#msg617201

Knocking on the ADC case causing an offset would not be too big an upset. so long as it settled right back where it started,

It will not settle back with crappy contacts, be sure..

[Kleinstein]

I don't think it need the slots around the LM399. With it's relatively long leads the Lm399 is not sensitive to board stress - if at all it is the heat from the 399 that can cause some board stress and long time drift in SMD parts close by. So I would go without the slots.

The integrator looks better  - things would tighten up even more if the OPs are rotated clockwise.
A guard trace only makes sense without the solder mask and this is tricky for soldering so close to the pins.

For the references there are a few LTZ1000 board with connectors, especially HP A9 board for the 3458. Another type of connector / pin out is probably OK too. The 34470 type looks mechanical not very robust though. Even just wires soldered to the holes are also an option.

For the signals to the MUX, it may be good to also have some series resistance with the zero reading, just for symmetry.
The temperature signal is not critical - resolution is good anyway and MUX channels are likely plenty.
The 7 V reference signal to the MUX can actually be a little tricky.  In some cases the filtered signal would be better than directly from the LM399 - in this case an extra buffer (e.g. OP as a follower) might be beneficial.

The input section with protection and amplifier / gain changing would be a different topic - more like a separate board.
Just for initial test, some resistors as a minimal protection level could be OK.
If at all I would leave possible additions at the inputs for the end, if it turn out that is much space left.

[Rerouter]

Not a volt nut, and again, pick a connector if you prefer it for the purpose. Its just copper at this point, It could be 5x5mm copper pads if you would prefer to spot weld copper - copper if you really want to keep to the same metals 

Ok, So I read that thread slightly differently, Strain / Stress is not a resulting factor, more the better the thermal isolation of the regulator the hotter the leads meaning any thermal gradients are amplified, so doesn't really rule out slots, just means top focus is that the zener pins are the exact same temperature, so high thermal mass would actually benefit the LM399, the faster heat is sunk from the part, the lower the gradient at the cost of power consumption

So I'll revise him

On to Kleinstein,
I've checked a number of cheap PCB vendors and there minimum silkscreen thickness means what you see is what you would get, a line of solder mask separating the guard trace from the SOIC pins, does that make things easier for you, or still not quite, I'm too used to soldering wire strands to MSOP pins, So I'm not the best general reference for what is or is not easy to solder.

I'd prefer to not rotate the integrator op amps, as the other orientation makes other parts harder to route, what exact parameter are you trying to work by minimizing that node to such an extent?

There will be lots of room left on the PCB, its bigger than 50 x 50mm, and not a good shape for 50 x 100mm, meaning work on a maximum of 100 x 100mm which leaves tonnes of room. This is why I hold no issue with adding connectors, Big through hole test points, or alternative footprints,

Planning the middle left to be AVR and bottom left power supplies, leaving almost the entire right side to input

[iMo]

For the references there are a few LTZ1000 board with connectors, especially HP A9 board for the 3458. Another type of connector / pin out is probably OK too. The 34470 type looks mechanical not very robust though. Even just wires soldered to the holes are also an option.

The 34470A's LTZ1000 board connector is a joke. It could easily be the problems with 34470 ACAL (see the thread) come from that connector. I cannot remember whether the board itself is actually mechanically supported other than free hanging on that cheapo connector.

[branadic]

For the reference I suggest looking at teardown pictures of Wavetek 7000 and the like, a bare copper ring around the reference on top and bottom layer, though they use a four layer board.



-branadic-

[iMo]

Fluke's pattern:
https://www.eevblog.com/forum/metrology/the-ltflu-(aka-sza263)-reference-zener-diode-circuit/msg2501298/#msg2501298

[Kleinstein]

The row of hole could already be good enough for an external reference.  For mechanical reasons another point to screw down or just another few pin could be sufficient.

I don't think the 34470 ACAL problem is due to the connector. I would more expect things like thermal effects, a software problem (e.g. with temperature compensation) and maybe DA in filter caps. Due to the usually very fast modulation in the Keysight ADCs, I don't think it's DA in the ADC itself.


With a 100x100 board i can imagine enough space for at least a simple input stage:
A possible input part could be an AZ amplifier like LTC2057 with selectable gain of 1 and about 10.
A gain much higher than 10 has limited use, as even with a gain of 10 the amplifiers noise would already be about as high as the ADC noise. Protection for higher voltage and a divider at the input would however naturally take up quite some space, just for the minimum spacing and a relay. Control could be via SPI from the AVR.

[iMo]

A possible input part could be an AZ amplifier like LTC2057 with selectable gain of 1 and about 10.

I think Jaromir did a negative experience with the 2057 as the input buffer (input noise with high impedance).
PS:
2057  170fA/sqrt(Hz)
1050  1.8fA/sqrt(Hz)
1152  0.6fA/sqrt(Hz)

[Kleinstein]

The LTC2057 has quite a bit of current noise, so it will be a problem with really high impedance sources (e.g. > 300 K). The noise resistance and thus the impedance for lowest noise figure is supposed to be at some 70 K. So it should be acceptable for moderately low impedance sources. The input bias current may need compensation (or possibly selected 2057). It would also need some filtering at the input (e.g. a few 100 pF and some resistors, inductors).
For the use in combination with a MUX an AZ OP may present some extra challenges - there may be additional current spikes if the slew rate reaches the limits. Also input filtering is tricky. Before the MUX at the ADC there is relatively little use for an AZ OP anyway, as one would normally to some chopping with the MUX. So the buffer directly at the ADC can be a simple JFET type - no need for AZ.

There are not that many auto zero OPs for a 30 V supply range available and most (if not all) of them (e.g. ADA4522, OPA189 or MCP6V51) have even higher current noise. The LT1050 / 1152 are for some 15 V. Such OPs would need some bootstrapping for the supply - still possible for a buffer.  Due to their high noise there would be little use of gain anyway.

A high voltage (e.g. +-15 V), low noise (current noise and voltage noise) zero drift input stage is a topic on it's own. So far my best bet would be something like a slightly simplified (no bootstrapping for the OPs supply) copy of the input stage of the old Datron 1281 DMM: a discrete slow chopping amplifier in sync with the ADC, so that the ADC also provides residual ripply filtering. Low current spikes may need some trimming.

I consider using the MUX from the input for auto zero even more challenging, as the switches operate with variable voltages and sees a voltage jump. So balancing charge injection is much more complicated than at a chopper with near zero voltage over the switches.

[Rerouter]

To better understand it. The charge injection issue is for charge being coupled into the inputs of the mux or its output to the buffer?

[Kleinstein]

Charge injection is acting on both side of the MUX, input and output. How much charge comes from both sides depends on the impedance on both side. With low impedance sources (e.g. less than some 20-100 K) the MUX input should recover before the ADC conversion starts.

With an AZ amplifier one often uses some filtering at the inputs and the extra capacitance can make the recovery slow, so that is may takes longer to fully settle after a charge pulse from switching.

[Rerouter]

I should also ask, for R10 / R11, how much current can be expected as a maximum, I'm working hard to keep any DC currents off the signal ground because the trace that leads back to the signal connector ground point will end up being about 0.1 Ohms of resistance, so it doesn't take much current to make some noticeable offsets. I will reduce this as I can, but there are limits.

I've shielded the output of the integrator node, (no solder mask gap, so just a shield), Are there any other nodes you would want shielded, currently I'm thinking both mux digital pins,

[Kleinstein]

R10/R11 are used to compensate the OPs offset and for the small residual voltage to make the OP move. So it depends on the OP U2.  E.g. with an OPA172 this would be something like typical 0.2 mV and 1 mV max. for the offset. The AC part could be some 5 mV of so, depending on the integrator current. So the current would be something around 1 µA  DC + maybe 5 µA AC.
I would not worry about the DC part at all, as it's constant and thus just an offset to the ADC.  The AC part may be more of a problem, as it could in principle be an INL source.  At only 5 µA and with a relatively short trace, this should not be so much.
One may consider slightly larger values for R10/R11 (e.g. 2 K and 10 K).

Shielding may be good from the control signals to the 4053 towards the analog part. The signal next to those lines is the near ground (still with a ferrite) signal, that may not be that sensitive. So one could get away without much shielding there.
The point I still have a slight problems with, are high frequency signals on the 5 V and maybe power ground - so the decoupling at the µC and 4053 can be relatively critical - not just the capacitors, but also the layout to them.
The digital signal to the MUX are usually operated during rundown and only once. So there is some time for recovery at the inputs. It's more the supply current spike during switching that could be a possible error source.  This is also the reason for the series resistor in the supply I added in the updated input buffer schematic.

[Rerouter]

5uA AC means up to 500nV AC offset, So I'll route him on analog ground, It ends  back at the same connection point, just routed completely separate

Attached, means everything thing digital / 5V is shielded to ground, to your liking?

The extra cap and resistor are just for the option of giving the mux a negative rail, e.g. -5V, If you don't use it, you would just bridge it to ground at the regulator footprint.

Edit: this is also why I wanted to null the reference ground current, the original 160uA meant 16uV, the AC component was far lower, but I suspect in your old circuit some of this appeared as non linear behaviour, expecially the slope amplifiers R23, sure it only has 10uA max on average, but it changes with the itegrator value, which I would assume is the worst kind of offset for this circuit.

[iMo]

Let me ask why do you plan 2 buffers actually?
There is a bootstrapped buffer after the mux, the another one is planned before the mux.

Considering, say, +/-12V range you may need a single buffer before the mux, bootstrapped one, with switchable 10M or "high" impedance.

With say >12V range you would need a ~1:10 divider, placed after the bootstrapped buffer, made of an LT5400 array, for example 9k/1k or 18k/2k or 100k/10k or 200k/20k, etc.
Input impedance 10M or "high".
The LT5400 could be reused in the buffer's feedback for x10 range as well.

Something like:

10M/High --> bootstrapped buffer ----> LT5400 /10 or 1:1 or x10 ---> MUX ----> ADC input

An idea I did in an another thread (2057 is just a placeholder there, you may place a bootstrapped buffer there, even with +/- 130V Vcc/Vee (?? mind the divider's mWatts), R5/R9 is an LT5400):

[Kleinstein]

For the negative supply pin at the 4053, i would consider the series ferrite like in HPs 34401 design. I tired this as a bodge and it did help a little. My guess is the ferrite slows down the switching and this way reduces interference and maybe ringing. I expect a similar effect of a ferrite with a negative supply.  The negative supply would likely not be good at -5 V, more like -1 V to get low charge injection.

I would expect  R11 to be relatively close to the central analog ground point anyway.

In the layout I have not seen C6 and C14 - these may need a larger (e.g. 1206 footprint), to still get 2-5 µF at some 15 V at the capacitor.

For the general setup of a voltmeter there are several options. I favor the type with 2 amplifier stages, so a little like the Datron 1281 or Kethley 200x, as opposed to most HP meters with a single amplifier.

A single amplifier with AZ switching at the amplifiers input is tricky to get the charge injection / leakage low for the MUX directly at the input. This is more of a problem with my ADC to usually work at 1 PLC may be 2 PLC, os opposed to old meters often using 10 PLC for highest resolution.

The 2 stage concept has a chopping/AZ amplifier (could be just 2057 for a simple version with a little more bias/ current noise) at the input and only than the MUX at the ADC with the extra buffer at the ADC. Like in the 1281 I prefer gain in the first stage. This way the Chopper part does not have to be fast and fast settling is only required for the buffer at the ADC. In addition there can be a filter between the 2 st. amplifier output and the MUX (the Datron design has the filter after the MUX, which looks odd to me). This can help to reduce the noise bandwidth seen for the input signal - to get a better reading with a noisy signal. This is especially practical with the fast AZ cycle, so that settling is not excessively long.
For a long term zero and internal cal one would still need a MUX at the input, but this mux is only switching very rarely and thus charge injection is not an issue.

A high voltage input with a divider is currently not my priority and I would consider the more or less normal configuration with a 10 M divider that is switched with a relay to the input if needed (or for 10 M input impedance).  For slightly higher voltages, up to about 22 V, there would be slightly odd looking option: the negative terminal is not directly connected to ground, but driven to about the inverted input voltage (-0.5 times the external voltage). The ADC with MUX is used as a pseudo differential ADC switching between the positive and negative side instead of the simple signal / zero cycle. There are some limitations to this (e.g. for amps measurements), but is should work and can even reduce the INL a little as positive and negative side are added / averaged. It may also allow AZ mode a little fast than 1 PLC.

[Rerouter]

Ok, Ferrite added to the VEE pin, simple enough, The exact supply voltage is arbitrary, by having it broken out, you can tweak it.

I'm also planning to fit 220 Ohm resistors inline with all your MUX digital lines placed near the micro to reduce any noise spikes from them,

yes the supply for the integrator have not yet been flushed out, that will happen, just not yet, as I was more working on the signal chain, They all have there local decoupling capacitors, So I am left with a fair bit of wiggle room on how it will work, Its probably going to end up positioned under U4, Is there a reason U11 is not also on that supply island as well?

I suppose as a question of where things stand, should we be able to get a decent 6.5 digits out of this thing, is there room to make that a higher number, or are we closer to 5.5 digits,

[Kleinstein]

The ADC board I have is noise wise (only the ADC) in the 8.5 digit range. The AZ reading (difference of 2 readings at 1 PLC) has an RMS noise of some 600 nV. So this is good for 7 digts at 1 PLC - more would be with averaging (e.g. 50-100 PLC for 8 digits). There is even a slight chance noise could improve a little with better resistors.

With the current resistors in simple AZ mode, the gain stability is horrible - something like 20 ppm/K, so more like 5 digit level. There is also quite some gain-noise, so not just external temperature driven gain variations. The non AZ mode is similar with low stability and also the INL is expected to be limited by the resistors (self heating).

As a work-around I use a 3 conversion cycle, like the Keithley 19x meters uses, so doing a gain measurement for every reading. With this mode the conversions are a little slower (60.6 ms instead of 40.4 ms per reading), but the ADC gain is very stable. I have not tested it but I would expect something like 0.5 ppm/K plus reference ( < 1 ppm/K spec.). With the longer cycle the effective noise is a little higher, but still good.

DNL tests so far look good showing no problem (down to 8 digit level). Also the test for the wiggly part of the INL looks reasonably good (down to < 0.1 ppm level, likely better).
I have not yet done much INL tests for the more smooth part, as I still have some odd effect on switching from one level to another. At 1 PLC the turn over error measured was at some 1-1.5 ppm - which is about where the specs for 6 digit meters are. It looks like it gets better with 2 PLC. The INL test is still the large open point. So far it looks like there is a good chance for 6 digit performance, with hope for more.

One can clearly see the limits of the LM399 reference used. This kind of limits the performance when reading larger voltages. Usind the 3 reading mode adds a little (some 100 nV/SQH white noise) to the reference noise. Here it helps that the ADC is so low in noise to start with. On the other side the extra filtering removes a similar amount of noise, by reducing the effective bandwidth, avoiding aliasing. Anyway the critical noise part of the LM399 is more the popcorn type noise and thus quite some 1/f noise.

Even with a relatively noisy reference the low noise ADC should be useful to do a gain calibration for an amplifier stage / divider in front. The main two parts to upgrade are the resistors (for better gain stability, possibly slightly better INL) and a better reference.


The U11 OP is separate from the supply island for U2 and U4, as this is the critical OP in the integrator and it might be effected from common mode shifts or similar. U2 and U4 are connected, because there can be quite some current through R12 between the 2 OPs. A separate solution is thus not that practical. So the unusual part is more having U2 and U4 together and C6+C14 returning to the central ground like an analog signal and not normal power ground.

[Rerouter]

And if we used the morn array vs the lt5400. The specs alone would indicate much better gain stability. But how much is 2ppm max vs 1ppm max tracking cost in terms of resolution.

Also how low a PPM should the 2 resistor divider in the reference that sets the offset.

At this point it seems like I want the resistors in the reference and the signal resistors surrounded by as much thermal mass as I can throw at it. You said there was no issues with capacitance. So If i flood filled with signal ground around it and fenced it with vias to add even more mass. I would imagine it should be fine.

Im trying to work on the basis of that last resistor in the signal array not being used. Something like a differentiator with a weak bias could alternatively be used to just try and hold it say 2C above ambient. As a way to smooth out any thermal variations.

[iMo]

LT5400 is 0.2ppm/K ratio tracking. The divider resistor's TC which sets the offset should be no more than 0.2ppm/K*div_ratio, imho.

[Rerouter]

The ratio is 22.4 with the current resistors. So they should be on the order of 5ppm. Done.

[Kleinstein]

Yes the resistors for the asymmetry / slow slope are less sensitive by about the divider ratio. The ratio 1:23 is more on the low side - this could well be 1:30 or 1:40 (just a little slower). My current favorite would be a 4 resistor 1K/10K array (e.g. ACASA1001S1002P100) used as 1:40 divider. Two separate resistors could be acceptably too. There likely also is the option to get away without the asymmetry with a slightly different software and only slightly higher noise  (less resolution so that some quantization noise comes in, but not much).

The resistors in the reference amplification part don't need much thermal mass heat sinking. They run at constant power and with about 5 mW per resistor not yet at a very high power level.

The resistors at the integrator get less power (especially a 100 K LT5400), but the power is variable with the input signal. So the TC mismatch could be a contribution to the INL, as a U³ contribution from self heating. 10 V at 100 K gives some 1 mW and thus about a 0.2 to 1 K temperature rise. So the expected contribution to the INL error would be something like  0.2.. 0.5 K times the TC mismatch. So something like 0.05 ... 0.1 ppm with the LT5400 and some 0.2 to 2 ppm with the MORN network (the higher values with 50 K resistance).

The other effect is gain stability / voltmeter TC. Here the main parts are the reference and the 3 sets of resistors. The one at the reference has a slightly reduced weight (3/4) and the small slope divider the extra factor of about 1/23.

[iMo]

http://www.vishay.com/docs/60001/mpm.pdf
They have got 1:20, 1:25, 1:50 ratios, SOT-23,  2ppm/K tracking..

[Rerouter]

The other thing is if someone does want symmetrical. It would just mean not fitting that divider. So the option is already catered to.

Will make it work for both msop. Sot23 and 2 seperate footprints. So far nothing too crazy has been suggested just fancy well stocked resistors. And sheild a few nodes.

So any objections over using something to try and smooth out the heating on that input array. I still have to plan the circuit. But it would essentially be a single op amp servoing its output to keep that chip at lets say 1C now. Above a sensor placed a bit furthur away. Its the lazy oven. To just slow the rate of change of the array.

[iMo]

I think Kleinstein's idea on servoing the heater inside the LT5400 based on the "input voltage" is worth of considering.  The standard ovenizing the LT5400 with a temp sensor placed somewhere on the pcb may not work well as the thermal gradient (resistors->chip->package->pins->tracks->pcb->senzor) would be large.