Author Topic: Multislope Design  (Read 159592 times)

0 Members and 6 Guests are viewing this topic.

Offline jaromir

  • Supporter
  • ****
  • Posts: 349
  • Country: sk
Re: Multislope Design
« Reply #200 on: July 21, 2019, 01:41:50 pm »
Rerouter:
Be prepared that the final circuit can be somehow different from what are you designing now. Don't forget to leave ways for "alternative plans" during the circuit tweaking and modifying. For example, if you are going to use resistor network, consider also placing footprints for discrete resistors. Bring out a lot of test points, that can be repurposed for components pins soldering. You may need to throw in decoupling cap here and there. If using THT components, design the holes to be larger, so you can resolder components with less risk of pad damage.
 

Offline Kleinstein

  • Super Contributor
  • ***
  • Posts: 17246
  • Country: de
Re: Multislope Design
« Reply #201 on: July 21, 2019, 02:55:15 pm »
Another question still floating around - do we really need the composite integrator? Is an OPA140 (for example) not enough?
This is a good question.  I think it depends, as even the OPA140 will leave a small approximately square signal at the input. Depending on the reference current and cap this can be some 10 mV or so.
The amplitude should be +- I_ref / (2*Pi*GBW*C). So with a 1 nF cap., 10 MHz GBWand  300 µA Iref this would be some +-5 mV

If the impedance stays really constant with reference switching, that is good resistor matching for the positive and negative side, one should get away with a single OP integrator. With some 0.1% resistor matching the 2.5 mV residual square wave would correspondent so to some  5 mV/14 V *0.1%  or around 0.3 ppm of INL error from this effect. With a smaller capacitor the error could go up and down with a larger.

A 2 OP integrator will make the circuit more tolerant to resistor mismatch, as the residual voltage would be only fixed length pulses, that would ideally not cause an error even if the resistor do no match.

There is one more possible point: the OP for the integrator gets a input voltage dependent power dissipation (should be highest with an input near zero) and thus could cause a small thermal effect. with the 2 OP integrator the DC critical OP is the "slow" one and this one does not get mach variable power.

A downside of the 2 OP integrator is likely slower settling to a current step. This would mainly be an issue with really fast modulation that usually comes with a small integration cap. The circuit for the 2 OP integrator is that way that one can leave out the "slow" OP and get the 1 OP integrator as a fall back. So a layout could easily alow for both options  :).

So a 1 OP integrator (e.g. OPA140, OPA1641, maybe OPA827 - expensive but faster) is a real option if the resistor matching is good and the integration cap not very small.
 
The following users thanked this post: iMo

Offline iMo

  • Super Contributor
  • ***
  • Posts: 6902
  • Country: li
Re: Multislope Design
« Reply #202 on: July 21, 2019, 04:16:36 pm »
@Kleinstein: FYI - here is the simulation of the analog part V10 (the digi part is just toggling) of your MS_ADC with some parts added (the ferrite bead in Vee of the 4053) and with OP27 and AD711 as I can see in 34401A schematics. The opamps with their critical params as the universal opamps level3.

With HP's values of the input resistors (30k) and integration capacitor (440pF) and 220pF against GND, the modulation freq looks like >100kHz for, say, <=10Vpp at the integrator, otherwise the integrator's output will be saturated.

Also when looking at the 34401A pcb I can see there the 2 ferrite beads in the integrator's input signal path are "huge in size", compared to the third one (in 4053 Vee). I wish I knew their values :)

PS: the V11 below is with your parts and values in the analog part (40kHz mod).
« Last Edit: July 21, 2019, 05:30:18 pm by imo »
Readers discretion is advised..
 

Offline jaromir

  • Supporter
  • ****
  • Posts: 349
  • Country: sk
Re: Multislope Design
« Reply #203 on: July 21, 2019, 05:33:15 pm »
 
The following users thanked this post: iMo

Offline Kleinstein

  • Super Contributor
  • ***
  • Posts: 17246
  • Country: de
Re: Multislope Design
« Reply #204 on: July 21, 2019, 05:48:50 pm »
The ADC from the 34401 is reused in quite few instrument. I  just found in the 34420 schematics that the ferrites are supposed to be 150 Ohms. This is usually the impedance at 100 MHz. So this are not that unusual ferrites. The ones I tried on my board are now 300 Ohms (0805 form factor) and before where some unknown (recycled) THT ones. I have not tried other ferrites yet.

In my case the ferrite at the 4053 is not relevant any more - the 74LV4053 does not use an extra pin for the negative supply.
One could still include the ferrite in case a different chip is used (e.g. HC4053, max4053, DG4053, CD4053).

The 34401 uses a rather fast modulation. AFAIK its around 600 kHz.  The fast resolution is also needed to get the resolution, as there is no rundown part. 20 ms integration and 600kHz would be some +-6000 counts from the run up. So even with a full 10 Bits from the residual ADC this would be only some +-million counts. Due to the extra voltage swing when at higher input voltage  the full 10 Bit resolution would not be fully useful - likely only some 9 useful bits.
AFIAK the run-up part used 2 patterns with some 400 ns positive and some 1200 ns negative or the other way around. So the actual integrator pattern in the 34401 looks a little different.
I also use two such patterns, but slower: more like 1 µs positive and 24 µs negative or 24 µs positive and 1 µs negative.

For watching the integrator the output of the "slow OP" (OP27 in the 34401 circuit) in the compound integrator is good test-point. It should give am amplified form of the square wave that would be present in an 1 OP integrator.
 

Offline iMo

  • Super Contributor
  • ***
  • Posts: 6902
  • Country: li
Re: Multislope Design
« Reply #205 on: July 21, 2019, 06:02:17 pm »
..The 34401 uses a rather fast modulation. AFAIK its around 600 kHz..
..For watching the integrator the output of the "slow OP" (OP27 in the 34401 circuit) in the compound integrator is good test-point. It should give am amplified form of the square wave that would be present in an 1 OP integrator.
This is with 600kHz modulation (simple toggling) and HP part values and opamps.
Green is the OP27's output and the Blue is the AD711's output.
Looks nice :)

PS: HP's 600kHz Mod period could be = 416.66ns + 1250.00ns = 5cycl + 15cycl of 12MHz
« Last Edit: July 21, 2019, 06:28:40 pm by imo »
Readers discretion is advised..
 

Offline Rerouter

  • Super Contributor
  • ***
  • Posts: 4720
  • Country: au
  • Question Everything... Except This Statement
Re: Multislope Design
« Reply #206 on: July 21, 2019, 08:34:49 pm »
Jaromir. Give any thoughts on what to include and I will. A board respin only takes a week and while things are digital most of the changes have only taken minutes.

I will be loosening things up with probe points. This is just the framework. Would 1mm through hole test points be enough. Or do you have some pcb mount clip hooks you would like it to cater to.

Discrete vs array gets tricky. Mainly because the footprints cannot coexist like the dirt cheap arrays and the msop type ones. I could leave room on the back. But that will add capacitance and a risk of crosstalk to 3 sensitive nodes. Im not sure how that will effect things.

I prefer SMD for most things because its very easy to do a horizontal transfer of the parts to a new PCB. Equally I'm using Kicad so anyone should be able to modify it to there hearts content. If you want the design files early. Just ask.
 

Offline Kleinstein

  • Super Contributor
  • ***
  • Posts: 17246
  • Country: de
Re: Multislope Design
« Reply #207 on: July 21, 2019, 08:48:23 pm »
I had a look at noise data for thin film resistors. Form these, quite some small resistor show high noise that would be not really suitable. so for the Cheap ASAZA arrays I am afraid chances are high they may be too noisy. At least I would not bet on them before doing a noise measurement.

With noise specs they tend to be not very specific (e.g. < 30 dB for whole series, though  low values could be better than high resistors).

For the ADC part, especially the resistors in mind here, parasitic capacitance is not that critical. So THT and SMD Footprint combined would be an option. The really critical part is the integrator input on the other side of the 4053.
 

Offline Rerouter

  • Super Contributor
  • ***
  • Posts: 4720
  • Country: au
  • Question Everything... Except This Statement
Re: Multislope Design
« Reply #208 on: July 21, 2019, 08:52:46 pm »
https://au.mouser.com/datasheet/2/427/morn-795262.pdf

And what about the MORN arrays? they have a similar noise figure, I suppose right now you could technically drop in a 100K lt5400 on the same footprint, but in that case I would just need to know what else would change.
« Last Edit: July 21, 2019, 09:05:45 pm by Rerouter »
 

Offline Rerouter

  • Super Contributor
  • ***
  • Posts: 4720
  • Country: au
  • Question Everything... Except This Statement
Re: Multislope Design
« Reply #209 on: July 22, 2019, 02:05:59 am »
I should also ask. Those integrator input filter capacitors. What kind of capacitors where you thinking. Its still in COG area as far as value. But if it needs to be poly then so be it
 

Offline Kleinstein

  • Super Contributor
  • ***
  • Posts: 17246
  • Country: de
Re: Multislope Design
« Reply #210 on: July 22, 2019, 06:55:36 am »
For the small caps at the reference voltage amplification COG is OK. They don't even have to be 100 nF, some 22 nF maybe 10 nF should be good enough. More does not help much, though it does not hurt.

For the caps at the integrator COG is also OK. Even if I did not use the cap directly to ground, I would keep it as an option. The choice can depend on the OPs and may need some iterations - so a little space  around those foot-prints may be good to easy removal / re-soldering.

The MORN resistor arrays are a good option (already mentioned) and they should fit the LT5400 footprint (just no thermal pad connection). I see no additional change needed - likely twice the capacitance for integration cap, when a 50 K value instead of 100K LT5400 is used, but this does not effect the layout.

To have the option to use an external reference (e.g. LTZ1000 board) it would need something like 2 or 4 pins adjacent to the LM399, so one could fit a 6 or 8 pin pin-header. The extra pins would be for  -15 V (or the -13 V reference level) to do ground current compensation and maybe one for a temperature sensor (going to the input mux). For mechanical reasons it may be better to have at least 8 pins, using the extra ones for doubled ground pins.

For the R19/R21 divider I would consider a ratio of about 1:20  to 1:50, likely best at around 1:30 or so. I don't see a good standard value here from the DIV23 series. However this divider is less critical (about by a factor of 20-50). So the small 4 resistor SMD array ACASA as 1K/10K should be Ok, used as  2x1 K parallel to 2x10K in series = 1:40 should be OK.
https://www.mouser.de/ProductDetail/Vishay-Beyschlag/ACASA1001S1002P100?qs=sGAEpiMZZMvrmc6UYKmaNfQm27WGhZG85qVnRW9dDAw%3D

« Last Edit: July 22, 2019, 07:04:30 am by Kleinstein »
 

Offline Rerouter

  • Super Contributor
  • ***
  • Posts: 4720
  • Country: au
  • Question Everything... Except This Statement
Re: Multislope Design
« Reply #211 on: July 22, 2019, 09:30:04 am »
So for C11, C37, C37, keep it a prototyping space, Do you have any thoughts on exactly what kind of footprints you want for the integrator cap if not a 0805 SMD, I would assume a 5 and 15mm spaced set of through holes for various types of integrator capacitors

Heres the first part of the options you wanted jaromir and Kleinstein, Again if you think of it, its not hard to layout.
Mostly adding the 7 way header with all the connections I think you would need for a reference combined with bulking up the through hole pads in the area a fair amount and providing footprints for discrete resistors on the back

For the temp sensor, is it something you want for both the LM399 and the LTZ1000, or just on the header, as I can approach it a few ways,

Edit: I should ask why you have the heater enable connection, I just added it as your schematic had it, was it so you could measure the heater current?
« Last Edit: July 22, 2019, 09:38:31 am by Rerouter »
 

Offline Kleinstein

  • Super Contributor
  • ***
  • Posts: 17246
  • Country: de
Re: Multislope Design
« Reply #212 on: July 22, 2019, 10:18:53 am »
I would just keep the LM399 reference on board and 4 additional pins close to the 399, so that one can alternatively use an external LTZ1000 reference board.  The sensor / read back signal would be just at the header for the external reference.The extra jumper to disable the 399 heater is not really needed - I had it in my initial board, because there were vias anyway.

For the integration cap C11, just a 0805 footprint is OK - depending on the resistors the integrator cap would be something like 1-3 nF COG with no really high demand. Low leakage would be good and thus a guard trace below.
For C37,C17, R20 just a little more space for the tweezers would be a good idea, as one may have to change them.
 

Offline Rerouter

  • Super Contributor
  • ***
  • Posts: 4720
  • Country: au
  • Question Everything... Except This Statement
Re: Multislope Design
« Reply #213 on: July 22, 2019, 11:07:12 am »
To make clear, I'm just breaking out all these signals so people can play and do whatever they please for the reference, be it removing the LM399 and hooking the LTZ1000 direct to the zener pin provided, or even remaking the whole reference circuit externally and connecting it, there just there for people to play, I should ask the zeners on the reference amplifiers outputs, do they need to be anything special? I doubt it, but doesn't hurt to ask.

For the integrator, I assume I need to Guard both op amps Pin 2 with signal ground, to make the only way current can flow in to that node is via the capacitor? easily done. any other points I should be aware of?

Also been working on the bootstrap supply, I'm assuming based on the power level everything can be sot23 for the transistors, R202 was just me adding a 0 ohm jumper to make the layout more symmetrical for potential alterations.
 

Offline Kleinstein

  • Super Contributor
  • ***
  • Posts: 17246
  • Country: de
Re: Multislope Design
« Reply #214 on: July 22, 2019, 12:57:10 pm »
For the input buffer, the original circuit did not work that well. It is a little slow to react to input jumps and needs some extra caps to make it stable with load at the output. So I use a slightly different buffer now, not bootstrapped in the classical sense, but with a 2 nd OP to provide the supply. This version works much better. Attached is an update buffer version, similar to the one tested (omitting one more transistor and driving the other side with the OP). The SOT23 transistors are OK - just keep in mind they can be significant variable heat sources. In the old version the 2 TO92 ones were coupled to reduce the thermal effect.

The zener diodes at the references amplification are not critical - anything from some 3-9 V would be OK. They are there to extend the output range of the OPs. I would prefer some 5.6 V that would also be used in the new version of the bootstrapped supply.

The node at the input of the integrator should not be excessively large, to avoid leakage currents and parasitic coupling (e.g. to the control signals. The signal ground for guarding should be OK.  For the 4053 it may be a good idea to have the critical integrator input part at the upper side and the +5 V supply more at the other side. The ground return path at the 4053 is already near ground so I don't see need for guarding there.
The 4053 switch chip does produce quite some supply current spike when switching. In don't think it would need extra decoupling to get a stiff supply to the 4053. It is more like avoiding spikes going out from the 4053 supply and GND pins.
The 5 V supply to the 4053 also should be reasonable stable. The resistor for isolation should not be a problem as the current is essentially constant. However the 5 V regulator position and ground return could be an issue. At least with an HC4053 on the breadboard there was an effect from the 5 V supply to the result (some 1 mV/V). So even a separate local regulator for the 4053 might be an option.
« Last Edit: July 22, 2019, 03:16:16 pm by Kleinstein »
 

Offline Rerouter

  • Super Contributor
  • ***
  • Posts: 4720
  • Country: au
  • Question Everything... Except This Statement
Re: Multislope Design
« Reply #215 on: July 22, 2019, 01:53:29 pm »
I can just gaurd the entire node, makes things easier,

For your schematic, any chance of shifting things around, the references and values are kinda piling over one another.

Hapy to revise that part as its not quite the right shape for a good fit for what I am trying to do.

In the image I have not yet replaced the integrator capacitor footprint, was more concerned about escaping all the digital, supplies and non signal grounds,

I'm also thinking to do the same type of guard ring with the input buffer signal out of the mux, to use it to guard the signal all the way back to the input mux pin. to my knowledge it wont really hurt anything by doing it, even if it doesnt really effect anything, this is really just because a high impedance signal is sitting next to a supply pin on the op amp.
 

Offline Kleinstein

  • Super Contributor
  • ***
  • Posts: 17246
  • Country: de
Re: Multislope Design
« Reply #216 on: July 22, 2019, 05:00:16 pm »
I would not take so much priority to guard traces. They are mainly important in a high humidity environment. Especially between the SO8 pins they make soldering rather difficult.  So I would only have them where they are not a problem. The main critical path is from the integrator output or later the slope amplifier and the integrator input. A constant leakage current, like from the supplies is not yet a problem. It is more like larger open areas that might collect surface charge - but in this case there is space for a guard.

For the buffer input, it depends on the use whether this node is really sensitive. There are 2 options for a use as a voltmeter:
A) with just the buffer and thus only protection before the mux. To reduce the charge pulse on switching it would better have some extra pre-charge phase and an another auxiliary buffer (also useful for protection) before the MUX. If gain (e.g. 1 V range)  is needed the buffer would be changed to an amplifier.

B) the other version would use another amplifier / buffer before the MUX (e.g.  LTC2057 or discrete slow chopper amplifier) in front of the MUX. So the signals to the MUX are normally relatively low impedance and one could use 1 PLC even for slow conversions without penalty on the input bias. The input would only see switching of the chopper amplifier, that can be better optimized for low bias current / charge spikes than the full swing (0 V to signal and maybe 7 V in between) switching at the ADC.

From the partial layout I see the 4053 somewhere far a way from the integrator resistors, the integrator and the µC. Ideally there should be relatively short connections to all 3 sides. So the 4053 switches are kind of a central part. With the orientation of the 4053 like in the picture the µC would be best somewhere to the left (maybe bottom). The resistors would be more to the bottom, may be right. The integrator would be best above the 4053. The connection from the reference part to the resistors is not that critical - so this could be longer if required.
A smaller C11 would already simplify things quite a bit. Even if a alternative THT version is wanted (e.g. for a PP cap) something like 5 mm spacing would be sufficient. I think there are also a few connections and 2 ferrites still missing.

I know the layout around the 4053 is tricky, one may consider to swap the gates A and C on the 4053. It takes compromises (e.g. extra vias) somewhere. The signal at pins 2,5 and 12 is near ground (only a ferrite to ground) and thus a less sensitive to leakage. If nothing else helps I would even consider a wire link as kind of local 3 rd layer.

I have changed the buffer circuit file in the last post a little to make it more readable.
 

Offline iMo

  • Super Contributor
  • ***
  • Posts: 6902
  • Country: li
Re: Multislope Design
« Reply #217 on: July 22, 2019, 05:16:29 pm »
I would just keep the LM399 reference on board and 4 additional pins close to the 399, so that one can alternatively use an external LTZ1000 reference board.  The sensor / read back signal would be just at the header for the external reference.
LTZ1000 via a standard 0.1in 4 pin male/female is something the volnuts would be shocked :)
I've seen the 34470's piggybacked version and it looks so cheap..
You would need a quality connector there, imho.


Readers discretion is advised..
 

Offline Rerouter

  • Super Contributor
  • ***
  • Posts: 4720
  • Country: au
  • Question Everything... Except This Statement
Re: Multislope Design
« Reply #218 on: July 22, 2019, 09:02:57 pm »
The Integrator output is a regulated low impedance node, that doesn't sound like a critical node, I assume by "later the slope amplifier and the integrator input" That you want me to Guard U4's Pin 2 with signal ground to keep out the noise of the fast switching output.

I'll shuffle things around to get the integrator closer to the 4053, The "Summing Node" in the picture is who gets the ferrite to the integrator input, the ferrite connection to ground will be going off to analog ground along with R23's ground connection, as you are mostly just using ground there for even power dissipation in the resistor array, It doesn't need to share the exact same ground,

I have not yet reworked RN202 into supporting discrete resistors on the back, but that will happen once I get the input buffer and integrator sorted.

 

Offline Kleinstein

  • Super Contributor
  • ***
  • Posts: 17246
  • Country: de
Re: Multislope Design
« Reply #219 on: July 22, 2019, 09:43:19 pm »
I would just keep the LM399 reference on board and 4 additional pins close to the 399, so that one can alternatively use an external LTZ1000 reference board.  The sensor / read back signal would be just at the header for the external reference.
LTZ1000 via a standard 0.1in 4 pin male/female is something the volnuts would be shocked :)
I've seen the 34470's piggybacked version and it looks so cheap..
You would need a quality connector there, imho.

4 Pins would be difficult - I think it takes at least 5.  If there is not much variation in the heat flow, I don't see a really big problem using the 0.1 in headers for a reference. 0.1 ppm of the 7 V reference is nearly 1 µV and it takes thermal gradient in different metals to generate thermal EMF. Pins that are close together tend to have rather symmetric gradients.
It may not be absolute volt nut style, but not too bad either. I don't think the construction in the 34470 is such a bad idea - I don't remember the mechanical connection, that would be more my concern.
Anyway the board would only set the pin spacing and those 2.54 mm are rather common.

For the shielding: the integrator output node and the slope amplifier part are not critical in the sense that they are sensitive to react to small currents or capacitive coupling. They are the possible sources of unwanted coupling. So the guard can be important between the summing node and the integrator output ( e.g. under the integration cap), while a guard between the summing node and the supply is less important. I am not sure the coupling from the slope amplifier is really that bad, but it is at least a possible source for nonlinear effects. There is no need for a guard around U4, if at all more like a shield. It should be enough to keep it a little away from the input side of the integrator and the 4053 to avoid extra capacitive coupling.
 

Offline Rerouter

  • Super Contributor
  • ***
  • Posts: 4720
  • Country: au
  • Question Everything... Except This Statement
Re: Multislope Design
« Reply #220 on: July 23, 2019, 09:46:21 am »
IMO, what connector would you like to suggest as an alternative, as No matter what you do, there will be Copper - Solder - Some Metal - | - Some Metal - Solder - Copper, So may as well beat the curve and just use solid core copper wire to bridge the gap.

I've bunched the integrator up to make that node much smaller, and added the updated guard trace, I'll also seperatly guard the integrator output with analog ground once I figure out the new placement for the slope amplifier.

For the input mux, you have the GND, Zener and Temp inputs all being low impedance inputs, so if you wanted to do a double buffer Its not a problem, would just mean buffering the 5 other inputs, or putting something else we want on those inputs that is already buffered.

Edit: when I work out what ferrite to go with, I'll nudge it up a little and just connect directly across 4053 pin 1 and 3, leaving the 2-5-12 node to have a similar orientation ferrite positioned across 4-6 but not actually connecting to that ground,

Edit2: for true volt-nuttery I will be removing any silk screening that touches the integrator node or guard trace, just takes some time.
« Last Edit: July 23, 2019, 10:34:00 am by Rerouter »
 

Offline iMo

  • Super Contributor
  • ***
  • Posts: 6902
  • Country: li
Re: Multislope Design
« Reply #221 on: July 23, 2019, 10:17:40 am »
IMO, what connector would you like to suggest as an alternative..
I would recommend at least the "rounded precision" male/female 0.1" pins, and use 2 for each signal.
Readers discretion is advised..
 

Offline Rerouter

  • Super Contributor
  • ***
  • Posts: 4720
  • Country: au
  • Question Everything... Except This Statement
Re: Multislope Design
« Reply #222 on: July 23, 2019, 10:30:37 am »
so essentially for my part that just means change a 1x07 to a 2x07, easy enough, jeez, If i knew volt nuts where this easy to please....

At a glance none of the reference LTZ1000 boards out there have any kind of methods for mounting, so would you like to suggest what I should provide as far as say some holes for plastic spacers or similar?,
The current cutouts on the LM399 could technically be used to zip tie a piece of foam over it, but it doesnt help people who want to bodge in an LTZ1000,

If there is an agreed apon standard board, I could even plan a space for it, as the current LM399 area is pretty busy, So I was already thinking about expanding it a little. (space as in dimensions and input connection locations)
 

Offline iMo

  • Super Contributor
  • ***
  • Posts: 6902
  • Country: li
Re: Multislope Design
« Reply #223 on: July 23, 2019, 10:40:28 am »
so essentially for my part that just means change a 1x07 to a 2x07, easy enough, jeez, If i knew volt nuts where this easy to please....
They will not be pleased, sure, I am definitely not a volnut and I would consider that as a "suboptimal" solution.

The slots around the 399 - in past I saw volnuts wrote the slots are actually worsening the situation, better to have a bigger mass of copper around the pins (in a symmetrical way) without the slots.

PS: the rectangular shaped 0.1" female/male headers are, imho, not suitable for messing with uV precise signals. The female part is just a simple Y fork shaped, and when messing with the connector for too long (especially when you use only a few pins) it may loose a good contact fast. Those connectors are ok for Arduino folk, and when you insert in once and let it be for years connected.

Imagine you knock on your ADC case and the voltage readings will jump +/- 100uV :)
« Last Edit: July 23, 2019, 11:00:19 am by imo »
Readers discretion is advised..
 

Offline Rerouter

  • Super Contributor
  • ***
  • Posts: 4720
  • Country: au
  • Question Everything... Except This Statement
Re: Multislope Design
« Reply #224 on: July 23, 2019, 11:05:25 am »
To me it is just a plated through hole, spaced 0.1" apart, what you solder in to it is your own choice, The hole is also suitably large so a multi meter probe could poke it without slipping during debugging after construction. and this is just an option space breaking out all the reference signals so people can do what they like. again, If you have a better suggestion that still fits e.g. a 0.1" spacing but needs some more room, now is when its easy to make room for.

Now the slots I thought where to take stress off the chip, I was weighing up doing something a bit more curvy to let it expand and contract with a twist translation, but that was a bit hard.

So they want a thermal mass around the pins to reduce any differential EMF issues, easily done. again point me at where they discuss it and I can address it,

Knocking on the ADC case causing an offset would not be too big an upset. so long as it settled right back where it started,

Currently the reference polyester capacitor is the heaviest thing in there, and I would guess that will couple some flex in to the PCB, so not quite sure how to marry that with the LM399 if slots are out.
« Last Edit: July 23, 2019, 11:11:58 am by Rerouter »
 


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf

 

-->