Multislope Design

[iMo]

I would recommend to "review and finalize the schematics v1.0" first, as the number of add-ons grows

[Rerouter]

Well it is iterating towards this rev being done, the digital and the power supply don't really have any special requirements other than fit on the board and keep away from the analog stuff, my only recent addition has been some output resistors for the digital signals to reduce the coupling near the MUX's

so for the input buffer, include a jumper and test point to inject a lower voltage than -15 to just the bootstrap area, done.

I've removed the spirals, and am just doing the final cleanup of the reference area before sliding him in to place,

Right now things have mostly settled as far as the schematic goes, the reference and ADC took some prodding, but that has not changed in a way that requires a significant layout change, It was more a case of technical debt, I packed it up nicely before things where settled on the reference area and did patchwork as they kept changing.

Edit: I can make a piggyback board easy enough as all the signals are broken out, the main question that seems to be hard to get an answer on is what is the agreed upon normal board for the LTZ1000, If I had to go piggyback, then I should cater to both (wont be on this rev)

[iMo]

Perhaps the LTZ board design is something for higher revisions of your board, as it will certainly start a long discussion on the very details. The first rev of your board shall show it works fine at 6.5digits and LM399, mind there are still several untested concepts outstanding..

The connectors - I think the rounded precision 0.1in male/female with TWO 2x7pins (or 2x10) sockets at both opposite edges of the piggyback pcb may work fine, provided you would use say 4 pins for each signal and the power lines. 2 connectors give a pretty sturdy mechanical support for the board as well.
PS: The clearance between the two boards will be around 5mm with the rounded precision connector - doublecheck..

[Kleinstein]

The LTZ board would be a thing for later. It's just to have the option to use an external reference. I don't think it would even take that many pins. There are essentially only the 2 connections for the reference voltage are really critical (e.g. use 2-4 pins each), for the rest, like power 1 pin should be OK.

We try our best, but chances are there the board would need some bodges or even a re-spin anyway. As boards are not that expensive anymore, I would not overdo the planing and better leave some space for bodges than squeezing everything to make it a handheld meter.

I don't think it takes so many vias at the LT5400 footprint - this is not a high power part with very low junction to case thermal resistance. There is little need to have the copper area much lower thermal resistance. More vias mainly make soldering more difficult. Just space for 3 small THT resistors right over the array also gives some copper area (and test points).

The same is for the LM399 just a really closed circle on the top (or bottom), some 20-25 mm OD is well good enough. A first board is more about the general working, not such tweaking. The LM399 has it limitations (popcorn noise) anyway.

At least with OPs like OPA145 and OPA172 the buffer amplifier is working rather well to the lower supply. The weak point is more at the positive supply.

[Rerouter]

removed the vias under the array, It was more intended to remove any gradient effects from surrounding parts and acting as shielding (recommended in the datasheet for the array) , the part does not actually electrically connect to the plane, meaning the thermal load should not be too high when soldering.

Room for 3 through hole resistors over the array footprint, easily done, any other places you want me to cater to through hole parts?

Also you want test points on both sides of each array resistor? done,

So currently the test points for each section, any more to add?

ADC Area:
AVR ADC1
AVR AIN0
Slope Output
Integrator Output
R79 - Integrator input offset
Signal Ground

Reference Area:
-15V
+15V
Signal Ground
Zener

Input Array:
+Ref
-Ref
Buffer Output
And the 3 points for the other side of the array

Input Buffer:
Mux Output
Bootstrap -
Bootstrap +

[Rerouter]

Input area put together, I suspect I will have to pretty it up a little, leaving just the AVR / power supply which I have grouped up, but not yet worked in to the board

[Kleinstein]

AFAIK the thermal pad on the LT5400 should ideally be soldered to the extra copper. I have no experience with this and could imagine manual soldering could be tricky and the preferred method is using solder paste.  This detail may be worth checking before the final touch.

The input buffer part is thermally one of the bad guys: it has power consumption depending on the input signal. So I would prefer to have it not too close to the ADC - part. It may still be OK with good resistors (e.g LT5400), but this is one of my concerns. I think thermal coupling here is more important than from the LM399. The LM399 is hot and likely the highest power part, but it's constant temperature (though variable power and thus variable gradients).

The central ground point at the input connector is a little odd, as it makes the distances quite large. The more logical point would be closer to the center.

R61 should go to normal power ground - this is just for a zener bias, so not at all critical.

Getting clear about the schematics (except of pin swaps) is normally a good point before doing the layout. Especially the input area still has a few options / unclear points and maybe parts that are optional depending on the space available. One point, that I mentioned before was a buffer for the 7 V signal (to get the filtered 7 V without loading it by charge injection).
Another point is a possible amplifier in front of the MUX, as this needs a ground connection of some kind.
The UART connection is also an open point there it may be good to add some more supply filtering, as the UART would likely be used during conversions.

[Rerouter]

Changed the LT5400 footprints to exposed pad, I have also exposed a mask area to heat with a soldering iron to melt under the pad if you really are limited to an iron, If you had to use this method, I would recommend getting the pad hot, apply some solder to the pad, clean it back with some wick and try and hold it molten, and only then tweezer in the part,

Buffer is variable heating so keep away from the temperature sensitive parts, check, Its part of why I went a big overkill on the array thermal situation, the vias and copper will reduce the amplitude of any thermal gradients, but I will shift it around,

The input connector is the star grounding point for all the measurement side of things because it is that point that all measurements to the outside world are relative to, this was part of why I was going a bit out of my way to keep certain parts of the grounding seperated (I went well overkill in that respect and can lower it to 4 connections) So my thinking was, if any variable current is sent down a shared connection back to that master ground node, you get a measurement offset or noise. To this end I was thinking of changing it to a 2x05 Connector to give each external signal its own ground connection.

That ground point is then connected back to the power supply like a more conventional ground star point because any offsets there do not alter the measured voltage, everything is relative to that point.

R61 falls under that point, But if you want I can route him back to the power supply star point,

I am building the circuit up in easy to rearrange chunks, anything with a silkscreen square and label is what I would call "Locked down" as in, I'm happy with it and should not need to do any major changes to, just possibly shift the chunk around. At present I have not done any pin swaps, and for the analog mux's I'm happy that I will not need to,

The AVR is a bit uglier at present but that is more to do with where the ADC pin is, and no matter how I swap it is not going to help it, the digital outputs are actually ideally positioned and ordered, all grouped at the edge of the micro, routing out the spare pins will also be a bit awkward, For the DAC, I would recommend using 14, 15 or 16 for its chip select

I'm laying out function blocks that I can slide about with very little change to the interconnecting wires, e.g the buffer is only 5 connections out of the block, If that bias was to +15V, it would be 4, so dragging over the entire block and moving it does not cost me much in terms of layout, its more the building of those blocks that take more time. This is why changing things is not hard, even for bigger changes it is just shift the block off the board, make the changes to that block then slide it back in,

There is lots of room left, We agreed to a max of 100x100 just to support almost all dirt cheap PCB suppliers, If you need more room for the Input, I'll just rotate the reference, input mux and buffer clockwise 90 degrees, should have shown the entire board, but space is not at any kind of premium, So throw down any options you want to cater to, The +7V signal to the mux already has 100nF tied to it, so it would appear to be much more immune to charge injection than any other signal.

The UART will end up very close to the Power supply at the moment, likely going to be towards the bottom left of the PCB, I was intending it to just share the AVR ground and 5V, but if you want it run seperatly no issue, was just thinking to close the loop, (The micro is sinking the TX current) As its an isolated interface all I need to do is prevent any capacitive coupling, I was thinking to flip it to the attached image style to make it more in line with normal UART,

Edit: for AVR pin PB2, I would recommend leaving that disconnected or only an output, if he changes state during an SPI transfer it kicks the SPI over to slave mode.

[Kleinstein]

For soldering the LT5400 with an iron, the describes method was one I considered too.
Anyway, I already have my version of the board, that is so far reasonably working - though with low quality resistors and thus the work around mode.

For the UART Tx it makes sense to have the extra MOSFET (alternatively BJT) to shorten out the LED in the OK. This way the supply current does not change much.
I would even add more filtering for the current (Split R96 and add a large cap), or consider a PNP + 3 resistors as a simple 1-2 mA constant current source.
The extra inversion from the FET may help, to get the non inverted UART signal out - so possibly directly connecting to an µC on the output side.

Which package of the AVR is planed ?

[Rerouter]

So far I have just been using your same DIP package, As a QFP package would put it on par as the hardest part to solder so far used, and QFN can be stupid to get good reliability out of, especially if people lack hot air for the LT5400 thermal pad,

My own motivations for this circuit are for slower high resolution sampling for an SMU type power supply plugin, so this laying out process is helping me narrow down a lot of the specifics,

For the UART, it is active low, so the inversion is taken care of in the current configuration, The current noise would be about 1mA, As I was already planning to route analog 5V and ground on the AVR seperatly, Is there any other benefit to keeping the digital supply so low current?

Edit: alternativly instead of opto's, If current variation is an issue, we could use a digital isolator for about the same cost, and have the option of much higher data rates, https://au.mouser.com/datasheet/2/368/si841x-2x-datasheet-1398047.pdf (Si8422AB-D-IS cost is $1.50)

[iMo]

Soldering the package with the exposed pad - I do QFNs with hot air, as it works fine, imho the other option would be to design a 3mm dia via at the exposed thermal pad and try to solder it from the bottom (after you soldered the top pins in). The 7mm2 x (1.6+0.3)mm of tin will increase the thermal mass too..

Optocouplers - they have to support >115k2 baud, imho..

FYI - Isolators - I've stocked the 100Mbit ISO776x ones.
http://www.ti.com/isolation/digital-isolators/products.html

PS: below one of my boards with an via in the exposed thermal pad

[Kleinstein]

Other isolators are OK too and could be even a little simpler with less current. The 6N137...139 opto couplers are also fast enough.  With 20 ms conversions the UART needs some 7000 Baud minimum speed to send the data during the next conversion. I currently use 9600 Baud and some 100 kBaud should be OK with the optos. With a little compacter data format (some bits are currently fixed and short time also means less resolution) this would be OK for 1 ms conversions.

1-2 mA current pulses from the UART could still have a little effect. The 4053 does react to variations in the supply voltage (I have measured some 1 mV/V for the conversion result this was still on the breadboard, but that is about order of magnitude to expect.
Also jitter from the µC could have an effect - this should be well below 1 ns. The 34401 even uses the external flip-flop for synchronization, but the AVR seems to be really good in this aspect. Variations in the supply could have an effect at that level.

With the AVR I also have the difficulty that the SMD packages are really small and make the routing difficult - negating some of the small size advantage, while the DIP package is more on the large side, but makes routing easy. The trace to the ADC may be longer, but it is not that sensitive.

[iMo]

You may use small sot23 5V ldo voltage regulators for each critical part of the ADC (ie one for AVR, one for switches, one for optos, etc.) and the master regulator will be for 6-8V (there are 7806/8 afaik, or use an LM317).

[jaromir]

1-2 mA current pulses from the UART could still have a little effect.

In my ADC I arranged timing so that CPLD sends UART data (four bytes at 31250 baud) via optocoupler during integration cap zeroing and is quiet during runup and rundown.
Perhaps one may add timeslot for data transfer, when no measurement takes place. At 115200 baud this will not introduce much of time penalty.

[iMo]

What about to run the avr at 20MHz? It will give you a nice 50ns clock period and better match with higher baudrates.

[Kleinstein]

A high baud rate (e.g. 500 kBaud range) and sending during a not so critical phase is a option. This could for example be the waiting time before starting the µC internal ADC or the µC internal ADC actual conversion time. As I currently send out raw data there are some more bits to send. 

Really need would be something like 19 Bits for the runup and fast rundown (these two points are easy to combine with a simple integer multiplication), 5 to maybe 6 bits for the slow rundown and some 8-10 bits from the µC internal ADC. So this is rather tight to get into 32bits  (may work for short integration times as than the runup part is reduced). It is a little more than the actual resolution (some 28-29 bits) because there is some additional headroom (e.g. for comparator drift) and the parts generally don't have a power of 2 range.

5 Bytes at 500 kBaud take some 100 µs.  This would be probably acceptable, as waiting time is already in the range of 50 µs and for a 20 ms conversion some extra 50-100 µs are not that bad. I currently use some 150 µs for an auxiliary reading anyway. As a side effect the result would be available earlier and not delayed by some 20 ms.

If the output side is not a normal PC, one may not be limited to standard baud rates.

[iMo]

After Jaromir had kindly posted his cpld code I replaced his uart with "SPI" for fun (there is the code in his thread). With SPI and that 100MBit isolator you may read the 4bytes out in 1-2usecs, for example.

PC: with a serial/usb dongle it has to fit the serial/usb chip's baudrate, the PC baudrate does not matter..
With original PC's rs232 you may set the baudrate to a nonstandard one too, imho (matter of driver).

[Rerouter]

If the 4053 has such extreme sensitivity to its power rail then that for the most part rules out the lm7805. It might have to become an lm7808 with some local LDO regulation.

My thoughts for a higher data rate was to reduce the dead time spent sending the data. I would guess a faster clock frequency would also speed up the conversions slightly. But do not know what the trade offs are.

[Kleinstein]

The supply to the 4053 can be rather sensitive. However this is essentially an offset only, so only short time (e.g. 60 ms) variations (e.g. noise) are a real problem.  The 7805 is not very good, but should be still just good enough, though data from different source may vary.  At least the version I have is good enough - but I think it's a very low noise variant (though not low TC  ).

An extra regulator for the 4053 is definitely a possible option.
Instead of an extra LDO, I would consider a divider from the LM399 and OP as buffer.
The 4053 uses only little current (e.g. 100 µA range). So no extra 8 V level needed. 15 V should be Ok to start.

I currently have a 16 MHz clock - thus not that far from the 20 MHz maximum. A lower clock gives a slightly slower conversion, though not very much. A relatively high clock rate would definitely help for a version without the slow slope - this one would be faster in conversion as the slow part would be saved. The version with the slow slope gets a little fast with a higher clock rate, but not very much (about 100-160 CPU cycles should be the clock dependent part).  I have tested 10 MHz and 16 MHz so far, some 4 MHz should still be possibly - with a little extra time as the modulation would also start to slow down.  A lower clock speed gives less power consumption and likely less RF interference.

P.S. : I checked my old values. The effect of the 4053 supply was a little smaller, more like 0.2 µV/mV. This was also with low reference current and the not so good HC4053 version. So time to measure it again.

[Rerouter]

I should ask how you where planning to implement the slow mode. Was that the 2 combined references idea ir ssomething different.

[Kleinstein]

For slower conversions (more than 1 or 2 PLC) I would use just averaging of many conversions. This method is also used in other meters to keep the 1/f noise down. The 3458 uses up to 10 PLC integration at a time and more with averaging. AFAIK the DMM7510 uses 1 or 3 PLC and than averaging. Noise wise shorter conversions have the advantage of less 1/f noise, but the disadvantage of more time lost to the rundown, more switching effects from the MUX at the input (this can be especially important in a 1 stage amplifier concept like the 3458) and possibly limited resolution (not in my case for 1 PLC).

So to get data at let's say 1 reading per second, this would be alternating between 1 conversion for the input signal and 1 conversion for zero for 24 repetitions.

For the case with not so good resistors there is an alternative method using 1 PLC each for signal, zero and the 7 V reference. This gives a little more noise as less readings (e.g. 16 for 1 SPS) are averaged, but also better accuracy as the ADC gain is measured essentially in real time. This can method compensates much of the resistor TC effects, but adds some noise. It is attractive mainly for longer conversions.

I should ask how you where planning to implement the slow mode. Was that the 2 combined references idea or something different.

I don't know exactly what 2 combined references case you had in mind. There are a few DMMs (e.g. Keithley 2001, 2182, 2010) that use 2 references, probably (quite sure for the K2001) in a way of 1 low noise reference for the ADC itself and a second long term stable reference. However I think this is more like a bad idea, as this makes the ADC gain measurement noisy, often adding more noise than possibly saved by a separate low noise reference - just the filtering of the LM399 reference should be more efficient.
Using a frequent ADC gain measurement with separate reference is likely the reason for the Keithley 2001 to have relatively poor noise performance but good linearity and stability.

I don't know if I mentioned it before: there would be an option to use 2 LM399 in series to make it a +-7 V reference and use +-7 V for gain measurement. Compared to just 2 x LM399 in parallel it has some slight advantages if the resistors are not as good. However this would be a odd combination of cheap resistors and dual reference. So I no longer think it is worth it.
It would be an option for relatively high current 1N829 or 2DW232 references, if one really want's this way. This option would use the "-7 V" tap of the reference amplification.

If a better reference is really needed, the next logical steps would be  2x LM399 in parallel (moderate effort and same SW) and than a LTZ based reference, even if with not so good resistors (e.g. like 34470).

[Rerouter]

Sorry, bad wording on my part, I was more thinking along the lines of using a mixture of +13.4 and -12.2 by switching on both at the mux to get a lower average voltage, or alternating them at variable on time to get a specific average voltage, but if that adds too much noise I can understand,

Starting to work out how your software is working and filled in the gaps of what you had loosely assigned for the other AVR pins, was the comparitor shift part (PD6) intended to offset the comparator by more than the residue? or just to create an offset so you can edge out some more resolution?

[Kleinstein]

The slow slope is by using both (+13.3 and -12.x) references together. As this is only used for a relatively short time (e.g. 10-16µs) the slightly higher noise is not a problem. The main contribution is from the difference (e.g. 13.x to -12.x), the sum (together with leakage currents) is needed as a correction term anyway. With the intentional asymmetry its also used for the slow slope.

The optional shift at the comparator (resistor between PD5 and PD6) would be there to reduce the overshoot, e.g. from reaction time of the µC / comparator / slope amplifier. This is not for more resolution but for a speed up, especially if the asymmetry is chosen small. Without it it currently takes the slow slope some 10-20 µs to make up the overshoot.  Less asymmetry would be more to center the range better and get less effect from the resistors, not for higher resolution.

Pure numerical resolution is high enough, up to the point of the option of not using the slow slope at all and just rely on the fast rundown and the µC internal ADC. This could still give some 27 bit resolution and thus more than the noise limit of some 24 bits. So especially in an implementation with an FPGA/CPLD with a little more timing resolution the slow slope / asymmetry is not needed.

[Rerouter]

I suppose the next question is 24 noise free bits of resolution over what scale, I presume +-12.5V so about 1.5uV / bit, and other than the reference, what effects are setting that noise limit other than the reference, or is he our main lynch pin, (as more of a curiosity)

a raw value of 27 bits is exceptional, places it in the ballpark of 7-8 digits,

For PD5/PD6, shall I include the footprint anyway?
ADC0, the temp sensor, what part of the circuit where you hoping to measure,
ADC2, is the Peak overflow for detecting input buffer out of range, or something else?

[Kleinstein]

The noise is relative to the +-10/12 V range. The measured noise I have is at some 0.6-0.7 µV RMS or some 4 µV_pp for the 2x1 PLC conversion. Much of the noise is just Johnson noise of the resistors. Some noise is from the OPs, especially U11 and in the current setup some noise is from a source I don't know. My suspicion is a little on excess noise from the resistors and maybe higher than normal popcorn noise of U11. Some jitter effect is possible too.

The numerical / raw resolution better than the noise limit essentially avoids the quantization noise. It's also useful for faster conversion, as the resolution goes down linearly but the noise only goes up with the square root. So at 1/16 PLC the raw resolution would be down by 4 bits, while the noise limit goes up by only some 2 bits. So the extra resolution may get use for faster conversions.

To a large part the ADC noise is white noise, while the reference noise is mainly popcorn, 1/f noise. So the comparison is a little difficult.  It depends on the measured voltage (and due to the 1/f nature also the integration time) wether the dominant noise source is the ADC itself or the LM399.  The ADC noise is low enough so that when measuring a 2 nd LM399 reference, most of the noise is due to the 2 references, even at 1 PLC. At 10 PLC it should be at about 1-3 V where ADC and reference are about equally important.
So in quite a few cases the reference is limiting. Still at low percentage (e.g. 10-30%) of the range the ADC is limiting.


On my board the temperature reading (via MUX) is near the input resistors and 4053. In a case the exact position of the sensor may not be that important - just not too close to the LM399.

The peak overflow detection would be for the input amplifier before the MUX or alternatively (if no such amplifier) at the buffer at the ADC. Some DMMs have the overflow detection at the protection - though this would net detect out ouf range peaks in lower ranges. It depends on the use whether the extra overflow detection is needed.