Just upgraded my scope to 2.06, big mistake! Now got a ton of noise even when the probe is grounded. Reverted to 2.05 SP2, noise still there. LCD flickers gone but I'd rather have a flickering LCD than a noisy scope. Self cal did nothing.
Ah, this is a very nice finding! Thank you, Richard.
I do not know what the main plug-in is able to do. There are listed a few bugs at the included README file, though.
Having spent some time on the BlackFin documentation, this is what I've quickly found in the rigol_ldr.h:Code: [Select]struct rgl_hdr {
uchar name[10];
uchar version[4];
uchar dummy1[2];
uint32 crc32;
uchar dummy2;
};
struct ldr_hdr {
uint32 addr;
uint32 size;
uint16 flags;
};
Well, according to the BlackFin "Loader and Utilities Manual" rev. 2.2, page 3-5:
"The boot ROM evaluates the first byte of the boot stream at address 0x2000 0000.
If it is 0x40, eight-bit boot is performed.
A 0x60 byte assumes a 16-bit memory device and performs eight-bit DMA.
A 0x20 byte also assumes 16-bit memory but performs 16-bit DMA.".
Since there is such an entry (with a value equal to 0x60) at all the .RGL firmware upgrade files (right after the 21-byte revision header and before the 10-byte bootloader header) I think that the source file above should rather read something in the lines of:Code: [Select]struct rgl_hdr {
uchar name[10];
uchar version[4];
uchar dummy1[2];
uint32 crc32;
uchar dummy2;
};
struct ldr_hdr {
uint16 bmode;
uint32 addr;
uint32 size;
uint16 flags;
};
I am also not sure how dummy the dummyX entries are...
Yet, I welcome and applaud any such efforts!
-George
I have a question for those who have "upgraded" to 2.06: Why?
Nice work, Krater! Impressive! Thank you for sharing it, also!
Now, regarding the Blackfin, I may be wrong in my observations above because I am very new to this processor family. Since I had never have to work with it before, all I have is only a few hours on the documentation, in my limited spare time...
I also like the idea of the IDA plug-in; it might come in handy! Thanks, again!
-George
So please check volts/div max voltages who have scope with 2.04 or 2.05 versions.
So please check volts/div max voltages who have scope with 2.04 or 2.05 versions.
[...]
Having spent some time on the BlackFin documentation, this is what I've quickly found in the rigol_ldr.h:
[...]
Well, according to the BlackFin "Loader and Utilities Manual" rev. 2.2, page 3-5:
"The boot ROM evaluates the first byte of the boot stream at address 0x2000 0000.
If it is 0x40, eight-bit boot is performed.
A 0x60 byte assumes a 16-bit memory device and performs eight-bit DMA.
A 0x20 byte also assumes 16-bit memory but performs 16-bit DMA.".
Since there is such an entry (with a value equal to 0x60) at all the .RGL firmware upgrade files (right after the 21-byte revision header and before the 10-byte bootloader header) I think that the source file above should rather read something in the lines of:Code: [Select]struct rgl_hdr {
uchar name[10];
uchar version[4];
uchar dummy1[2];
uint32 crc32;
uchar dummy2;
};
struct ldr_hdr {
uint16 bmode;
uint32 addr;
uint32 size;
uint16 flags;
};
Wouldn't it be nice adding, say, serial commands to the firmware in order to be dumping and updating the Spansion memory contents? Or, forcing this nice piece of hardware open source?
-George